Preliminary Datasheet LP3983H 600mA,Ultra-low noise, Small Package Ultra-Fast CMOS LDO Regulator General Description Features The LP3983H is designed for portable RF and wireless Ultra-Low-Noise for RF Application applications with demanding performance and space 2V- 6V Input Voltage Range requirements. The LP3983H performance is optimized Low Dropout : 300mV @ 400mA for battery-powered systems to deliver ultra low noise 600mA Output Current, 750mA Peak Current and low quiescent current. A noise bypass pin is High PSRR: -68dB at 1KHz available for further reduction of output noise. < 0.01uA Standby Current When Shutdown Regulator ground current increases only slightly in Available in SOT23-5/6 Package dropout, further prolonging the battery life. The TTL-Logic-Controlled Shutdown Input LP3983H also works with low-ESR ceramic capacitors, Ultra-Fast Response in Line/Load transient Current Limiting and Thermal Shutdown reducing the amount of board space necessary for power applications, critical in hand-held wireless devices. The LP3983H consumes less than 0.01µA in shutdown mode and has fast turn-on time less than 50µs. The other features include ultra low dropout voltage, high output accuracy, current limiting Protection Quick start-up (typically 20uS) Typical Application Circuit protection, and high ripple rejection ratio. It is available Vin 1 in the 5-lead of SOT23-5 packages. 2.2uF LP3983HAB5F VIN OUT Vout 5 22pF 2.2uF 3 Chip Enable Ordering Information LP3983H □ □ □ □ EN GND ADJ 4 R1 2 □ □ R2 FB voltage 09: 0.9V 08: 0.8V F: Pb-Free Applications Package Type Portable Media Players/MP3 players B5: SOT23-5 Output Voltage Type Cellular and Smart mobile phone LCD DSC Sensor A: Adjustable Wireless Card B6: SOT23-6 LP3983H–00 Version 1.0 Aug.-2014 Email: [email protected] www.lowpowersemi.com Page 1 of 10 Preliminary Datasheet Pin Configurations EN GND 3 2 Marking Information VIN EN 1 3 5 BP ADJ GND VIN Device (MARKING) 4 LP3983H 2 1 Marking LP3983H (MARKING) 6 VOUT 4 5 ADJ VOUT Package Shipping SOT23-5 3K/REEL SOT23-6 Functional Pin Description Pin Name Pin NO. Pin Function SOT23-5 SOT23-6 VIN 1 1 Power Input Voltage. GND 2 2 Ground. EN 3 3 ADJ 4 5 Adjustable pin. BP - 4 Reference Noise Bypass. VOUT 5 6 Output Voltage. Chip Enable (Active High). There is an integrated pull low 1MΩ resistor connected to GND when the control signal is floating. Function Block Diagram LP3983H–00 Version 1.0 Aug.-2014 Email: [email protected] www.lowpowersemi.com Page 2 of 10 Preliminary Datasheet LP3983H Absolute Maximum Ratings Supply Input Voltage----------------------------------------------------------------------------------------------------------6.5V Power Dissipation, PD @ TA = 25°C SOT23-5/6 -----------------------------------------------------------------------------------------------------------------400mW Package Thermal Resistance SOT23-5/6, θJA ----------------------------------------------------------------------------------------------------------250°C/W Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------------260°C Storage Temperature Range --------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility HBM (Human Body Mode) ------------------------------------------------------------------------------------------------2kV MM(Machine-Mode)--------------------------------------------------------------------------------------------------------200V Recommended Operating Conditions Supply Input Voltage-------------------------------------------------------------------------------------------------2V to 5.5V Operation Junction Temperature Range -------------------------------------------------------------- −40°C to 125°C Operation Ambient Temperature Range----------------------------------------------------------------- −20°C to 85°C LP3983H–00 Version 1.0 Aug.-2014 Email: [email protected] www.lowpowersemi.com Page 3 of 10 Preliminary Datasheet LP3983H Electrical Characteristics (VIN = VOUT + 1V, C IN = COUT =2.2µF, CFB = 22pF, TA = 25° C, unless otherwise specified) Parameter Symbol Output Voltage Accuracy ΔVOUT Test Conditions Min Typ. Max Units IOUT = 1mA −2 -- +2 % Output Loading Current ILOAD VEN=VIN,VIN>2.5V 600 mA Current Limit ILIM RLOAD = 1Ω 700 mA Adjustable voltage reference VFB LP3983HAB5F-09 0.9 V LP3983HAB5F-08 0.8 V VEN ≥ 1.4V, IOUT = 0mA 75 130 IOUT = 200mA, VOUT >2.8V 160 200 IOUT = 400mA, VOUT >2.8V 320 400 Quiescent Current IQ Dropout Voltage VDROP Line Regulation ΔVLINE Load Regulation ΔLOAD 1mA < IOUT < 400mA Standby Current ISTBY VEN = GND, Shutdown EN Input Bias Current IIBSD VEN = GND or VIN EN Threshold Logic-Low Voltage Logic-High Voltage VIL VIH Power Supply f = 100Hz Rejection Rate f = 10kHz Thermal Shutdown Temperature Aug.-2014 PSRR % 0.6 % 0.01 1 μA 0.1 100 nA VIN = 3V to 5.5V, 0.4 Shutdown V VIN = 3V to 5.5V, Start-Up 200mA, COUT = 1µF 1.4 100 COUT = 1µF, −76 IOUT = 10mA −68 TSD Email: [email protected] mV 0.3 IOUT = 1mA 10Hz to 100kHz, IOUT = Output Noise Voltage LP3983H–00 Version 1.0 VIN = (VOUT + 1V) to 5.5V, μA 165 www.lowpowersemi.com uVRMS dB °C Page 4 of 10 Preliminary Datasheet LP3983H Typical Operating Characteristics LP3983H–00 Version 1.0 Aug.-2014 Email: [email protected] www.lowpowersemi.com Page 5 of 10 Preliminary Datasheet LP3983H–00 Version 1.0 Aug.-2014 Email: [email protected] LP3983H www.lowpowersemi.com Page 6 of 10 Preliminary Datasheet LP3983H Applications Information The LP3983H features an LDO regulator enable/disable Like any low-dropout regulator, the external capacitors function. To assure the LDO regulator will switch on, the used with the LP3983H must be carefully selected for EN turn on control level must be greater than 1.4 volts. regulator stability and performance. Using a capacitor The LDO regulator will go into the shutdown mode when whose value is > 1µF on the LP3983H input and the the voltage on the EN pin falls below 0.4 volts. For to amount of capacitance can be increased without limit. protecting The input capacitor must be located a distance of not quick-discharge function. If the enable function is not more than 0.5 inch from the input pin of the IC and needed in a specific application, it may be tied to VIN to returned to a clean analog ground. Any good quality keep the LDO regulator in a continuously on state. ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The LP3983H is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1µF with ESR is > 25mΩ on the LP3983H output ensures stability. The LP3983H still works well with output capacitor of other types due to the wide stable ESR range. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than 0.5 inch from the VOUT pin of the LP3983H and returned to a clean analog ground. the system, the LP3983H have a Feedback Capacitor and Bypass Capacitor For adjustable version, connecting a 22pF between output pin and FB pin significantly reduces output voltage ripple, it is critical that the capacitor connection should be direct and PCB traces should be as short as possible. For LP3983HB6F08/9, connecting a 10nF between the BP pin and GND pin significantly reduces noise on the regulator output, it is critical that the capacitor connection between the BP pin and GND pin be direct and PCB traces should be as short as possible. There is a relationship between the bypass capacitor value and the LDO regulator turn on time. DC leakage on this pin can affect the LDO regulator output noise and voltage regulation performance. Thermal Considerations Start-up Function Enable Function Thermal protection limits power dissipation in LP3983H. When the operation junction temperature exceeds 165°C, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turns on again after the junction temperature cools by 30°C. For continue operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is: PD = (VIN−VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of LP3983H–00 Version 1.0 Aug.-2014 Email: [email protected] www.lowpowersemi.com Page 7 of 10 Preliminary Datasheet LP3983H surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula: PD(MAX) = ( TJ(MAX) − TA ) /θJA Where TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of LP3983H, where TJ(MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance (θJA is layout dependent) for SOT23-5 package is 250°C/W. PD(MAX) = (125°C−25°C) / 250 = 400mW (SOT23-5) The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. LP3983H–00 Version 1.0 Aug.-2014 Email: [email protected] www.lowpowersemi.com Page 8 of 10 Preliminary Datasheet LP3983H Packaging Information SOT23-5 LP3983H–00 Version 1.0 Aug.-2014 Email: [email protected] www.lowpowersemi.com Page 9 of 10 Preliminary Datasheet LP3983H SOT23-6 LP3983H–00 Version 1.0 Aug.-2014 Email: [email protected] www.lowpowersemi.com Page 10 of 10