Preliminary Datasheet LP3315 1.2MHz,30V/1A High Performance, Boost Converter General Description Features The LP3315 is a 1.2MHz PWM boost switching regulator designed for constant-voltage boost applications. The LP3315 can drive a string of up to 30V. The LP3315 implements a constant frequency 1.2MHz PWM control scheme. The high frequency PWM operation also saves board space by reducing external component sizes. To improve efficiency, the feedback voltage is set to 1250mV, which reduces the power dissipation in the voltage setting resistor. Highly integration and internal compensation network minimizes as 5 external component counts. Optimized operation frequency can meet the requirement of small LC filters value and low operation current with high efficiency. Ordering Information High Efficiency: 90% 1.2MHzFixed-Frequency PWM Operation Maximum Output Voltage up to 30V Guaranteed 13V/200mA Output with 5V input Operating Range : 2.7V to 5.5V Shutdown Supply Current:<1uA Programmable Soft-star Available in SOT23-6/SOT23-5 Package Minimize the External Component RoHS Compliant and 100% Lead (Pb)-Free Applications Panel Bais Voltage supply OLED Backlight driver Notebook Computers Portable Applications MID/PTV LP3315 Typical Application Circuit Vin VOUT F: Pb-Free 4.7uH C2 2.2uF 5 Package: B5: SOT23-5 LX 1 C1 4.7uF Vin FB SHDN ON 2 OFF R1 210K R2 30K GND 4 Pin Configurations 3 C3 1nF LP3315 Marking information Please view website. Device No. Marking Package Shipping LP3315B5F LPS SOT23-5 3K/Reel Fbxxx x represents the date( year month day)of the producing day of the products. LP3315– 00 Version1.0 Datasheet Feb.-2012 www.lowpowersemi.com Page 1 of 8 Preliminary Datasheet LP3315 Functional pin description SOT-23-5 Pin Name Pin Function 1 LX Switch Pin. Connect this Pin to inductor and catch diode. Minimize the track area to reduce EMI. 2 GND Ground Pin 3 FB Feedback Reference Voltage Pin. Series connect a resistor between Vout and ground as a voltage sense. The feedback voltage is 1250mV. 4 SHDN 5 Vin Chip Enable (Active High). Voltage sensing input to trigger the function of over voltage protection. Note that this pin is high impedance. There should be a pull low 100kΩ resistor connected to GND when the control signal is floating. Supply Input Voltage Pin. Bypass 1uF capacitor to GND to reduce the input noise. Function Block Diagram LX VIN + + FB - + - EN GND LP3315– 00 Version1.0 Datasheet Feb.-2012 www.lowpowersemi.com Page 2 of 8 Preliminary Datasheet LP3315 Absolute Maximum Ratings Supply Input Voltage---------------------------------------------------------------------------------------------------−0.3V to 6.0V LX Input Voltage --------------------------------------------------------------------------------------------------------−0.3V to 30V The Other Pins ----------------------------------------------------------------------------------------------------------−0.3V to 5.5V Power Dissipation, PD @ TA = 25°C TSOT-23-5/6-----------------------------------------------------------------------0.455W Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------- 260°C Operation Temperature Range ---------------------------------------------------------------------------------−40°C to 80°C Storage Temperature Range ----------------------------------------------------------------------------------------−65°C to 150°C Electrical Characteristics Parameter Symbol Test Condition Min Typ. Max Units 6 V System Supply Input Operation voltage Range VDD 2.7 Under Voltage Lock Out VDD 2.2 Supply Current IDD FB=1.2V, Switch 430 550 uA Shut Down Current IDD VEN < 0.4V 0.1 1 uA Line Regulation VIN : 3.0~4.3V 2.4 2.6 V 2 % 1.2 MHz Oscillator Operation Frequency FOSC Maximum Duty Cycle Feedback Voltage 93 LP3315 1.22 % 1.25 1.28 V MOSFET On Resistance of MOSFET RDS(ON) SW Current Limit ILM 0.4 Ω 1 A Protection Shut Down Voltage VEN Enable on Voltage VEN LP3315– 00 Version1.0 Datasheet Feb.-2012 0.3 V 1.0 www.lowpowersemi.com V Page 3 of 8 Preliminary Datasheet LP3315 Typical Operating Characteristics LP3315– 00 Version1.0 Datasheet Feb.-2012 www.lowpowersemi.com Page 4 of 8 Preliminary Datasheet LP3315– 00 Version1.0 Datasheet Feb.-2012 www.lowpowersemi.com LP3315 Page 5 of 8 Preliminary Datasheet LP3315 Applications Information Inductor Selection The recommended value of inductor for 30V applications are 4.7 to 22µH. Small size and better efficiency are the major concerns for portable device, such as LP3315 used for mobile phone. The inductor should have low core loss at 1.2MHz and low DCR for better efficiency. To avoid inductor saturation current rating should be considered. Constant Output Voltage Control The output voltage of the LP3315 can be adjusted by the divider circuit on the FB pin. Typical FB voltage is 1250mV. The output voltage can be calculated by the following Equations. Power Sequence In order to assure the normal soft start function for suppressing the inrush current the input voltage should be ready before EN pulls high. Soft-Start The function of soft-start is made for suppressing the inrush current to an acceptable value at the beginning of power on. The LP3315 provides a built-in soft-start function by clamping the output voltage of error amplifier so that the duty cycle of the PWM will be increased gradually in the soft-start period. Current Limiting The current flow through inductor as charging period is detected by a current sensing circuit. As the value comes across the current limiting threshold, the N-MOSFET will be turned off so that the inductor will be forced to leave charging stage and enter discharging stage. Therefore, the inductor current will not increase over the current limiting threshold. OVP/UVLO/OTP The Over Voltage Protection is detected by a junction breakdown detecting circuit. Once VOUT goes over the detecting voltage, LX pin stops switching and the power N-MOSFET will be turned off. Then, the VOUT will be clamped to be near VOVP. As the output voltage is higher than a specified value or input voltage is lower than a specified value, the chip will enter protection mode to prevent abnormal function. As the die temperature is higher then 160°C, the chip also will enter protection mode. The power MOSFET will be turned off during protection mode to prevent abnormal operation. Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : Where TJ(MAX) is the maximum operation junction temperature, TA is the ambient temperature and the qJA is the LP3315– 00 Version1.0 Datasheet Feb.-2012 www.lowpowersemi.com Page 6 of 8 Preliminary Datasheet LP3315 junction to ambient thermal resistance. For the recommended operating conditions specification of LP3315, the maximum junction temperature of the die is 125°C. The junction to ambient thermal resistance Qja is layout dependent. The junction to ambient thermal resistance for SOT23-5 package is 255°C/W and for WDFN-8L 2x2 package is 165°C/W on the standard JEDEC 51-3 single layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : Layout Consideration For best performance of the LP3315, the following guidelines must be strictly followed. - Input and Output capacitors should be placed close to the IC and connected to ground plane to reduce noise coupling. - The GND and Exposed Pad should be connected to a strong ground plane for heat sinking and noise protection. - Keep the main current traces as possible as short and wide. - LX node of DC-DC converter is with high frequency voltage swing. It should be kept at a small area. - Place the feedback components as close as possible to the IC and keep away from the noisy devices. LP3315– 00 Version1.0 Datasheet Feb.-2012 www.lowpowersemi.com Page 7 of 8 Preliminary Datasheet LP3315 Packing information LP3315– 00 Version1.0 Datasheet Feb.-2012 www.lowpowersemi.com Page 8 of 8