Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric,
500 – 630 VDC (Commercial Grade)
Overview
KEMET Power Solutions (KPS) High Voltage stacked capacitors
utilize a proprietary lead-frame technology to vertically stack one
or two multilayer ceramic chip capacitors into a single compact
surface mount package. The attached lead-frame mechanically
isolates the capacitor(s) from the printed circuit board, thereby
offering advanced mechanical and thermal stress performance.
Isolation also addresses concerns for audible microphonic
noise that may occur when a bias voltage is applied. A two-chip
stack offers up to double the capacitance in the same or smaller
design footprint when compared to traditional surface mount
MLCC devices. Providing up to 10 mm of board flex capability,
KPS Series High Voltage capacitors are environmentally friendly
and in compliance with RoHS legislation.
KEMET’s KPS Series devices in X7R dielectric exhibit a
predictable change in capacitance with respect to time and
voltage, and boast a minimal change in capacitance with reference
to ambient temperature. Capacitance change is limited to ±15%
from -55°C to +125°C. These devices are capable of Pb-Free
reflow profiles and provide lower ESR, ESL and higher ripple
current capability when compared to other dielectric solutions.
Conventional uses include both snubbers and filters in applications
such as switching power supplies and lighting ballasts. Their
exceptional performance at high frequencies has made high
voltage ceramic capacitors the preferred dielectric choice of
design engineers worldwide. In addition to their use in power
supplies, these capacitors are widely used in industries related
to automotive (hybrid), telecommunications, medical, military,
aerospace, semiconductors, and test/diagnostic equipment.
Benefits
•
•
•
•
•
•
-55°C to +125°C operating temperature range
Reliable and robust termination system
EIA 2220 case size
DC voltage ratings of 500 V and 630 V
Capacitance offerings ranging from 0.047 µF up to 1.0 µF
Available capacitance tolerances of ±10% and ±20%
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Ordering Information
C
Ceramic
2220
C
Case Size Specification/
(L"x W")
Series
2220
C=
Standard
105
M
Capacitance
Code (pF)
Capacitance
Tolerance1
2 significant digits +
number of zeros.
K = ±10%
M = ±20%
C
R
Rated Voltage
Dielectric
(VDC)
C = 500 V
B = 630 V
R = X7R
2
C
7186
Failure Rate/
Design
Leadframe
Finish2
Packaging/Grade
(C-Spec)3
1 = KPS Single
Chip Stack
2 = KPS Double
Chip Stack
C = 100%
Matte Sn
7186 = 7" Reel/
Embossed Plastic
7289 = 13" Reel/
Embossed Plastic
Double chip stacks ("2" in the 13th character position of the ordering code) are only available in M (±20%) capacitance tolerance.
Single chip stacks ("1" in the 13th character position of the ordering code) are available in K (±10%) or M (±20%) tolerances.
2
Additional leadframe finish options may be available. Contact KEMET for details.
3
Additional reeling or packaging options may be available. Contact KEMET for details.
1
One world. One KEMET
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Dimensions – Millimeters (Inches)
TOP VIEW
Single or Double Chip Stack
PROFILE VIEW
Double Chip Stack
Single Chip Stack
L
L
W
H
H
LW
LW
Number of
Chips
EIA Size
Code
Metric
Size Code
L
Length
W
Width
H
Height
LW
Lead Width
Mounting
Technique
Single
2220
5650
Double
2220
5650
6.00 (0.236)
±0.50 (0.020)
6.00 (0.236)
±0.50 (0.020)
5.00 (.197)
±0.50 (.020)
5.00 (.197)
±0.50 (.020)
3.50 (.138)
±0.30 (.012)
5.00 (.197)
±0.50 (.020)
1.60 (.063)
±0.30 (.012)
1.60 (.063)
±0.30 (.012)
Solder Reflow Only
Benefits cont'd
•
•
•
•
•
Higher capacitance in the same footprint
Potential board space savings
Advanced protection against thermal and mechanical stress
Provides up to 10 mm of board flex capability
Reduces audible microphonic noise
• Extremely low ESR and ESL
• Lead (Pb)-Free, RoHS and REACH compliant
• Capable of Pb-Free reflow profiles
• Non-polar device, minimizing installation concerns
• Film alternative
Applications
Typical applications include switch mode power supplies (input filters, resonators, tank circuits, snubber circuits, output filters), high
voltage coupling and DC blocking, lighting ballasts, voltage multiplier circuits, DC/DC converters and coupling capacitors in Ćuk
converters. Markets include power supply, LCD fluorescent backlight ballasts, HID lighting, telecom equipment, industrial and medical
equipment/control, LAN/WAN interface, analog and digital modems, and automotive (electric and hybrid vehicles, charging stations and
lighting applications).
Application Note
X7R dielectric is not recommended for AC line filtering or pulse applications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Qualification/Certification
Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are referenced in
Table 4 , Performance and Reliability.
Environmental Compliance
Lead (Pb)-Free, RoHS, and REACH compliant without exemptions.
Electrical Parameters/Characteristics
Item
Parameters/Characteristics
Operating Temperature Range
-55°C to +125°C
Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC)
±15%
Aging Rate (Maximum % Capacitance Loss/Decade Hour)
3.0%
Dielectric Withstanding Voltage (DWV)
Dissipation Factor (DF) Maximum Limit @ 25ºC
Insulation Resistance (IR) Limit @ 25°C
150% of rated voltage for voltage rating of < 1,000 V
120% of rated voltage for voltage rating of ≥ 1,000 V
(5 ±1 seconds and charge/discharge not exceeding 50 mA)
2.5%
See Insulation Resistance Limit Table
(500 VDC applied for 120 ±5 seconds @ 25°C)
Regarding Aging Rate: Capacitance measurements (including tolerance) are indexed to a referee time of 1,000 hours.
To obtain IR limit, divide MΩ - µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and Dissipation Factor (DF) measured under the following conditions: 1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF
120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance >10 µF
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as
Automatic Level Control (ALC). The ALC feature should be switched to "ON."
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric
Rated DC
Voltage
Capacitance
Value
> 25
X7R
16/25
< 16
Dissipation Factor
(Maximum %)
Capacitance
Shift
Insulation
Resistance
±20%
10% of Initial Limit
3.0
All
5.0
7.5
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Insulation Resistance Limit Table
EIA Case Size
1,000 Megohm
Microfarads or 100 GΩ
100 Megohm
Microfarads or 10 GΩ
0805
< 0.0039 µF
≥ 0.0039 µF
1206
< 0.012 µF
≥ 0.012 µF
1210
< 0.033 µF
≥ 0.033 µF
1808
< 0.018 µF
≥ 0.018 µF
1812
< 0.027 µF
≥ 0.027 µF
≥ 1825
All
N/A
Table 1 – Capacitance Range/Selection Waterfall (2220 Case Sizes)
Case Size/Series
Capacitance
Capacitance
Code
0.047 µF
0.10 µF
0.15 µF
0.22 µF
0.33 µF
0.47 µF
473
104
154
224
334
474
0.10 µF
0.22 µF
0.33 µF
0.47 µF
0.68 µF
1.0 µF
104
224
334
474
684
105
Capacitance
Capacitance
Code
C2220C
Voltage Code
C
B
D
Rated Voltage (VDC)
500
630
1000
Capacitance Tolerance
Product Availability and Chip Thickness
Codes – See Table 2 for Chip Thickness
Dimensions
Single Chip Stack
K
K
K
K
K
K
M
M
M
M
M
M
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
M
M
M
M
M
M
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
500
C
630
B
Double Chip Stack
Rated Voltage (VDC)
Voltage Code
Case Size/Series
1000
D
C2220C
These products are protected under US Patent 8,331,078 other patents pending, and any foreign counterparts.
Table 2 – Chip Thickness/Packaging Quantities
Paper Quantity
Plastic Quantity
Thickness
Code
Case
Size
Thickness ±
Range (mm)
7" Reel
13" Reel
7" Reel
13" Reel
JP
2220
3.50 ± 0.30
0
0
300
1,300
JR
2220
5.00 ± 0.50
0
0
200
800
Package quantity based on finished chip thickness specifications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Table 3 – KPS Land Pattern Design Recommendations (mm)
EIA SIZE
CODE
METRIC
SIZE
CODE
1210
V1
Median (Nominal) Land Protrusion
C
Y
X
V1
V2
3225
1.50
1.14
1.75
5.05
3.40
1812
4532
2.20
1.35
2.87
6.70
4.50
2220
5650
2.69
2.08
4.78
7.70
6.00
Y
Image at right based on an EIA 1210 case size.
Y
X
X
C
C
V2
Grid Placement Courtyard
Soldering Process
To prevent degradation of temperature cycling capability, care
must be taken to prevent solder from flowing into the inner side
of the lead frames (inner side of "J" lead in contact with the
circuit board).
After soldering, the capacitors should be air cooled to room
temperature before further processing. Forced air cooling is not
recommended.
Hand soldering should be performed with care due to the
difficulty in process control. If performed, care should be taken
to avoid contact of the soldering iron to the capacitor body. The
iron should be used to heat the solder pad, applying solder
between the pad and the lead, until reflow occurs. Once reflow
occurs, the iron should be removed immediately. (Preheating is
required when hand soldering to avoid thermal shock.)
Profile Feature
SnPb Assembly Pb-Free Assembly
Preheat/Soak
Temperature Minimum (TSmin)
100°C
150°C
Temperature Maximum (TSmax)
150°C
200°C
Time (ts) from Tsmin to Tsmax)
60 – 120 seconds
60 – 120 seconds
Ramp-up Rate (TL to TP)
3°C/seconds maximum
3°C/seconds maximum
Liquidous Temperature (TL)
183°C
217°C
Time Above Liquidous (tL)
60 – 150 seconds
60 – 150 seconds
Peak Temperature (TP)
Time within 5°C of Maximum
Peak Temperature (tP)
Ramp-down Rate (TP to TL)
235°C
250°C
20 seconds maximum
10 seconds maximum
6°C/seconds maximum
6°C/seconds maximum
Time 25°C to Peak Temperature
6 minutes maximum
8 minutes maximum
Note: All temperatures refer to the center of the package, measured on the
package body surface that is facing up during assembly reflow.
TP
TL
Temperature
KEMET’s KPS Series devices are compatible with IR reflow
techniques. Preheating of these components is recommended
to avoid extreme thermal stress. KEMET's recommended profile
conditions for IR reflow reflect the profile conditions of the
IPC/J–STD–020D standard for moisture sensitivity testing.
tP
Maximum Ramp Up Rate = 3ºC/seconds
Maximum Ramp Down Rate = 6ºC/seconds
tL
Tsmax
Tsmin
25
tS
25ºC to Peak
Time
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
5
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress
Reference
Test or Inspection Method
Terminal Strength
JIS–C–6429
Appendix 1, Note: Force of 1.8 kg for 60 seconds.
Board Flex
JIS–C–6429
Appendix 2, Note: 5.0 mm minimum
Magnification 50 X. Conditions:
Solderability
J–STD–002
a) Method B, 4 hours @ 155°C, dry heat @ 235°C
b) Method B @ 215°C category 3
c) Method D, category 3 @ 250°C
Temperature Cycling
JESD22 Method JA–104
1,000 cycles (-55°C to +125°C). Measurement at 24 hours +/- 2 hours after test conclusion.
Biased Humidity
MIL–STD–202 Method 103
Moisture Resistance
MIL–STD–202 Method 106
Thermal Shock
MIL–STD–202 Method 107
Load Humidity: 1,000 hours 85°C/85% RH and 200 VDC maximum. Add 100 K ohm resistor.
Measurement at 24 hours +/- 2 hours after test conclusion.
Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.
Measurement at 24 hours +/- 2 hours after test conclusion.
t = 24 hours/cycle. Steps 7a and 7b not required. Unpowered.
Measurement at 24 hours +/- 2 hours after test conclusion.
-55°C/+125°C. Note: Number of cycles required – 300. Maximum transfer time – 20 seconds. Dwell
time – 15 minutes. Air-Air.
High Temperature Life
MIL–STD–202 Method 108
1,000 hours at 125°C with rated voltage applied.
Storage Life
MIL–STD–202 Method 108
150°C, 0 VDC for 1,000 hours.
Vibration
MIL–STD–202 Method 204
5 g's for 20 minutes, 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB 0.031" thick, 7 secure
points on one long side and 2 secure points at corners of opposite sides. Parts mounted within 2"
from any secure point. Test from 10 – 2,000 Hz.
Mechanical Shock
MIL–STD–202 Method 213
Figure 1 of Method 213, Condition F.
Resistance to Solvents
MIL–STD–202 Method 215
Add aqueous wash chemical, OKEM Clean or equivalent.
Storage and Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other
environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term
storage. In addition, packaging materials will be degraded by high temperature– reels may soften or warp and tape peel force may
increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum storage humidity not exceed 70%
relative humidity. Temperature fluctuations should be minimized to avoid condensation on the parts and atmospheres should be free of
chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of
receipt.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Construction
Detailed Cross Section
Dielectric Material
(BaTiO3)
Leadframe
(Phosphor Bronze - Alloy 510)
Leadframe Attach
(High Melting Point Solder)
Inner Electrodes
(Ni)
Base Metal
(Cu)
Dielectric Material
(BaTiO3)
Termination Finish
(Sn)
Base Metal
(Cu)
Barrier Layer
(Ni)
Barrier Layer
(Ni)
Termination Finish
(Sn)
Inner Electrodes
(Ni)
Product Marking
Laser marking option is not available on:
•
•
•
•
C0G, Ultra Stable X8R and Y5V dielectric devices
EIA 0402 case size devices
EIA 0603 case size devices with Flexible Termination option.
KPS Commercial and Automotive grade stacked devices.
These capacitors are supplied unmarked only.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA
Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on
reeling quantities for commercial chips.
Table 5 – Carrier Tape Configuration – Embossed Plastic (mm)
EIA Case Size
Tape Size (W)*
Pitch (P1)*
01005 – 0402
8
2
0603 – 1210
8
4
1805 – 1808
12
4
≥ 1812
12
8
KPS 1210
12
8
KPS 1812 & 2220
16
12
Array 0508 & 0612
8
4
*Refer to Figure 1 for W and P1 carrier tape reference locations.
*Refer to Table 5 for tolerance specifications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
P2
T
T2
ØDo
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
Po
E1
Ao
F
Ko
B1
E2
Bo
S1
W
P1
T1
Center Lines of Cavity
ØD 1
Cover Tape
B 1 is for tape feeder reference only,
including draft concentric about B o.
Embossment
For cavity size,
see Note 1 Table 4
User Direction of Unreeling
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
8 mm
12 mm
1.5 +0.10/-0.0
(0.059 +0.004/-0.0)
16 mm
D1 Minimum
Note 1
1.0
(0.039)
1.5
(0.059)
E1
P0
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
R Reference S1 Minimum
Note 2
Note 3
25.0
(0.984)
2.0 ±0.05
0.600
(0.079 ±0.002)
(0.024)
30
(1.181)
P2
T
Maximum
T1
Maximum
0.600
(0.024)
0.100
(0.004)
Variable Dimensions — Millimeters (Inches)
Tape Size
Pitch
8 mm
Single (4 mm)
12 mm
Single (4 mm) &
Double (8 mm)
16 mm
Triple (12 mm)
B1 Maximum
Note 4
4.35
(0.171)
8.2
(0.323)
12.1
(0.476)
E2
Minimum
6.25
(0.246)
10.25
(0.404)
14.25
(0.561)
F
P1
3.5 ±0.05
4.0 ±0.10
(0.138 ±0.002) (0.157 ±0.004)
5.5 ±0.05
8.0 ±0.10
(0.217 ±0.002) (0.315 ±0.004)
7.5 ± 0.05
12.0 ± 0.10
(0.138 ± 0.002) (0.157 ± 0.004)
T2
Maximum
2.5
(0.098)
4.6
(0.181)
4.6
(0.181)
W
Maximum
8.3
(0.327)
12.3
(0.484)
16.3
(0.642)
A0,B0 & K0
Note 5
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and
hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 5).
3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 2).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 3).
(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 Kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width
Peel Strength
8 mm
0.1 to 1.0 Newton (10 to 100 gf)
12 and 16 mm
0.1 to 1.3 Newton (10 to 130 gf)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180°
from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 2 – Maximum Component Rotation
°
T
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Typical Pocket Centerline
Tape
Width (mm)
8,12
16 – 200
Bo
Maximum
Rotation (
20
10
°
T)
Typical Component Centerline
Ao
Figure 3 – Maximum Lateral Movement
8 mm & 12 mm Tape
0.5 mm maximum
0.5 mm maximum
16 mm Tape
°
s
Tape
Maximum
Width (mm) Rotation (
8,12
20
16 – 56
10
72 – 200
5
°
S)
Figure 4 – Bending Radius
Embossed
Carrier
Punched
Carrier
1.0 mm maximum
1.0 mm maximum
R
Bending
Radius
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
R
C1036_X7R_KPS_HV_SMD • 12/29/2014
10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Figure 5 – Reel Dimensions
Full Radius,
See Note
W3 (Includes
Access Hole at
Slot Location
(Ø 40 mm minimum)
flange distortion
at outer edge)
W2 (Measured at hub)
D
A
(See Note)
N
C
(Arbor hole
diameter)
B
(see Note)
W1 (Measured at hub)
If present,
tape slot in core
for tape start:
2.5 mm minimum width x
10.0 mm minimum depth
Note: Drive spokes optional; if used, dimensions B and D shall apply.
Table 7 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
A
B Minimum
C
D Minimum
8 mm
178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059)
13.0 +0.5/-0.2
(0.521 +0.02/-0.008)
20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size
N Minimum
W1
W2 Maximum
W3
50
(1.969)
8.4 +1.5/-0.0
(0.331 +0.059/-0.0)
12.4 +2.0/-0.0
(0.488 +0.078/-0.0)
16.4 +2.0/-0.0
(0.646 +0.078/-0.0)
14.4
(0.567)
18.4
(0.724)
22.4
(0.882)
Shall accommodate tape width
without interference
8 mm
12 mm
16 mm
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Figure 6 – Tape Leader & Trailer Dimensions
Embossed Carrier
Carrier Tape
Punched Carrier
8 mm & 12 mm only
END
Round Sprocket Holes
START
Top Cover Tape
Elongated Sprocket Holes
(32 mm tape and wider)
Trailer
160 mm Minimum
Components
100 mm
Minimum Leader
400 mm Minimum
Top Cover Tape
Figure 7 – Maximum Camber
Elongated sprocket holes
(32 mm & wider tapes)
Carrier Tape
Round Sprocket Holes
1 mm Maximum, either direction
Straight Edge
250 mm
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
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Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
KEMET Corporation
World Headquarters
Europe
Asia
Southern Europe
Sasso Marconi, Italy
Tel: 39-051-939111
Northeast Asia
Hong Kong
Tel: 852-2305-1168
Mailing Address:
P.O. Box 5928
Greenville, SC 29606
Skopje, Macedonia
Tel: 389-2-55-14-623
Shenzhen, China
Tel: 86-755-2518-1306
www.kemet.com
Tel: 864-963-6300
Fax: 864-963-6521
Central Europe
Landsberg, Germany
Tel: 49-8191-3350800
Corporate Offices
Fort Lauderdale, FL
Tel: 954-766-2800
Kamen, Germany
Tel: 49-2307-438110
North America
Northern Europe
Harlow, United Kingdom
Tel: 44-1279-460122
Taipei, Taiwan
Tel: 886-2-27528585
Espoo, Finland
Tel: 358-9-5406-5000
Southeast Asia
Singapore
Tel: 65-6701-8033
2835 KEMET Way
Simpsonville, SC 29681
Southeast
Lake Mary, FL
Tel: 407-855-8886
Northeast
Wilmington, MA
Tel: 978-658-1663
Central
Novi, MI
Tel: 248-306-9353
Beijing, China
Tel: 86-10-5877-1075
Shanghai, China
Tel: 86-21-6447-0707
Seoul, South Korea
Tel: 82-2-6294-0550
Penang, Malaysia
Tel: 60-4-6430200
Bangalore, India
Tel: 91-806-53-76817
West
Milpitas, CA
Tel: 408-433-9950
Mexico
Guadalajara, Jalisco
Tel: 52-33-3123-2141
Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not
assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of
KEMET Electronics Corporation.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, High Voltage, X7R Dielectric, 500 VDC – 630 VDC (Commercial Grade)
Disclaimer
All product specifications, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for checking and
verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed.
All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.
Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such applications, but are
not intended to constitute – and KEMET specifically disclaims – any warranty concerning suitability for a specific customer application or use. The Information is intended for use only
by customers who have the requisite experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise
provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no obligation or liability for the advice given or results obtained.
Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still
occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective
circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage.
Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other measures may not
be required.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1036_X7R_KPS_HV_SMD • 12/29/2014
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