NJW4822

NJW4822
1-Channel Low Side Switch
 GENERAL DESCRIPTION
 PACKAGE OUTLINE
The NJW4822 is the single low-side switch that can supply 0.2A.
The active clamp, overcurrent, error flag output and thermal
shutdown are built in with Nch MOS FET.
It can be controlled by a logic signal (3V/5V) directly. Especially, the
NJW4822 is suitable for various Sensors output block as NPN
type. The FLT logic has two versions: Active-high (A-ver) and
Active-low (B-ver).
Also, The NJW4822 is a complementary product to the NJW4832.
NJW4822KH1
 FEATURES
 Drain-Source Voltage
43V
 Drain Current
0.2A
 Corresponding with Logic Voltage Operation: 3V/5V
 Low On-Resistance
1.1 (typ.) (VIN=5V)
1.3 (typ.) (VIN=3.3V)
 Low Consumption Current
160A (typ.) (VIN=5V)
135A (typ.) (VIN=3.3V)
 Active Clamp Circuit
 Over Current Protection
 Thermal Shutdown
 Package Outline
DFN6-H1 (ESON6-H1)
 PIN CONFIGURATION
6
1
5
2
4
3
(Top View)
1. NC
2. NC
3. DRAIN
4. IN
5. SOURCE
6. FLT
1
2
3
Exposed PAD on backside
connect to GND.
6
5
4
(Bottom View)
 BLOCK DIAGRAM
DRAIN
FLT
Active
Clamp
IN
Thermal
Shut Down
Over
Current
Protection
SOURCE
Ver.2015-06-22
-1-
NJW4822
 ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
Drain-Source Voltage
VDS
Input Pin Voltage
VIN
FLT Pin Voltage
VFLT
Power Dissipation
Active Clamp Tolerance
(Single Pulse)
Active Clamp Current
Junction Temperature
Operating Temperature
Storage Temperature
(Ta=25C)
REMARK
DRAIN–SOURCE Pin
IN–SOURCE Pin
FLT–SOURCE Pin
RATINGS
43
0.3 to 6
0.3 to 6
445 (*1)
1135 (*2)
UNIT
V
V
V
mW
–
EAS
100
mJ
–
IAP
Tj
Topr
Tstg
0.2
40 to 150
40 to 125
50 to 150
A
C
C
C
–
–
–
–
PD
(*1): Mounted on glass epoxy board (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 2Layers FR-4, with Exposed Pad)
(*2): Mounted on glass epoxy board (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 4Layers FR-4, with Exposed Pad)
(4Layers: Applying 99.5×99.5mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD51-5)
 RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
MIN.
Drain-Source Voltage
VDS
0
Drain Current
ID
0
Input Pin Voltage
VIN
0
FLT Pin Voltage
VFLT
0
 PRODUCT VERSION
PRODUCT NAME
NJW4822KH1-A
NJW4822KH1-B
-2-
TYP.
–
–
–
–
MAX.
40
0.2
5.5
5.5
UNIT
V
A
V
V
(Ta=25C)
REMARK
DRAIN–SOURCE Pin
DRAIN–SOURCE Pin
IN–SOURCE Pin
FLT–SOURCE Pin
FLT LOGIC
Active High
Active Low
Ver.2015-06-22
NJW4822
 ELECTRICAL CHARACTERISTICS
PARAMETER
(Unless otherwise noted, VDS=13V, Ta=25C)
SYMBOL
VDSS_CL
Vth
Drain-Source Clamp Voltage
Input Threshold Voltage
Protection Circuit Function
Input Voltage Range
Zero-gate-voltage drain Current
Input Current 1
(at Normal Operation)
Input Current 2
(at Normal Operation)
Input Current 3
(at OCP Operation)
Input Current 4
(at OCP Operation)
On-state Resistance 1
On-state Resistance 2
Over Current Protection 1
Over Current Protection 2
CONDITIONS
VIN=0V, ID=1mA
VDS=13V, ID=10mA
VIN_opr
MIN.
TYP.
MAX.
UNIT
43
0.55
–
0.8
–
1.05
V
V
2.64
–
5.5
V
IDSS
VIN=0V, VDS=40V
–
–
1
A
IIN1
VIN=5V
–
160
225
A
IIN2
VIN=3.3V
–
135
195
A
IIN3
VIN=5V, VDD=13V
–
260
345
A
IIN4
VIN=3.3V, VDD=13V
–
175
240
A
RDS_ON1
RDS_ON2
ILIMIT1
ILIMIT2
VIN=5V, ID=0.2A
VIN=3.3V, ID=0.2A
VIN=5V, VDD=13V
VIN=3.3V, VDD=13V
VIN=0 to 5V,
VDD=13V, ID=0.2A
VIN=0 to 3.3V,
VDD=13V, ID=0.2A
VIN=5 to 0V,
VDD=13V, ID=0.2A
VIN=3.3 to 0V,
VDD=13V, ID=0.2A
–
–
0.2
0.2
1.1
1.2
0.45
0.4
1.45
1.6
0.85
0.8


A
A
–
2
–
s
–
4
–
s
–
13
–
s
–
8
–
s
Turn-on Time 1
tON1
Turn-on Time 2
tON2
Turn-off Time 1
tOFF1
Turn-off Time 2
tOFF2
Source–Drain Voltage Difference
VPDSD
VIN=0V, IDR=0.2A
–
0.95
1.25
V
FLT Pin Low Level Output Voltage
VLFLT
IFLT=500A
–
0.25
0.5
V
FLT Pin Leak Current at OFF State
IOLEAKFLT
VFLT=5.5V
–
–
1
A
FLT delay Time at OCP Detection
FLT delay Time at OCP Release
TdDFLT
TdRFLT
ID<ILIMITIDILIMIT
IDILIMITID<ILIMIT
–
–
0.85
0.3
–
–
ms
ms
 MEASUREMENT CIRCUIT
NJW4822
VIN
IN
DRAIN
FLT
RL
VDD
SOURCE
Fault
Ver.2015-06-22
-3-
NJW4822
 TRUTH TABLE
[A-version: Active-high]
Input Signal
Operating Condition
L
Normal
H
L
Over Current ILIMIT
H
L
Tj 150C
H
[B-version: Active-low]
Input Signal
Operating Condition
-4-
FLT Pin
Output Status
H
L
OFF
ON
H
H
OFF
ILIMIT
H
H
OFF
OFF
FLT Pin
Output Status
L
H
Normal
H
H
OFF
ON
L
H
Over Current ILIMIT
H
L
OFF
ILIMIT
L
H
Tj 150C
H
L
OFF
OFF
Ver.2015-06-22
NJW4822
 TIMING CHART
ON, OFF Switching Time (VIN=0 to 5V, VDS=13V, ID=0.2A)
90%
IN
10%
90%
DRAIN
10%
tON
tOFF
FLT delay at OCP detection and OCP release (VIN=0 to 5V, FLT=Pull-up)
[A-version: Active-high]
IN
ILIMIT
ID
Current limit
FLT
t dDFLT
t dRFLT
[B-version: Active-low]
IN
ILIMIT
ID
Current limit
FLT
t dDFLT
Ver.2015-06-22
t dRFLT
-5-
NJW4822
[A-version: Active-high]
High
Input Signal
Low
ON
Over Current
Protection
OFF
ON
Thermal Protection
OFF
Drain-Source
Voltage
VDD
VDSS_CL
0V
Inductive
load
ILIMIT
Drain Current
0A
High
Fault Signal
Low
Normal
-6-
Current limit
Thermal
shutdown
Active clamp
Ver.2015-06-22
NJW4822
[B-version: Active-low]
High
Input Signal
Low
ON
Over Current
Protection
OFF
ON
Thermal Protection
OFF
Drain-Source
Voltage
VDD
VDSS_CL
0V
Inductive
load
ILIMIT
Drain Current
0A
High
Fault Signal
Low
Normal
Ver.2015-06-22
Current limit
Thermal
shutdown
Active clamp
-7-
NJW4822
 TYPICAL APPLICATION
NJW4822
MCU
Load
FLT
DRAIN
IN
SOURCE
You should insert a pull-up resistor when you connect the FLT pin with other power supplies etc.
-8-
Ver.2015-06-22
NJW4822
 CHRACTERISTICS
Input Threshold Voltage
vs. Ambient Temperature
55
1
50
0.9
Input Threshold Voltage [V]
Drain-Source Clamp Voltage [V]
Drain-Source Clamp Voltage
vs. Ambient Temperature
45
40
35
30
25
20
15
10
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
5
0
0
-50
-25
0
25
50
75 100 125 150
Ambient Temperature [ºC]
-50
Input Current vs. Ambient Temperature
-25
0
25
50
75 100 125 150
Ambient Temperature [ºC]
Input Current vs. Ambient Temperature
(at Normal Operation)
250
(at OCP Operating)
400
VIN=3.3V
VIN=5.0V
VIN=3.3V
350
VIN=5.0V
Input Current [μA]
Input Current [μA]
200
150
100
300
250
200
150
100
50
50
0
0
-50
-25
0
25
50
75 100 125 150
Ambient Temperature [ºC]
-50
ON-state Resistance vs. Input Voltage
0
25
50
75 100 125 150
Ambient Temperature [ºC]
ON-state Resistance vs. Ambient Temperature
2.5
1.4
VIN=3.3V
VIN=5.0V
ON-state Resistance [Ω]
1.2
ON-state Resistance [Ω]
-25
1
0.8
0.6
0.4
2
1.5
1
0.5
0.2
0
0
0
Ver.2015-06-22
2
4
Input Voltage [V]
6
-50
-25
0
25
50
75 100 125 150
Ambient Temperature [ºC]
-9-
NJW4822
 CHARACTERISTICS
Over Current Protection vs. Input Voltage
0.6
Over Current Protection vs. Ambient Temperature
0.6
0.5
0.5
Over Current Protection [A]
Over Current Limit [A]
(Ta=25ºC)
0.4
0.3
0.2
0.1
0.4
0.3
0.2
0.1
VIN=3.3V
VIN=5.0V
0
0
0
1
2
3
4
Input Voltage [V]
5
-50
6
-25
0
25
50
75 100 125 150
Ambient Temperature [ºC]
Drain Current vs. Drain-Source Voltage
Drain Current vs. Drain-Source Voltage
(Zoom-up)
VIN=3.3V
0.6
0.6
0.5
0.5
Drain Current [A]
Drain Current [A]
VIN=3.3V
0.4
0.3
0.2
-40℃
25℃
125℃
0.1
0.4
0.3
0.2
0
0
0
10
20
30
Drain-Source Voltage [V]
40
0
0.6
0.6
0.5
0.5
Drain Current [A]
Drain Current [A]
2
3
4
Drain-Source Voltage [V]
5
(Zoom-up)
VIN=5.0V
VIN=5.0V
0.4
0.3
0.2
-40℃
25℃
125℃
0.1
1
Drain Current vs. Drain-Source Voltage
Drain Current vs. Drain-Source Voltage
0.4
0.3
0.2
-40℃
25℃
125℃
0.1
0
0
0
- 10 -
-40℃
25℃
125℃
0.1
10
20
30
Drain-Source Voltage [V]
40
0
1
2
3
4
Drain-Source Voltage [V]
5
Ver.2015-06-22
NJW4822
 CHARACTERISTICS
Turn-on Time vs. Ambient Temperature
Turn-off Time vs. Ambient Temperature
20
20
VIN=3.3V
VIN=5.0V
18
16
Turn-off Time [μs]
16
Turn-on Time [μs]
VIN=3.3V
VIN=5.0V
18
14
12
10
8
6
14
12
10
8
6
4
4
2
2
0
0
-50
-25
0
25
50
75 100 125 150
Ambient Temperature [ºC]
-50
-25
FLT delay Time at OCP Detection
vs. Ambient Temperature
FLT delay Time at OCP Release
vs. Ambient Temperature
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
VIN=3.3V
VIN=5.0V
0.1
FLT delay Time at OCP Release [ms]
FLT delay Time at OCP Detection
[ms]
1
0
VIN=3.3V
VIN=5.0V
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50
-25
0
25
50
75 100 125 150
Ambient Temperature [ºC]
-50
-25
0
25
50
75 100 125 150
Ambient Temperature [ºC]
TSD Detection/Release Temperature
vs. Input Voltage
FLT Pin Low Level Output Voltage
vs. Ambient Temperature
200
TSD Detection/Release Temperature
[ºC]
0.3
FLT Pin Low Level Output Voltage
[V]
0
25
50
75 100 125 150
Ambient Temperature [ºC]
0.25
0.2
0.15
0.1
0.05
Detection Temp
180
160
140
Release Temp
120
100
80
60
40
20
0
0
-50
Ver.2015-06-22
-25
0
25
50
75 100 125 150
Ambient Temperature [ºC]
2
2.5
3
3.5
4
4.5
5
Input Voltage [V]
5.5
6
- 11 -
Application Tips
NJW4822
Technical Information
 Regarding Active Clamp Capacity of High/Low side Switch Products
 What is “Active Clamp Capacity”.
The IC might suffer to damage by the inductive kickback at the transient time of ON state to OFF state, when an
inductive load such as a solenoid or motor is used for the load of the high-side/low-side switch.
The protection circuit for the inductive kickback is the active clamp circuit. The energy that can be tolerated by the
active clamp circuit is called "Active Clamp Capacity (EAS)".
When using an inductive load to the high-side/low-side switch, you should design so that the ESW does not exceed the
active clamp capability.
 IC operation without an external protection parts (Fig 1)
Active Clamp
Current IAP
tA
ID
Active Clamp Period
VDS
Active Clamp
Current IAP
ID
VDD
0V
Time
Drain-Source Clamp Voltage
V DSS_CL
Drain-Source Clamp Voltage
V DSS_CL
VDS
VDD
0V
VIN
Time
5V
VIN
0V
tA Active Clamp Period
5V
0V
tON
tON
Fig1. Active Clamp Waveform (Left: Low-side Switch / Light High-side Switch)
At when the VIN turns off, the drain-source voltage (VDS) increases rapidly by the behavior of the inductive load that is
keeping current flowing. However, it will be clamped at VDSS_CL by the active clamp circuit. At the same time, the drain
current is flowed by adjusting the gate voltage of the output transistor, and the energy is dissipated at the output transistor.
The energy: ESW is shown by the following formula.
tA
E SW   VDS (t )  I D (t ) dt =
0
VDSS _ CL
1
2
LI AP 
2
VDSS _ CL  VDD
The ESW is consumed inside IC as heat energy. However, the thermal shutdown does not work when the VIN is 0V.
Therefore in worst case the IC might break down. When using the active clamp, you should design ESW does not
exceed the EAS.
- 12 -
Ver.2015-06-22
Application
Tips
NJW4822
Technical Information
 Application Hint
The simplest protection example is to add an external flywheel diode at the load to protect IC from an inductive
kickback. (Fig.2)
Flywheeling Diode
ID
VDD
V DS
VDD
VIN
DRAIN
SOURCE
VDD
OUT
VIN
V DS
ID
GND
Flywheeling Diode
Fig 2. Application Circuit of Inductance Load Driving (Left: Low-side Switch / Light High-side Switch)
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including the
industrial rights.
Ver.2015-06-22
- 13 -
NJW4822
 PACKAGE OUT LINE
GD-N00602A-0
UNIT: mm
- 14 -
Ver.2015-06-22