RENESAS HD74AC153RPEL

HD74AC153
Dual 4-Input Multiplexer
REJ03D0251–0200Z
(Previous ADE-205-370 (Z))
Rev.2.00
Jul.16.2004
Description
The HD74AC153 is a high-speed dual 4-input multiplexer with common select inputs and individual enable inputs for
each section. It can select two lines of data from four sources. The two buffered outputs present data in the true
(noninverted) form. In addition to multiplexer operation, the HD74AC153 can act as a function generator and generate
any two functions of three variables.
Features
• Outputs Source/Sink 24 mA
• Ordering Information
Part Name
Package Type
Package Code Package Abbreviation Taping Abbreviation (Quantity)
HD74AC153FPEL
SOP-16 pin (JEITA)
FP-16DAV
FP
EL (2,000 pcs/reel)
HD74AC153RPEL
SOP-16 pin (JEDEC) FP-16DNV
RP
EL (2,500 pcs/reel)
Notes: 1. Please consult the sales office for the above package availability.
2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of
the package code.
Pin Arrangement
Ea 1
16 VCC
S1 2
15 Eb
I3a 3
14 S0
I2a 4
13 I3b
I1a 5
12 I2b
I0a 6
11 I1b
Za 7
10 I0b
GND 8
9 Zb
(Top view)
Rev.2.00, Jul.16.2004, page 1 of 6
HD74AC153
Logic Symbol
Ea I0a I1a I2a I3a I0b I1b I2b I3b Eb
S0
S1
Za
Zb
Pin Names
I0a to I3a
I0b to I3b
S0, S1
Ea
Eb
Za
Zb
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Enable Input
Side B Enable Input
Side A Output
Side B Output
Functional Description
The HD74AC153 is a dual 4-input multiplexer. It can select two bits of data from up to four sources under the control
of the common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active-Low Enables (Ea, Eb)
which can be used to strobe the outputs independently. When the Enables (Ea, Eb) are High, the corresponding outputs
(Za, Zb) are forced Low. The HD74AC153 is the logic implementation of a 2-pole, 4-position switch, where the
position of the switch is determined by the logic levels supplied to the two Select inputs. The logic equations for the
outputs are shown below.
Za = Ea•(I0a•S1•S0 + I1a•S1•S0 + I2a•S1•S0 + I3a•S1•S0)
Zb = Eb•(I0b•S1•S0 + I1b•S1•S0 + I2b•S1•S0 + I3b•S1•S0)
Truth Table
Select Inputs
S0
S1
E
I0
Input (a or b)
I1
I2
Output
Z
I3
X
L
X
L
H
L
X
L
X
X
X
X
X
X
L
L
L
H
L
L
L
L
H
X
X
L
X
X
X
X
H
L
H
L
L
H
L
L
X
X
H
X
X
L
X
X
H
L
L
H
H
H
L
L
X
X
X
X
H
X
X
L
H
L
H
L
High Voltage Level
Low Voltage Level
Immaterial
X
X
X
H
H
H
H :
L :
X :
Rev.2.00, Jul.16.2004, page 2 of 6
HD74AC153
Logic Diagram
Ea I0a
I1a
I2a
I3a
S1
S0
I0b
I1b
I2b
Za
I3b Eb
Zb
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays.
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Condition
Supply voltage
DC input diode current
VCC
IIK
–0.5 to 7
–20
V
mA
VI
20
–0.5 to Vcc+0.5
mA
V
VI = Vcc+0.5V
DC input voltage
DC output diode current
IOK
–50
50
mA
mA
VO = –0.5V
VO = Vcc+0.5V
DC output voltage
DC output source or sink current
VO
IO
–0.5 to Vcc+0.5
±50
V
mA
DC VCC or ground current per output pin
Storage temperature
ICC, IGND
Tstg
±50
–65 to +150
mA
°C
VI = –0.5V
Recommended Operating Conditions
Item
Symbol
Ratings
Unit
Supply voltage
VCC
2 to 6
V
Input and output voltage
Operating temperature
VI, VO
Ta
0 to VCC
–40 to +85
V
°C
Input rise and fall time
(except Schmitt inputs)
VIN 30% to 70% VCC
tr, tf
8
ns/V
Rev.2.00, Jul.16.2004, page 3 of 6
Condition
VCC = 3.0V
VCC = 4.5 V
VCC = 5.5 V
HD74AC153
DC Characteristics
Item
Input Voltage
Symbol
VIH
VIL
Output voltage
VOH
VOL
Ta = 25°°C
Vcc
(V)
3.0
min.
2.1
typ.
1.5
max.
—
Ta = –40 to
+85°°C
min.
max.
2.1
—
4.5
5.5
3.15
3.85
2.25
2.75
—
—
3.15
3.85
—
—
3.0
4.5
—
—
1.50
2.25
0.9
1.35
—
—
0.9
1.35
5.5
3.0
—
2.9
2.75
2.99
1.65
—
—
2.9
1.65
—
4.5
5.5
4.4
5.4
4.49
5.49
—
—
4.4
5.4
—
—
3.0
4.5
2.58
3.94
—
—
—
—
2.48
3.80
—
—
5.5
3.0
4.94
—
—
0.002
—
0.1
4.80
—
—
0.1
4.5
5.5
—
—
0.001
0.001
0.1
0.1
—
—
0.1
0.1
3.0
4.5
—
—
—
—
0.32
0.32
—
—
0.37
0.37
Unit
V
Condition
VOUT = 0.1 V or VCC –0.1 V
VOUT = 0.1 V or VCC –0.1 V
V
VIN = VIL or VIH
IOUT = –50 µA
VIN = VIL or VIH
IOH = –12 mA
IOH = –24 mA
IOH = –24 mA
VIN = VIL or VIH
IOUT = 50 µA
VIN = VIL or VIH
IOL = 12 mA
IOL = 24 mA
Input leakage
current
IIN
5.5
5.5
—
—
—
—
0.32
±0.1
—
—
0.37
±1.0
µA
VIN = VCC or GND
IOL = 24 mA
Dynamic output
current*
IOLD
IOHD
5.5
5.5
—
—
—
—
—
—
86
–75
—
—
mA
mA
VOLD = 1.1 V
VOHD = 3.85 V
Quiescent supply
current
ICC
5.5
—
—
8.0
—
80
µA
VIN = VCC or ground
*Maximum test duration 2.0 ms, one output loaded at a time.
AC Characteristics: HD74AC153
Item
Symbol
VCC (V)*1
Ta = +25°C
CL = 50 pF
Min
Typ
Max
Ta = –40°C to +85°C
CL = 50 pF
Min
Max
Unit
Propagation delay
Sn to Zn
tPLH
3.3
5.0
1.0
1.0
9.5
6.5
15.0
11.0
1.0
1.0
17.5
12.5
ns
Propagation delay
Sn to Zn
tPHL
3.3
5.0
1.0
1.0
8.5
6.5
14.5
11.0
1.0
1.0
16.5
12.0
ns
Propagation delay
En to Zn
tPLH
3.3
5.0
1.0
1.0
8.0
5.5
13.5
9.5
1.0
1.0
16.0
11.0
ns
Propagation delay
En to Zn
tPHL
3.3
5.0
1.0
1.0
7.0
5.0
11.0
8.0
1.0
1.0
12.5
9.0
ns
Propagation delay
In to Zn
tPLH
3.3
5.0
1.0
1.0
7.5
5.5
12.5
9.0
1.0
1.0
14.5
10.5
ns
Propagation delay
In to Zn
tPHL
3.3
5.0
1.0
1.0
7.0
5.0
11.5
8.5
1.0
1.0
13.0
10.0
ns
Note:
1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Rev.2.00, Jul.16.2004, page 4 of 6
HD74AC153
Capacitance
Item
Input capacitance
Power dissipation capacitance
Rev.2.00, Jul.16.2004, page 5 of 6
Symbol
CIN
CPD
Typ
4.5
65.0
Unit
pF
pF
Condition
VCC = 5.5 V
VCC = 5.0 V
HD74AC153
Package Dimensions
As of January, 2003
Unit: mm
10.06
10.5 Max
9
1
8
1.27
*0.40 ± 0.06
0.20
7.80 +– 0.30
1.15
0 ˚ – 8˚
0.10 ± 0.10
0.80 Max
*0.20 ± 0.05
2.20 Max
5.5
16
0.70 ± 0.20
0.15
0.12 M
Package Code
JEDEC
JEITA
Mass (reference value)
*Ni/Pd/Au plating
FP-16DAV
—
Conforms
0.24 g
As of January, 2003
Unit: mm
9.9
10.3 Max
9
1
8
0.635 Max
*0.40 ± 0.06
0.15
*0.20 ± 0.05
1.27
0.11
0.14 +– 0.04
1.75 Max
3.95
16
0.10
6.10 +– 0.30
1.08
0˚ – 8˚
+ 0.67
0.60 – 0.20
0.25 M
*Ni/Pd/Au plating
Rev.2.00, Jul.16.2004, page 6 of 6
Package Code
JEDEC
JEITA
Mass (reference value)
FP-16DNV
Conforms
Conforms
0.15 g
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Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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