EM78P156EL

EM78P156EL
8-Bit Microcontroller
with OTP ROM
Product
Specification
DOC. VERSION 1.3
ELAN MICROELECTRONICS CORP.
July 2004
Trademark Acknowledgments:
IBM is a registered trademark and PS/2 is a trademark of IBM.
Windows is a trademark of Microsoft Corporation.
ELAN and ELAN logo
are trademarks of ELAN Microelectronics Corporation.
Copyright © 2005 by ELAN Microelectronics Corporation
All Rights Reserved
Printed in Taiwan
The contents of this specification are subject to change without further notice. ELAN Microelectronics assumes no
responsibility concerning the accuracy, adequacy, or completeness of this specification. ELAN Microelectronics makes
no commitment to update, or to keep current the information and material contained in this specification. Such
information and material may change to conform to each confirmed order.
In no event shall ELAN Microelectronics be made responsible for any claims attributed to errors, omissions, or other
inaccuracies in the information or material contained in this specification. ELAN Microelectronics shall not be liable for
direct, indirect, special incidental, or consequential damages arising from the use of such information or material.
The software (if any) described in this specification is furnished under a license or nondisclosure agreement, and may be
used or copied only in accordance with the terms of such agreement.
ELAN Microelectronics products are not intended for use in life support appliances, devices, or systems. Use of ELAN
Microelectronics product in such applications is not supported and is prohibited.
NO PART OF THIS SPECIFICATION MAY BE REPRODUCED OR TRANSMITTED IN ANY FORM OR BY ANY
MEANS WITHOUT THE EXPRESS WRITTEN PERMISSION OF ELAN MICROELECTRONICS.
ELAN MICROELECTRONICS CORPORATION
Headquarters:
Hong Kong:
USA:
No. 12, Innovation Road 1
Hsinchu Science Park
Hsinchu, Taiwan 30077
Tel: +886 3 563-9977
Fax: +886 3 563-9966
http://www.emc.com.tw
Elan (HK) Microelectronics
Corporation, Ltd.
Elan Information Technology
Group
Rm. 1005B, 10/F Empire Centre
68 Mody Road, Tsimshatsui
Kowloon , HONG KONG
Tel: +852 2723-3376
Fax: +852 2723-7780
elanhk@emc.com.hk
1821 Saratoga Ave., Suite 250
Saratoga, CA 95070
USA
Tel: +1 408 366-8223
Fax: +1 408 366-8220
Europe:
Shenzhen:
Shanghai:
Elan Microelectronics Corp.
(Europe)
Elan Microelectronics
Shenzhen, Ltd.
Elan Microelectronics
Shanghai Corporation, Ltd.
Siewerdtstrasse 105
8050 Zurich, SWITZERLAND
Tel: +41 43 299-4060
Fax: +41 43 299-4079
http://www.elan-europe.com
SSMEC Bldg., 3F, Gaoxin S. Ave.
Shenzhen Hi-Tech Industrial Park
Shenzhen, Guandong, CHINA
Tel: +86 755 2601-0565
Fax: +86 755 2601-0500
23/Bldg. #115 Lane 572, Bibo Road
Zhangjiang Hi-Tech Park
Shanghai, CHINA
Tel: +86 021 5080-3866
Fax: +86 021 5080-4600
Contents
Contents
1
................................................................................................................................ 1
2
................................................................................................................................ 1
3
................................................................................................................................ 2
4
................................................................................................................................ 4
4.1
................................................................................................................... 5
4.1.1
R0 (
) ..................................................................................................... 5
4.1.2
R1 ( 时
4.1.3
R2 (
4.1.4
R3 (状态
4.1.5
R4 (RAM 选择
4.1.6
4.1.7
R5 ~ R6 (Port 5 ~ Port 6)............................................................................................... 7
RF ( 断状态
) ..................................................................................................... 7
4.1.8
R10 ~ R3F ..................................................................................................................... 8
/计数 ) ....................................................................................................... 5
计数 )
栈.................................................................................................. 5
)............................................................................................................. 7
4.2
).................................................................................................... 7
............................................................................................................ 8
4.2.1
A (累
4.2.2
CONT (
4.2.3
IOC5 ~ IOC6 (I/O
4.2.4
IOCA (预 频
4.2.5
IOCB ( 拉
4.2.6
IOCC (漏
4.2.7
IOCD ( 拉
) ............................................................................................... 10
4.2.8
IOCE (WDT
) ..............................................................................................11
4.2.9
IOCF ( 断
) ................................................................................................11
4.3
TCC/WDT
4.4
I/O
预
)................................................................................... 9
) .......................................................................................... 9
) ................................................................................................. 9
开路
频
)........................................................................................ 10
................................................................................................ 12
................................................................................................................. 16
4.5.1
4.5.2
) ....................................................................................................... 8
...................................................................................................................... 13
唤
4.5
) ...................................................................................................................... 8
.............................................................................................................................. 16
状态
RST, T,
P
状态 .................................................................................. 20
4.6
断 ............................................................................................................................ 21
4.7
荡
........................................................................................................................ 22
4.7.1
4.10
................................................................................................................... 22
4.7.2
荡
4.7.3
RC
码选择
4.8
4.9
荡
关
/
荡
荡
(XTAL) ................................................................................... 23
.................................................................................................... 24
.......................................................................................................... 25
问题 .......................................................................................................... 26
路 ...................................................................................................... 27
Product Specification (V1.3) 07.29.2004
• iii
Contents
4.11 残
压
令
4.12
4.13 时
5
.............................................................................................................. 27
........................................................................................................................ 28
图 ........................................................................................................................ 31
绝对
围 ...................................................................................................................... 32
6
.............................................................................................................................. 32
6.1
流
DC
................................................................................................. 32
6.2
流
AC
................................................................................................. 33
6.3
IC
........................................................................................................................ 34
录
A
: ............................................................................................................................ 44
B
.............................................................................................................................. 44
Specification Revision History
Doc. Version
1.0
Initial version
1.1
Change set up time period
1.2
1.3
iv •
Revision Description
Change Power on reset content
Change ISB1 & ICC3 current range
Add the Device Characteristic at section 6.3
Date
04/19/2002
07/01/2003
07/29/2004
Product Specification (V1.3) 07.29.2004
EM78P156EL
OTP ROM
1
EM78P156EL
编
计开
CMOS
ROM (OTP-ROM)
OTP-ROM
6
选择
单
内
1K 13
满
读
EM78P156EL 便
OTP-ROM
EMC Writer将
8
开
验
码写
2
压
围
2.3V~5.5V
度
围
0°C~70°C
频率
围(
•
• ERC
2
DC~20MHz
5V
DC~8MHz
3V
DC~4MHz
2.3V
DC~4MHz
5V
DC~4MHz
3V
DC~4MHz
2.3V
• 5V/4MHz
• 3V/32KHz
•
1K × 13
clocks )
流
2.0 mA
为15 µA
流
为1 µA
流
内ROM
证
不
读
满
内
48× 8
2组
(SRAM
I/O
5级
栈
8
时
令
省
时
/计数
为2
(SLEEP
(TCC)
软
选择
断
时
)
断
3
• TCC
断
•
状态
•
断
编
8
)
行
编
断(
时
唤
)
WDT
拉I/O
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
•1
EM78P156EL
OTP ROM
7
编
8
编
漏
2
编
R-option
•
•
•
•
拉I/O
开路I/O
I/O
18
DIP 300mil
18
SOP 300mil
20
SSOP 209mil
EM78P156ELAS
20
SSOP 209mil
EM78P156ELKM
令为单
99.9%
EM78P156ELP
EM78P156ELM
令
频率
为400KHz
3
NC
18
P51
P53
2
17
P50
TCC
3
16
OSCI
/RESET
4
15
OSCO
Vss
5
14
VDD
P60/INT
6
13
P67
P61
7
12
P66
P62
8
11
P65
P63
9
10
P64
P52
1
20
NC
P52
2
19
P51
P53
3
18
P50
EM78P156ELAS
1
EM78P156ELP
EM78P156ELM
P52
TCC
4
/RESET
5
Vss
6
P60/INT
7
P61
8
P62
9
12
P65
P63
10
11
P64
1
20
P51
P50
2
19
3
18
OSCI
/RESET
4
17
OSCO
16
VDD
15
VDD
14
P67
EM78P156ELKM
P53
TCC
Vss
5
Vss
6
P60/INT
7
P61
8
13
P66
P62
9
12
P65
P63
10
11
P64
17
OSCI
16
OSCO
15
VDD
14
P67
13
P66
图1
2•
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
1 EM78P156ELP
Symbol
EM78P156ELM
Pin No. Type
Function
VDD
14
-
*
OSCI
16
I
* XTAL
* ERC
OSCO
15
I/O
* XTAL
* RC
*
时
TCC
3
I
/RESET
4
I
P50~P53
17, 18,
1, 2
I/O
P60~P67
6~13
I/O
/INT
6
I
*
VSS
5
-
*
*
时
荡
RC
时
令时
时 时计数
VSS 连
不
时
须
若该
*
VDD
将
状态
* P50~P53
* P50
P51
* P50~P52
* P60~P67
*都
软
* P60~P63
I/O
为 R-option
为 拉
软
I/O
为 拉 漏 开路
软
为 拉
断
降
2 EM78P156ELAS
Symbol
Pin No. Type
Function
VDD
15
-
*
OSCI
17
I
* XTAL
* ERC
OSCO
16
I/O
* XTAL
* RC
*
时
TCC
4
I
/RESET
5
I
P50~P53
18, 19,
I/O
2, 3
P60~P67
7~14
I/O
/INT
VSS
7
6
I
-
*
时
荡
RC
时
令时
时 时计数
r VSS 连
不 时
若该
*
须
VDD
将
状态
* P50~P53
* P50
P51
* P50~P52
* P60~P67
*都
软
* P60~P63
*
断
I/O
为 R-option
为 拉
软
I/O
为 拉 漏 开路
软
为 拉
降
*
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
•3
EM78P156EL
OTP ROM
3 EM78P156ELKM Pin Description
Symbol
Pin No. Type
VDD
15,16
-
OSCI
18
I
OSCO
17
I/O
TCC
3
I
/RESET
4
I
P50~P53
19,
20, 1,
2
I/O
P60~P67
7~14
I/O
/INT
VSS
7
5, 6
I
-
Function
*
* XTAL
* ERC
RC 荡
* XTAL
* RC
令时
*
时
* 时 时计数
VSS 连
*
状态
* P50~P53
I/O
* P50
P51
* P50~P52
软
* P60~P67
I/O
*都
软
为 拉
* P60~P63
软
*
断
时
时
不
时
须
若该
VDD
将
为 R-option
为 拉
漏 开路
为 拉
降
*
4
OSCO
/RESET
OSCI
WDT timer
TCC
/INT
Oscillator/Timing
Control
ROM
Prescaler
R2
Stack
IOCA
Interrupt
Controller
RAM
R4
ALU
Instruction
Register
R3
R1(TCC)
Instruction
Decoder
ACC
DATA & CONTROL BUS
IOC6
R6
I/O
PORT 6
P60//INT
P61
P62
P63
P64
P65
P66
P67
图2
4•
IOC5
R5
I/O
PORT 5
P50
P51
P52
P53
图
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
4.1
4.1.1 R0 (
)
为
R0
对RAM选择
R4
时
/计数
4.1.2 R1 (
数
寻
针
令
R0
进行
)
TCC
令
CONT-4 TE
时
1
读写
过
PAB(CONT-3)来
PAB
零
(CONT-3)
当给TCC
4.1.3 R2 (
赋
时
将预
预
计数 )
栈为10
获
载R2 10
"CALL" 令 载PC
内
宽
请零
图3
对应
许
"MOV R2, A"
零 .
对R2进行
PC
9
A
JMP 令
将PC+1
10
"RET" ("RETL k", "RETI")
R2
内
计数
结
图
令编码
零
"JMP" 令
了
频计数
内OTP ROM
R2
"ADD R2, A"
给TCC
栈
R2
产 1024×13
1024
频
令将栈顶
内
当
许将A
内
令
10
令
零
2
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
令
数
PC
时PC
PC
内
栈
载
PC
载
转 围
8
9
零
10
时PC
9
10
"ADD R2,A", "MOV R2,A", "BC R2,6",⋅⋅⋅⋅⋅
产
转
256
令
都
令
•5
EM78P156EL
OTP ROM
Reset Vector
Interrupt Vector
PC (A9 ~ A0)
Stack Level 1
Stack Level 2
Stack Level 3
Stack Level 4
Stack Level 5
图3
Address
User Memory
Space
On-chip Program
Memory
计数 结 图
R PAGE registers
IOC PAGE registers
00
R0
(IAR)
01
R1
(TCC)
Reserve
02
R2
(PC)
Reserve
03
R3
(Status)
Reserve
04
R4
(RSR)
Reserve
05
R5
(Port5)
IOC5
(I/O Port Control Register)
06
R6
(Port6)
IOC6
(I/O Port Control Register)
CONT
(Control Register)
07
Reserve
Reserve
08
Reserve
Reserve
09
Reserve
0A
Reserve
IOCA
(Prescaler Control Register)
Reserve
0B
Reserve
IOCB
(Pull-down Register)
0C
Reserve
IOCC
(Open-drain Control)
0D
Reserve
IOCD
(Pull-high Control Register)
0E
Reserve
IOCE
(WDT Control Register)
IOCF
(Interrupt Mask Register)
0F
RF
(Interrupt Status)
10
General Registers
3F
图4数
6•
储结 图
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
4.1.4 R3 (状态
)
7
6
5
4
3
2
1
0
GP2
GP1
GP0
T
P
Z
DC
C
0
(C) 进
1
(DC) 辅
2
(Z) 零标
当
术
3
标
进
标
逻辑
结
为0时
该
1
(P)
执行 "WDTC"
令
该
"WDTC"
令
执行 "SLEP"
1
令
该
零
(T) 时
4
执行 "SLEP"
5 ~7
该
4.1.5 R4 (RAM 选择
寻
6~7
(
6~7
为1
零
)
选择
(
00~06
0F~3F)
读)
当R4 内 为“3F”时 R3 零标
R0
图4 数
时
读写
(GP0 ~ 2)
0~5
当 WDT
1
储结
将
1 当 R4=R4+1 R4
内
将 选择
为
图
4.1.6 R5 ~ R6 (Port 5 ~ Port 6)
R5
R6
R5
/
4
4.1.7 RF (
)
7
6
5
4
3
2
1
0
-
-
-
-
-
EXIF
ICIF
TCIF
断
“1”
0
断状态
请
(ICIF) P6
2
(EXIF)
断
断标
(TCIF) TCC
1
没
“0”
当 TCC
状态
断标
断标
/INT
时
1
软
P6
零
1
降
1
软
软
零
零
3~7
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
•7
EM78P156EL
OTP ROM
过
RF
令
零
不
1
断
IOCF
读
RF
RF
IOCF逻辑
结
4.1.8 R10 ~ R3F
8
4.2
4.2.1 A (累
内
不
数
)
传
令
寻
4.2.2 CONT (
)
7
6
5
4
3
2
1
0
-
/INT
TS
TE
PAB
PSR2
PSR1
PSR0
0
~
2
TCC/WDT 预
(PSR0~ PSR2)
频
.
PSR2
PSR1
PSR0
TCC Rate
WDT Rate
0
0
0
1:2
1:1
0
0
1
1:4
1:2
0
1
0
1:8
1:4
0
1
1
1:16
1:8
1
0
0
1:32
1:16
1
0
1
1:64
1:32
1
1
0
1:128
1:64
1
1
1
1:256
1:128
3
4
5
8•
数
(PAB) 预
频
.
0
预
频
给TCC
1
预
频
给WDT
选择
(TE) TCC
0
当TCC
时R1
1
1
当TCC
时R1
1
选择
(TS) TCC
0
内
1
TCC
令
时
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
6
断
(/INT)
许标
令
0
DISI
1
ENI/RETI
断
令
许
断
7
读写
CONT
4.2.3 IOC5 ~ IOC6 (I/O
"1"
关 I/O
IOC5仅
4
IOC5
)
为
状态
都
IOC6
4.2.4 IOCA (预
读
关 I/O
"0"
为
写
频
)
读
IOCA
预
IOCA
频计数
内
计数
拉
4.2.5 IOCB (
)
7
6
5
4
3
2
1
0
/PD7
/PD6
/PD5
/PD4
-
/PD2
/PD1
/PD0
0
(/PD0)
P50
为
0
内
拉
1
内
拉
拉状态
1
(/PD1)
P51
为
拉状态
2
(/PD2)
P52
为
拉状态
3
4
Bit 4 (/PD4)
P60
为
拉状态
5
Bit 5 (/PD5)
P61
为
拉状态
6
Bit 6 (/PD6)
P62
为
拉状态
7
Bit 7 (/PD7)
P63
为
拉状态
IOCB
读
写
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
•9
EM78P156EL
OTP ROM
4.2.6 IOCC (漏
)
7
6
5
4
3
2
1
0
OD7
OD6
OD5
OD4
OD3
OD2
OD1
OD0
0
(OD0)
为漏
P60
0
漏
开路
1
漏
开路
开路状态
1
(OD1)
P61
为漏
开路状态
2
(OD2)
P62
为漏
开路状态
3
(OD3)
P63
为漏
开路状态
4
(OD4)
P64
为漏
开路状态
5
(OD5)
P65
为漏
开路状态
6
(OD6)
P66
为漏
开路状态
7
(OD7)
P67
为漏
开路状态
读
IOCC
写
拉
4.2.7 IOCD (
)
7
6
5
4
3
2
1
0
/PH7
/PH6
/PH5
/PH4
/PH3
/PH2
/PH1
/PH0
0
(/PH0)
P60
为
0
内
拉
1
内
拉
拉状态
1
(/PH1)
P61
为
拉状态
2
(/PH2)
P62
为
拉状态
3
(/PH3)
P63
为
拉状态
4
(/PH4)
P64
为
拉状态
5
(/PH5)
P65
为
拉状态
6
(/PH6)
P66
为
拉状态
7
(/PH7)
P67
为
拉状态
IOCD
10 •
开路
读
写
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
4.2.8 IOCE (WDT
)
7
6
5
4
3
2
1
0
WDTE
EIS
-
ROC
-
-
-
-
7
(WDTE) WDT
6
0
WDT.
1
WDT.
WDTE
读
写
(EIS) P60 (/INT)
0
P60
I/O
1
/INT
须 1
断
当 EIS 为0时
R6 读
4
(ROC) ROC
这
/INT
图7(a)
P60
I/O
当EIS为1时, /INT
(IOC6
0
状态
)
P6
R-option
ROC 为1
R-option
P50∼P51 状态
读
ROC 零
R-option
R-option
须 P51
/ P50
过
430KΩ
r (Rex) VSS 连 若Rex
/
读 P50 (P51) 状态 0/1
图8
0~3,5
4.2.9 IOCF (
0
1
2
断
)
7
6
5
4
3
2
1
0
-
-
-
-
-
EXIE
ICIE
TCIE
断
(TCIE) TCIF
0
TCIF
断
1
TCIF
断
(ICIE) ICIF
断
0
ICIF
断
1
ICIF
断
(EXIE) EXIF
断
0
EXIF
断
1
EXIF
断
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
• 11
EM78P156EL
OTP ROM
3~7
过IOCF
断
关
ENI
关
1
令
断
令
DISI
图10
读写
IOCF
预
4.3 TCC/WDT
频
TCC WDT
8 计数
预 频
CONT
PAB
PSR0~PSR2
TCC
将预 频
0 若
给WDT
SLEP 令时 0 图5 详细
了TCC/WDT
TCC 时
内 时
5
令
2 还 4 时
CLK=Fosc/2 CLK=1 则CLK=Fosc/4
降 TCC 1
R1(TCC)为8
时
选择
时
频 数 若
则WDT 预 频
路
行
WDT
行
时
软
约为18ms1
为内 时
时
令
TCC 1
预
码选择
CLKS
时
则TCC
/计数
内RC
荡
当 荡驱
WDT
将
IOCE WDTE 来
认
0
1
TCC
频
图
CLK=0 则
关闭
若WDT
没 预 频
WDT
WDT
WDT
D a ta B u s
C L K (= F o sc/2 o r F o sc/4 )
TCC
P in
给
这
给TCC 则
写
执行WDTC
1
M
U
X
0
M
U
X
SYNC
2 cy cles
TE
TS
T C C (R 1 )
T C C o v erflo w in te rru p t
PA B
0
W DT
1
W TE
(in IO C E )
M
U
X
8 -b it C o u n te r
PA B
M
U
X
IO C A
PAB
8 -to -1 M U X
PSR 0~PSR 2
0
In itia l
v a lu e
1
M UX
PAB
W D T tim e-o u t
图 5 TCC
1
12 •
Vdd = 5V
Vdd = 3V
WDT
图
时 = 16.8ms ± 30%
时 = 18ms ± 30%
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
4.4 I/O
I/O
PORT5 PORT6 为
态I/O
PORT6
软
为内
拉 漏
开路
P6
状态
断
唤
P50~P52 P60~P63
软
为 拉
I/O
I/O
IOC5~IOC6
为
P50 P51 为R-OPTION
IOCE
ROC
1
R-OPTION
时, 议将P50 P51 为
R-OPTION
状态
P50~P51 须 为
R-Option
Rex
应
虑 降
I/O
6 图 7(a)
I/O
7(b)
都
读 写
PORT5
PORT6 I/O
路
图
图8
PCRD
Q
_
Q
PORT
P
R
C
L
Q
P
R
_
Q
C
L
D
PCWR
CLK
IOD
D
PDWR
CLK
PDRD
0
1
M
U
X
拉
图
I/O
图 6 PORT5 I/O
路
PCRD
Q P
R D
_ CLK
Q C
L
PCW R
Q P
R D
_ CLK
Q C
L
PDW R
P 6 0 /I N T
PORT
B it 6 o f I O C E
P
R
CLK
C
L
D
0
Q
1
_
Q
IO D
M
U
X
T 10
PDRD
P
R
CLK
C
L
D
Q
_
Q
IN T
拉
拉
图 7(a) P60 (/INT)I/O
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
漏
开路
I/O
图
路
• 13
EM78P156EL
OTP ROM
PCRD
P61~P67
PORT
0
1
Q
_
Q
P
R D
CLK
C
L
PCWR
Q
_
Q
P
R D
CLK
C
L
PDWR
IOD
M
U
X
TIN
PDRD
P
R
CLK
C
L
D
拉
拉
Q
_
Q
漏
开路
I/O
图 7(b) P61~P67 I/O
图
路
IOCE.1
D
P
R
Q
Interrupt
CLK
_
C Q
L
RE.1
ENI Instruction
P
D R Q
T10
T11
P
Q R
D
CLK
_
C
L Q
CLK
_
Q C
L
T17
DISI Instruction
Interrupt
(Wake-up from SLEEP)
/SLEP
Next Instruction
(Wake-up from SLEEP)
图 7(c) 带
14 •
转换 断/唤
P6
图
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
转换
4 P6
断/唤
状态
PORT6
唤
(I) PORT6
唤
(a)
SLEEP
1.
WDT2 (应
)
2. 读I/O Port 6 (MOV R6,R6)
3. 执行 "ENI" or "DISI"
4.
断(Set IOCF.1)
5. 执行"SLEP" 令
(b) 唤
Wake-up
1. 若"ENI" → 断 量
(008H)
2. 若"DISI" → 执行
令
/
断
(II) Port 6
状态
断
1. 读I/O Port 6 (MOV R6,R6)
2. 执行"ENI"
3.
断(Set IOCF.1)
4. 若PORT 6状态
(产
断)
→ 断 量
(008H)
PCRD
ROC
VCC
Q
P
R
Q
C
L
Q
P
R
Q
C
L
Weakly
Pull-up
PORT
D
CLK
PCWR
IOD
D
PDWR
PDRD
0
1
Rex*
M
U
X
*The Rex is 430K ohm external resistor
图8
2
P6
码选择
R-option(P50,P51)
转 唤
11
软
(ENWDTB) 1
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
I/O
路
WDT (watchdog timer)
须
(
• 15
EM78P156EL
OTP ROM
唤
4.5
4.5.1
列
(1)
(2) /RESET
若
(3) WDT
检测
将 执行
单
荡
继续
单
状态18ms3 ( 荡
列
荡
为0
PC
为
I/O
预
WDT
时
R3
频
状态
0
3
0
INT 标
CONT
6
IOCA
为1
IOCB
为1
IOCC
为1
IOCE
RF
为1
0
IOCD
7
1
IOCF
4
0~2
6
0
0
执行SLEP 令 进
继续
时 )
图9
行
进
单
时 WDT 若
0
唤
(1) /RESET
(2) WDT
(3) P6
Vdd = 5V
Vdd = 3V
16 •
(若
状态
)
(若
)
唤
EM78P156EL
继续执行
断 量
时
时
= 16.8ms ± 30%
= 18ms ± 30%
T P
唤
来
断 执行 ENI
DISI
唤
SLEP 令执行 执行ENI 令 唤
R3
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
将
将
0X08H
SLEP 令
进
状态
[a]
2
断 理
令开 执行
SLEP
1
执行SLEP
令
执行DISI 令
唤
3
状态
PORT6
WDT 为
[b]
令
执行
断
则WDT 应 软
EM78P156EL
1 3
则PORT6
WDT
断应
码选择
唤
EM78P156EL
唤
2
断
PORT6
执行
MOV A, @xx000110b
唤
选择内
EM78156EL(
[a])
则
令应
SLEP
TCC 时
CONTW
CLR R1
预
TCC
MOV A, @xxxx1110b
频
选择 WDT预
频
CONTW
WDTC
WDT
预
频
MOV A, @0xxxxxxxb
WDT
IOW RE
MOV R6, R6
读 P6
MOV A, @00000x1xb
断
P6
IOW RF
ENI (or DISI)
SLEP
(
断
)
进
NOP
应该
应
唤
WDT
将
唤
WDT
软
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
• 17
EM78P156EL
OTP ROM
览
5
Address
N/A
N/A
N/A
0x00
0x01
0x02
0x03
0x04
0x05
18 •
Name
IOC5
IOC6
CONT
R0(IAR)
R1(TCC)
R2(PC)
R3(SR)
R4(RSR)
P5
Reset Type
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit Name
X
X
X
X
C53
C52
C51
C50
Power-On
U
U
U
U
1
1
1
1
/RESET and WDT
U
U
U
U
1
1
1
1
Wake-Up from Pin
Change
U
U
U
U
P
P
P
P
Bit Name
C67
C66
C65
C64
C63
C62
C61
C60
Power-On
1
1
1
1
1
1
1
1
/RESET and WDT
1
1
1
1
1
1
1
1
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
X
/INT
TS
TE
PAB
Power-On
1
0
1
1
1
1
1
1
/RESET and WDT
1
0
1
1
1
1
1
1
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
-
-
-
-
-
-
-
-
Power-On
U
U
U
U
U
U
U
U
/RESET and WDT
P
P
P
P
P
P
P
P
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
-
-
-
-
-
-
-
-
Power-On
0
0
0
0
0
0
0
0
PSR2 PSR1 PSR0
/RESET and WDT
0
0
0
0
0
0
0
0
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
-
-
-
-
-
-
-
-
Power-On
0
0
0
0
0
0
0
0
/RESET and WDT
0
0
0
0
0
0
0
0
Wake-Up from Pin
Change
**0/P
**0/P
**0/P
**0/P
**1/P
**0/P
**0/P
**0/P
Bit Name
GP2
GP1
GP0
T
P
Z
DC
C
Power-On
0
0
0
1
1
U
U
U
/RESET and WDT
0
0
0
t
t
P
P
P
Wake-Up from Pin
Change
P
P
P
t
t
P
P
P
Bit Name
-
-
-
-
-
-
-
-
Power-On
1
1
U
U
U
U
U
U
/RESET and WDT
1
1
P
P
P
P
P
P
Wake-Up from Pin
Change
1
1
P
P
P
P
P
P
Bit Name
X
X
X
X
P53
P52
P51
P50
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
Address
0x06
0x0F
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
Name
P6
RF(ISR)
IOCA
IOCB
IOCC
IOCD
IOCE
IOCF
Reset Type
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Power-On
0
0
0
0
U
U
U
U
/RESET and WDT
0
0
0
0
P
P
P
P
Wake-Up from Pin
Change
0
0
0
0
P
P
P
P
Bit Name
P67
P66
P65
P64
P63
P62
P61
P60
Power-On
U
U
U
U
U
U
U
U
/RESET and WDT
P
P
P
P
P
P
P
P
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
X
X
X
X
X
EXIF
ICIF
TCIF
Power-On
U
U
U
U
U
0
0
0
/RESET and WDT
U
U
U
U
U
0
0
0
Wake-Up from Pin
Change
U
U
U
U
U
P
P
P
Bit Name
-
-
-
-
-
-
-
-
Power-On
1
1
1
1
1
1
1
1
/RESET and WDT
1
1
1
1
1
1
1
1
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
/PD7
/PD6
/PD5
/PD4
X
/PD2
/PD1
/PD0
Power-On
1
1
1
1
U
1
1
1
/RESET and WDT
1
1
1
1
U
1
1
1
Wake-Up from Pin
Change
P
P
P
P
U
P
P
P
Bit Name
OD7
OD6
OD5
OD4
OD3
OD2
OD1
OD0
Power-On
0
0
0
0
0
0
0
0
/RESET and WDT
0
0
0
0
0
0
0
0
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
/PH7
/PH6
/PH5
/PH4
/PH3
/PH2
/PH1
/PH0
Power-On
1
1
1
1
1
1
1
1
/RESET and WDT
1
1
1
1
1
1
1
1
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
WDTE
EIS
X
ROC
X
X
X
X
Power-On
1
0
U
0
U
U
U
U
/RESET and WDT
1
0
U
0
U
U
U
U
Wake-Up from Pin
Change
1
P
U
P
U
U
U
U
Bit Name
X
X
X
X
X
EXIE
ICIE
TCIE
Power-On
U
U
U
U
U
0
0
0
/RESET and WDT
U
U
U
U
U
0
0
0
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
• 19
EM78P156EL
OTP ROM
Address
Name
Reset Type
0x10~0x2
R10~R2F
F
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Wake-Up from Pin
Change
U
U
U
U
U
P
P
P
Bit Name
-
-
-
-
-
-
-
-
Power-On
U
U
U
U
U
U
U
U
/RESET and WDT
P
P
P
P
P
P
P
P
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
**
执行
0X08
不
U:
关
4.5.2 状态
令
SLEP
令
P:
t:
RST, T,
P
6.
状态
列
(1)
(2) /RESET
-
-
(3) WDT计时
T
P
6
列
6
断单
RST, T
唤
7列
T
P
Reset Type
T
P
Power on
1
1
/RESET during Operating mode
*P
*P
/RESET wake-up during SLEEP mode
1
0
WDT during Operating mode
0
*P
WDT wake-up during SLEEP mode
0
0
Wake-Up on pin change during SLEEP mode
1
0
T
P
Power on
1
1
WDTC instruction
1
1
WDT time-out
0
*P
SLEP instruction
1
0
Wake-Up on pin change during SLEEP mode
1
0
状态
*P
7
T
P
状态
Event
*P
20 •
P状态
状态
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
VDD
D
CLK
Oscillator
Q
CLK
CLR
Power-on
Reset
Voltage
Detector
WDTE
WDT Timeout
WDT
RESET
Setup Time
/RESET
图9
4.6
图
断
EM78P156EL
TCC
2
PORT6
状态
断[
3
P60,/INT
令
断标
进
令
状态
唤
断
"MOV R6,R6")
状态
为
状态
/INT
P60
PORT6
断 则PORT6
若
断
则单
执行SLEP
量
0X008 执行 令
(
执行ENI
断状态
RF
RF IOCF逻辑
断 执行ENI
断
断
令
读R6
这
标
记录 关 断请
IOCF 为 断
ENI DISI 令
当
断
时
令
断 理
检测RF标
来
断
断 理
断标
断
断
不
当INT
]
执行SLEP 令进
唤 EM78P156EL
若
断
则
状态
结
断
断
PORT6
PORT6
须
断
断
1
RF
断
降
3
若
产
断时
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
令将
RF
结
标
图10
0X08
ICIF
RETI 令
001H
• 21
EM78P156EL
OTP ROM
VCC
P
R
D
/IRQn
CLK
C
L
Q
IRQn
INT
_
Q
IRQm
RFRD
RF
ENI/DISI
IOCF
Q
P
R
_
Q
C
L
IOD
D
CLK
IOCFWR
/RESET
IOCFRD
RFWR
图 10
4.7
断
路
荡
荡
4.7.1
EM78P156EL
HXT
编 选择
8
频率
8
MS
3
频
了
HLP
不
荡
LXT
这3
RC 荡
过对 码
9 给 了不 VDD
荡
Mode
MS
HLF
HLP
ERC(External RC oscillator mode)
0
*X
*X
HXT(High XTAL oscillator mode)
1
1
*X
LXT(Low XTAL oscillator mode)
1
0
0
<
1. X
2.
22 •
ERC
频
MS HLF
/谐
>
不 关
HXT
LXT
时频率 约为400 KHz
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
度
9
Conditions
Two cycles with two clocks
荡 /
4.7.2
荡
Fxt max.(MHz)
2.3
4.0
3.0
8.0
5.0
20.0
(XTAL)
时
EM78P156EL
VDD
过 OSCI
OSCI
来驱
图11
Ext. Clock
OSCO
EM78P156EL
图 11
时
数应
OSCO OSCI
路 不论 HXT 还 LXT
都
不
应
规 选择C1 C2
cut
路
谐
10 为C 1 C2
串
来产
RS 对
荡 图12 为
谐
频
AT strip
C1
OSCI
EM78P156EL
XTAL
OSCO
RS
图 12
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
/谐
C2
路
• 23
EM78P156EL
OTP ROM
10
荡
/
选择
Oscillator Type
Frequency Mode
Frequency
C1(pF)
C2(pF)
Ceramic Resonators
HXT
455 kHz
2.0 MHz
4.0 MHz
100~150
20~40
10~30
100~150
20~40
10~30
LXT
32.768kHz
100KHz
200KHz
25
25
25
15
25
25
HXT
455KHz
1.0MHz
2.0MHz
4.0MHz
20~40
15~30
15
15
20~150
15~30
15
15
Crystal Oscillator
4.7.3
RC
不
还
度
荡
精 计时 应
应该
RC 荡
关
为了获 稳
该 围 内
频率
频率将
RC 荡
NMOS不
Rext
将
RC 荡
图15
节省
费
频率
压
(Rext)
(Cext)
产
别 频率
细
不
频率
荡
须牢记
频率
压
不
20pF
湿度 漏
易
对
将
尽
们不
1M
1K
不稳
度
RC
荡
PCB
线
Vcc
Rext
OSCI
Cext
EM78P156EL
图 13
24 •
荡
路
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
11 RC
荡
频率
Cext
Rext
Average Fosc
5V,25°C
Average Fosc
3V,25°C
3.3k
3.92 MHz
3.65 MHz
5.1k
2.67 MHz
2.60 MHz
20 pF
10k
1.39MHz
1.40 MHz
100k
149 KHz
156 KHz
3.3k
1.39 MHz
1.33 MHz
5.1k
940 KHz
920 KHz
10k
480 KHz
475 KHz
100 pF
100k
52 KHz
50 KHz
3.3k
595 KHz
560 KHz
5.1k
400 KHz
390 KHz
10k
200 KHz
200 KHz
100k
21 KHz
20 KHz
300 pF
<
测量
1. DIP
计
2.
3.频率
4.8
>
约为 30%
码选择
码选择
EM78P156EL
这 选择 不
不
储
执行
访问
Code Option
资
ID
Word 0
Word 1
Bit12~Bit0
Bit12~Bit0
1. Code Option
(Word 0)
WORD 0
Bit12
Bit11
Bit10
Bit9
Bit8
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
MS
/ENWDT
CLK
CS
HLF
-
HLP
-
-
-
-
-
-
12
11
选择
(MS)
0
RC
1
XTAL
(/ENWDT)
(XTAL1
XTAL2)
WDT
0
1
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
• 25
EM78P156EL
OTP ROM
10
令
(CLK)
选择
0
2
荡
1
4
荡
令
9
8
码
(CS)
(HLF)
0
开
1
关
XTAL 频率选择
0
XTAL2
(
频
1
XTAL1
(
频)
32.768KHz)
MS
12
HLF 须为0
为1时
<
LXY
>:
HXT
这
将
时频率
荡
当MS为0时
约为 400 KHz
留
7
这
6
节
为1
选择
(HLP)
0
1
5~0
2.
ID
ID
码
(Word 1)
Bit 12~Bit 0
XXXXXXXXXXXXX
12~0
4.9 关
ID
码
问题
稳
单
不
证开
EM78P156EL POR 压 围为1.2~1.8V
开
关闭状态
Vdd
50ms 更
许
严
应
还
26 •
过
关闭
VDD
10us 这
EM78P156将
额
路将
路来
问题
1.2V
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
路
4.10
图14
路
了
RC产
压 当
时
该
议R不应
40K 这
/reset
省 时 当 路 路
C将
静
ESD流
/RESET
宽度应
路
/RESET
压将
0.2V
流
Rin 来
Vdd
漏 流约为±5µA
D
过
流
Vdd
R
/RESET
D
EM78P156EL
Rin
C
图 14
4.11
残
压
更换
将
路
时
不
Vdd 断开
图15 16为残
压
Vdd
路
不为0
残
压 这
Vdd
Vdd
33K
EM78P156EL
Q1
10K
/RESET
40K
图 15 残
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
1N4684
压
路1
• 27
EM78P156EL
OTP ROM
Vdd
Vdd
R1
EM78P156EL
Q1
/RESET
R2
40K
图 146 残
压
路2
令
4.12
令
2
令都 13
码
数组
令 执行时 都 1
令
内
令
2
荡
了
计数 R2数
令 "MOV R2,A", "ADD R2,A"
对R2进行 术 逻辑
令(
"SUB R2,A", "BS(C) R2,6", "CLR R2", ⋅⋅⋅⋅) 这
令执行
令
令
令
(A)
(B)
4
不
应
荡
测试 "JMP" "CALL" "RET" "RETL" "RETI" 令
"JBC", "JZ", "JZA", "DJZ", "DJZA") 执行时 为2
令
2
令
(A)
Fosc/4
CODE Option
CLK为 1
CLK 选择
令
为4
荡
选择
图5
(A)
不 Fosc/ 2
令
为4
CLK为0
荡
转
对PC写
令
令 ("JBS",
令
为2
内
TCC
荡
时
应该
)
10
"b"
数
令
都
(1)
28 •
零
测试
为
(2) I/O
令
1
"R"
R
令
对I/O
(
"k"
8
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
INSTRUCTION BINARY
HEX
MNEMONIC
0000
0001
0010
0011
0100
rrrr
0000
0001
0010
0000
0001
0002
0003
0004
000r
0010
0011
0012
NOP
DAA
CONTW
SLEP
WDTC
IOW R
ENI
DISI
RET
0 0000 0001 0011
0013
RETI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0014
001r
00rr
0080
00rr
01rr
01rr
01rr
01rr
02rr
02rr
02rr
02rr
03rr
03rr
03rr
03rr
04rr
04rr
04rr
04rr
05rr
05rr
05rr
05rr
CONTR
IOR R
MOV R,A
CLRA
CLR R
SUB A,R
SUB R,A
DECA R
DEC R
OR A,R
OR R,A
AND A,R
AND R,A
XOR A,R
XOR R,A
ADD A,R
ADD R,A
MOV A,R
MOV R,R
COMA R
COM R
INCA R
INC R
DJZA R
DJZ R
0 0110 00rr rrrr
06rr
RRCA R
0 0110 01rr rrrr
06rr
RRC R
0 0110 10rr rrrr
06rr
RLCA R
0 0110 11rr rrrr
06rr
RLC R
0 0111 00rr rrrr
07rr
SWAPA R
0 0111 01rr rrrr
0 0111 10rr rrrr
0 0111 11rr rrrr
07rr
07rr
07rr
SWAP R
JZA R
JZ R
0
0
0
0
0
0
0
0
0
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0001
0001
0001
0010
0010
0010
0010
0011
0011
0011
0011
0100
0100
0100
0100
0101
0101
0101
0101
0000
0000
0000
0000
0000
0000
0001
0001
0001
0001
0001
01rr
1000
11rr
00rr
01rr
10rr
11rr
00rr
01rr
10rr
11rr
00rr
01rr
10rr
11rr
00rr
01rr
10rr
11rr
00rr
01rr
10rr
11rr
0100
rrrr
rrrr
0000
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
OPERATION
No Operation
Decimal Adjust A
A → CONT
0 → WDT, Stop oscillator
0 → WDT
A → IOCR
Enable Interrupt
Disable Interrupt
[Top of Stack] → PC
[Top of Stack] → PC, Enable
Interrupt
CONT → A
IOCR → A
A→R
0→A
0→R
R-A → A
R-A → R
R-1 → A
R-1 → R
A∨R→A
A∨R→R
A&R→A
A&R→R
A⊕R→A
A⊕R→R
A+R→A
A+R→R
R→A
R→R
/R → A
/R → R
R+1 → A
R+1 → R
R-1 → A, skip if zero
R-1 → R, skip if zero
R(n) → A(n-1),
R(0) → C, C → A(7)
R(n) → R(n-1),
R(0) → C, C → R(7)
R(n) → A(n+1),
R(7) → C, C → A(0)
R(n) → R(n+1),
R(7) → C, C → R(0)
R(0-3) → A(4-7),
R(4-7) → A(0-3)
R(0-3) ↔ R(4-7)
R+1 → A, skip if zero
R+1 → R, skip if zero
STATUS AFFECTED
None
C
None
T,P
T,P
None <Note1>
None
None
None
None
None
None <Note1>
None
Z
Z
Z,C,DC
Z,C,DC
Z
Z
Z
Z
Z
Z
Z
Z
Z,C,DC
Z,C,DC
Z
Z
Z
Z
Z
Z
None
None
C
C
C
C
None
None
None
None
• 29
EM78P156EL
OTP ROM
INSTRUCTION BINARY
HEX
MNEMONIC
0xxx
0xxx
0xxx
0xxx
BC R,b
BS R,b
JBC R,b
JBS R,b
1 00kk kkkk kkkk
1kkk
CALL k
1
1
1
1
1
kkkk
kkkk
kkkk
kkkk
kkkk
1kkk
18kk
19kk
1Akk
1Bkk
JMP k
MOV A,k
OR A,k
AND A,k
XOR A,k
1 1100 kkkk kkkk
1Ckk
RETL k
1 1101 kkkk kkkk
1Dkk
SUB A,k
1 1110 0000 0001
1E01
INT
1 1111 kkkk kkkk
1Fkk
ADD A,k
0
0
0
0
100b
101b
110b
111b
01kk
1000
1001
1010
1011
bbrr
bbrr
bbrr
bbrr
kkkk
kkkk
kkkk
kkkk
kkkk
rrrr
rrrr
rrrr
rrrr
OPERATION
0 → R(b)
1 → R(b)
if R(b)=0, skip
if R(b)=1, skip
PC+1 → [SP],
(Page, k) → PC
STATUS AFFECTED
None <Note2>
None <Note3>
None
None
None
(Page, k) → PC
k→A
A∨k→A
A&k→A
A⊕k→A
k → A,
[Top of Stack] → PC
k-A → A
PC+1 → [SP],
001H → PC
k+A → A
None
None
Z
Z
Z
None
Z,C,DC
None
Z,C,DC
NOTE
该 令
IOC5~IOC6, IOCB~IOCF
议该 令不
RF
该 令不 对RF
30 •
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
4.13 时
图
AC Test Input/Output Waveform
2.4
2.0
0.8
TEST POINTS
2.0
0.8
0.4
AC Testing : Input is driven at 2.4V for logic "1",and 0.4V for logic "0".Timing measurements are
made at 2.0V for logic "1",and 0.8V for logic "0".
RESET Timing (CLK="0")
NOP
Instruction 1
Executed
CLK
/RESET
Tdrh
TCC Input Timing (CLKS="0")
Tins
CLK
TCC
Ttcc
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
• 31
EM78P156EL
OTP ROM
绝对
5
围
Items
Rating
Temperature under bias
0°C to 70°C
Storage temperature
-65°C to 150°C
Input voltage
Vss-0.3V to Vdd+0.5V
Output voltage
Vss-0.3V to Vdd+0.5V
6
6.1
流
DC
( Ta= 25 °C, VDD= 5.0V±5%, VSS= 0V )
Symbol
FXT
ERC
Parameter
Condition
Min
DC
8.0
MHz
XTAL: VDD to 5V
Two cycle with two clocks
DC
20.0
MHz
F±30%
KHz
±1
µA
R: 5.1KΩ, C: 100 pF
VIN = VDD, VSS
VIH1
Input High Voltage (VDD=5V)
Ports 5, 6
VIL1
Input Low Voltage (VDD=5V)
Ports 5, 6
VILT1
VIHX1
Input High Threshold Voltage
(VDD=5V)
Input Low Threshold Voltage
(VDD=5V)
Clock Input High Voltage (VDD=5V)
0.8
OSCI
2.0
Clock Input Low Voltage (VDD=5V)
OSCI
Ports 5, 6
VIL2
Input Low Voltage (VDD=3V)
Ports 5, 6
0.8
V
V
1.5
1.5
V
V
0.4
/RESET, TCC(Schmitt trigger)
V
V
3.5
Input High Voltage (VDD=3V)
VILT2
V
/RESET, TCC(Schmitt trigger)
VIH2
Input High Threshold Voltage
(VDD=3V)
Input Low Threshold Voltage
(VDD=3V)
F±30% 940
2.0
/RESET, TCC(Schmitt trigger)
VILX1
VIHT2
Unit
Two cycle with two clocks
ERC: VDD to 5V
VIHT1
Max
XTAL: VDD to 3V
Input Leakage Current for input pins
IIL
Typ.
1.5
V
V
/RESET, TCC(Schmitt trigger)
0.4
VIHX2
Clock Input High Voltage (VDD=3V)
OSCI
VILX2
Clock Input Low Voltage (VDD=3V)
OSCI
VOH1
Output High Voltage (Ports 5)
IOH = -12.0 mA
2.4
V
VOH1
Output High Voltage (Ports 6)
(Schmitt trigger)
IOH = -12.0 mA
2.4
V
VOL1
Output Low Voltage(Port5)
IOL = 12.0 mA
0.4
V
VOL1
Output Low Voltage (Ports 6)
(Schmitt trigger)
IOL = 12.0 mA
0.4
V
IPH
Pull-high current
IPD
Pull-down current
ISB1
Power down current
32 •
2.1
V
V
0.9
Pull-high active, input pin at
VSS
Pull-down active, input pin at
VDD
All input and I/O pins at VDD,
output pin floating, WDT
V
-50
-70
-240
µA
25
50
120
µA
1
2
µA
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
Symbol
Parameter
Condition
Min
Typ.
Max
Unit
10
µA
15
30
µA
20
35
µA
2.0
mA
4.0
mA
disabled
ISB2
Power down current
ICC1
Operating supply current
(VDD=3V)
at two cycles/four clocks
ICC2
Operating supply current
(VDD=3V)
at two cycles/four clocks
ICC3
Operating supply current
(VDD=5.0V)
at two cycles/two clocks
ICC4
Operating supply current
(VDD=5.0V)
at two cycles/four clocks
6.2
流
All input and I/O pins at VDD,
output pin floating, WDT
enabled
/RESET= 'High', Fosc=32KHz
(Crystal type,CLKS="0"),
output pin floating, WDT
disabled
/RESET= 'High', Fosc=32KHz
(Crystal type,CLKS="0"),
output pin floating, WDT
enabled
/RESET= 'High', Fosc=4MHz
(Crystal type, CLKS="0"),
output pin floating, WDT
enabled
/RESET= 'High', Fosc=10MHz
(Crystal type, CLKS="0"),
output pin floating, WDT
enabled
15
AC
(Ta=25 °C, VDD=5V±5%, VSS=0V)
Symbol
Dclk
Tins
Ttcc
Tdrh
Trst
Twdt
Tset
Thold
Tdelay
Parameter
Input CLK duty cycle
Instruction cycle time
(CLKS="0")
TCC input period
Device reset hold time
/RESET pulse width
Watchdog timer period
Input pin setup time
Input pin hold time
Output pin delay time
Conditions
Crystal type
RC type
Ta = 25°C
Ta = 25°C
Ta = 25°C
Min
Typ
Max
Unit
45
100
500
(Tins+20)/N*
11.8
2000
11.8
50
55
DC
DC
16.8
21.8
16.8
0
20
50
21.8
%
ns
ns
ns
ms
ns
ms
ns
ns
ns
Cload=20pF
* N= 选择
*这
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
数
预
频
数
过测试
• 33
EM78P156EL
OTP ROM
6.3 IC
张图
图
Vih max (0
Vih typ 25
Vih min (0
数
数
仅
证
不
证
精
围
to 70 )
to 70 )
Vil max (0
Vil typ 25
Vil min (0
to 70 )
to 70 )
Fig. 17 Vih, Vil of Port6 vs. VDD
Max(0
to 70 )
Typ 25
Min(0
to 70 )
Fig. 18 Vth (Threshold voltage) of Port5 vs. VDD
34 •
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
Voh/Ioh (VDD=5V)
Min 70
Typ 25
Min 0
Fig. 19 Port5 and Port6 Voh vs. Ioh, VDD=5V
Voh/Ioh (VDD=3V)
Min 70
Typ 25
Min 0
Fig. 20 Port5 and Port6 Voh vs. Ioh, VDD=3V
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
• 35
EM78P156EL
OTP ROM
Max 0
Typ 25
Iol(mA)
Min 70
Fig. 21 Port5, Port6 Vol vs. Iol, VDD = 5V
Vol/Iol (VDD=3V)
Max 0
Typ 25
Min 70
Fig. 22 Port5, Port6 Vol vs. Iol, VDD = 3V
36 •
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
WDT Time_out
Max 70
Typ 25
Min 0
Fig. 23 WDT time out period vs. VDD,
perscaler set to 1:1
Cext = 100pF, Typical RC Frequency vs. VDD
R = 3.3K
R = 5.1K
R = 10K
R = 100K
Fig. 24 Typical RC OSC Frequency vs. VDD
(Cext= 100pF, Temperature at 25 )
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
• 37
EM78P156EL
OTP ROM
VDD = 5V
VDD = 3V
Fig. 25 Typical RC OSC Frequency vs. VDD (R and C are ideal components)
Four conditions exist with the Operating Current ICC1 to ICC4. These conditions are
as follows:
ICC1: VDD=3V, Fosc=32K Hz, 2 clocks, WDT disable
ICC2: VDD=3V, Fosc=32K Hz, 2 clocks, WDT enable
ICC3: VDD=5V, Fosc=4M Hz, 2 clocks, WDT enable
ICC4: VDD=5V, Fosc=10M Hz, 2 clocks, WDT enable
Current (uA)
Typical ICC1 and ICC2 vs. Temperature
Typ ICC2
Typ ICC1
Temperature ( )
Fig. 26 Typical operating current (ICC1 and ICC2) vs. Temperature
38 •
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
Maximum ICC1 and ICC2 vs. Temperature
Max ICC2
Max ICC1
Fig. 27 Maximum operating current (ICC1 and ICC2) vs. Temperature
Typical ICC3 and ICC4 vs. Temperature
Typ ICC4
Typ ICC3
Fig. 28 Typical operating current (ICC3 and ICC4) vs. Temperature
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
• 39
EM78P156EL
OTP ROM
Maximum ICC3 and ICC4 vs. Temperature
Current (mA)
Max ICC4
Max ICC3
Temperature ( )
Fig. 29 Maximum operating current (ICC3 and ICC4) vs. Temperature
Two conditions exist with the Standby Current ISB1 and ISB2. These conditions are as
follows:
ISB1: VDD=5V, WDT disable
ISB2: VDD=5V, WDT enable
Current (uA)
Typical ISB1 and ISB2 vs. Temperature
Typ ISB2
Typ ISB1
Temperature ( )
Fig. 30 Typical standby current (ISB1 and ISB2) vs. Temperature
40 •
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
Maximum ISB1 and ISB2 vs. Temperature
Current (uA)
Max ISB2
Max ISB1
Temperature ( )
Fig. 31 Maximum standby current (ISB1 and ISB2) vs. Temperature
Fig. 32 Operating voltage in temperature range from 0
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
to 70
• 41
EM78P156EL
OTP ROM
EM78P156E-J HXT V-I
42 •
Fig. 33 Operating current range (based on high Freq. @ =25
) vs. Voltage
Fig. 34 Operating current range (based on low Freq. @ =25
) vs. Voltage
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
EM78P156E-G HXT V-I
Fig. 35 Operating current range (based on high Freq. @ =25
) vs. Voltage
EM78P156E-G LXT V-I
Fig. 36 Operating current range (based on low Freq. @ =25
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
) vs. Voltage
• 43
EM78P156EL
OTP ROM
录
A
:
OTP MCU
Package Type
Pin Count
Package Size
EM78P156ELP
DIP
18
300 mil
EM78P156ELM
SOP
18
300 mil
EM78P156ELAS
SSOP
20
209 mil
EM78P156ELKM
SSOP
20
209 mil
B
18-Lead Plastic Dual in line (PDIP)
44 •
300 mil
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
EM78P156EL
OTP ROM
18-Lead Plastic Small Outline (SOP)
20-Lead Plastic Small Outline (SSOP)
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
300 mil
209 mil
• 45
EM78P156EL
OTP ROM
46 •
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)