RENESAS HD74BC374A

HD74BC374A
Octal D Type Flip Flops With 3 State Outputs
REJ03D0284–0300Z
(Previous ADE-205-010A (Z))
Rev.3.00
Jul.16.2004
Description
The HD74BC374A provides high drivability and operation equal to or better than high speed bipolar standard logic IC
by using Bi-CMOS process. The device features low power dissipation that is about 1/5 of high speed bipolar logic IC,
when the frequency is 10 MHz. The device has eight edge triger D type flip flop with three state outputs in a 20 pin
package. Data at the D inputs meeting set up reguirements, are transferred to the Q outputs on positive going transitions
of the clock input. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable
returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance
state, regardless of what signals are present at the other inputs and the state of the storage elements.
Features
• Input/Output are at high impedance state when power supply is off.
• Built in input pull up circuit can make input pins be open, when not used.
• TTL level input
• Wide operating temperature range
Ta = –40 to + 85°C
• Ordering Information
Part Name
Package Type
HD74BC374AFPEL
Package Code
SOP-20 pin (JEITA) FP-20DAV
Package
Abbreviation
FP
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
Function Table
Inputs
G
H
Output
CK
nQ
X
Z
L
L
L
L
H
H
L
X
No change
H
L
X
Z
X
nD
:
:
:
:
High level
Low level
Immaterial
High impedance
:
Low to high transition
Rev.3.00, Jul.16.2004, page 1 of 8
HD74BC374A
Pin Arrangement
G
1
20
VCC
1Q
2
19
8Q
1D
3
18
8D
2D
4
17
7D
2Q
5
16
7Q
3Q
6
15
6Q
3D
7
14
6D
4D
8
13
5D
4Q
9
12
5Q
GND
10
11
CK
(Top view)
Absolute Maximum Ratings
Item
Symbol
Rating
Unit
Supply voltage
Input diode current
VCC
IIK
–0.5 to +7.0
±30
V
mA
Input voltage
Output voltage
VIN
VOUT
–0.5 to +7.5
–0.5 to +7.5
V
V
Off state output voltage
Storage temperature
VOUT(off)
Tstg
–0.5 to +5.5
–65 to +150
V
°C
Note:
1. The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two
of which may be realized at the same time.
Recommended Operating Conditions
Item
Symbol
Min
Typ
Max
Unit
Supply voltage
Input voltage
VCC
VIN
4.5
0
5.0
—
5.5
VCC
V
V
Output voltage
Operating temperature
VOUT
Topr
0
–40
—
—
VCC
85
V
°C
8
ns/V
Input rise/fall time*1
tr, tf
0
—
Note: 1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Rev.3.00, Jul.16.2004, page 2 of 8
HD74BC374A
Logic Diaglam
G
1D
D Q
CK
1Q
2D
D Q
CK
2Q
3D
D Q
4D
D Q
8D
CK
Rev.3.00, Jul.16.2004, page 3 of 8
CK
CK
D Q
CK
3Q
4Q
8Q
HD74BC374A
Electrical Characteristics (Ta = –40°C to +85°C)
Item
Symbol
Input voltage
VIH
VIL
Output voltage
VOH
Input diode voltage
Input current
VCC(V)
Min
Max
Unit
Test Conditions
2.0
—
—
0.8
V
V
4.5
4.5
2.4
2.0
—
—
V
V
IOH = –3 mA
IOH = –15 mA
VOL
4.5
4.5
—
—
0.4
0.5
V
V
IOL = 24 mA
IOL = 48 mA
VIK
II
4.5
5.5
—
—
–1.2
1.0
V
µA
IIN = –18 mA
VIN = 5.5 V
5.5
5.5
—
—
–250
100
µA
µA
VIN = 0 V
VIN = 7.0 V
Short circuit output current*1
Off state output current
IOS
IOZH
5.5
5.5
–100
—
–225
50
mA
µA
VIN = 0 or 5.5 V
VO = 2.7 V
Supply current
IOZL
ICCL
5.5
5.5
—
—
–50
29.5
µA
mA
VO = 0.5 V
VIN = 0 or 5.5 V
All output is “L”
ICCH
5.5
—
2.5
mA
ICCZ
5.5
—
2.5
mA
VIN = 0 or 5.5 V
All output is “H”
VIN = 0 or 5.5 V
All output is “Z”
ICCT*2
5.5
—
1.5
mA
VIN = 3.4 or 0.5 V
Notes : 1. Not more than one output should be shorted at a time and duration of the short circuit should not exceed one
second.
2. When input by the TTL level, it shows ICC increase at per one input pin.
Switching Test Method (CL = 50 pF)
Ta = 25°C
VCC = 5.0 V
Ta = –40 to 85°C
VCC = 5.0 V ±10%
Item
Propagation
CK → Q
Symbol
Min
tPLH
3.0
Max
8.0
Min
3.0
Max
10.0
Unit
Test Conditions
ns
See under figure
delay time
Output enable time
tPHL
tZH
3.0
3.0
8.0
9.0
3.0
3.0
10.0
11.0
ns
Output disable time
tZL
tHZ
3.0
3.0
9.0
8.0
3.0
3.0
11.0
10.0
ns
Setup time
tLZ
ts(H)
3.0
2.0
8.0
—
3.0
2.0
10.0
—
ns
Hold time
ts(L)
th(H)
2.0
2.0
—
—
2.0
2.0
—
—
ns
Pulse width
th(L)
tw(H)
2.0
6.0
—
—
2.0
6.0
—
—
ns
6.0
—
3.0(Typ)
6.0
—
—
Input capacitance
tw(L)
CIN
Output capacitance
CO
15.0(Typ)
—
Rev.3.00, Jul.16.2004, page 4 of 8
pF
VIN = VCC or GND
pF
VO = VCC or GND
HD74BC374A
Test Circuit
VCC
VCC
Input
Pulse Generator
Zout = 50 Ω
Input
Pulse Generator
Zout = 50 Ω
Notes:
See Function Table
Output
G
1Q to 8Q
1D to 8D
CK
1. CL includes probe and jig capacitance.
2. OPEN: tPLH, tPHL, tZH, tHZ, th, ts, tw
7V: tZL, tLZ
Rev.3.00, Jul.16.2004, page 5 of 8
500 Ω
CL =
50 pF
450 Ω
50 Ω Scope
*2
OPEN
7V
HD74BC374A
Waveforms-1
tr
tf
90%
1.5 V
Input
CK
3V
90%
1.5 V
10%
1.5 V
10%
0V
tf
tr
90%
Input
D
3V
90%
10%
10%
t PLH
t PHL
0V
VOH
1.5 V
1.5 V
Output
Q
VOL
Waveforms-2
tr
tf
90%
Input
CK
1.5 V
10%
ts
3V
90%
1.5 V
10%
tw
0V
th
3V
Input
D
1.5 V
Rev.3.00, Jul.16.2004, page 6 of 8
1.5 V
0V
HD74BC374A
Waveforms-3
tf
G
tr
90%
90%
1.5 V
1.5 V
10%
10%
3V
0V
t LZ
t ZL
3.5 V
1.5 V
Waveform–A
VOL + 0.3 V
t ZH
Waveform–B
VOL
t HZ
VOH – 0.3 V
VOH
1.5 V
0V
Notes:
1. tr = 2.5 ns, tf = 2.5 ns
2. Input waveform: PRR = 1 MHz, duty cycle 50%
3. Waveform-A shows input conditions such that the output is “L” level when enable by the
output control.
4. Waveform-B shows input conditions such that the output is “ H” level when enable by the
output control.
Rev.3.00, Jul.16.2004, page 7 of 8
HD74BC374A
Package Dimensions
As of January, 2003
Unit: mm
12.6
13 Max
11
1
10
1.27
*0.40 ± 0.06
0.10 ± 0.10
0.80 Max
*0.20 ± 0.05
2.20 Max
5.5
20
0.20
7.80 +– 0.30
1.15
0˚ – 8 ˚
0.70 ± 0.20
0.15
0.12 M
*Ni/Pd/Au plating
Rev.3.00, Jul.16.2004, page 8 of 8
Package Code
JEDEC
JEITA
Mass (reference value)
FP-20DAV
—
Conforms
0.31 g
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