SP9380 Complete Buffered 18-Bit D AC D ata Converter Line FEATURES • Complete 18-Bit DA C Including an Internal Reference and an Output A mplifier • Input Latches A ssist in M icroprocessor Interface • Low Nonlinearity: ±1/2 LSB 18-Bit Differential ±1/2 LSB 18-Bit Integral • 18-Bit M onotonicity • Low Power: 600 mW Typ • High Stability Over Time and Temperature Using decoding techniques and ultrastable resistor technology, the SP9380 exhibits typical nonlinearities of ±0.5 LSB (differential and integral) and high stability over time and temperature. The power dissipation is 600mW typical. DESCRIPTION The SP9380 is a complete voltage output DA C offering 18-bit resolution (1 part in 262,144) and true 18-bit accuracy in a component size hybrid package. The SP9380 comes complete with input latches, an internal reference and a very low noise output amplifier. The analog output ranges are pin programmable for 0 to +5V , 0 to +10V , ±5V and ±10V. The device is available for either commerical (0ºC to +70ºC) or military (–55ºC to +125ºC) applications in a 32-pin triple DIP. FUNCTIONAL DIAGRAM DB17 (M SB) DB17 DB1 (M SB) DB2 25 • • • • • • • • 10 9 INPUT REGISTER HEN BIPOLA R OFFSET 8 27 10V SPA N 20V SPA N 28 29 INPUT REGISTER 20k LEN 10k 6 10k REF IN 26 31 18-BIT M DA C – 10k – + + REF OUT 1 REFERENCE SP9380 10 5 GA IN A DJUST DIG GND 32 A NA GND 32 – 15V 32 +15V 32 SUM M ING JUNCTION 165Cedar Hill Street,Marlborough,MA01752 Tel:508.485.6350 Fax: 508.485.5168 www.SpectrumMicrowave.com OUTPUT SP9380 SPECIFICATIO N S (Typical @25ºC and rated supplies.) M ODEL SP9380-18 RESOLUTION 18-Bits SP9380-16 DIGITA L INPUTS Unipolar Coding Bipolar Coding Logic Compatibility1 Input Leakage Current 2 Data Setup 3 Latch W idth Data Hold 4 Binary Offset Binary TTL CM OS ±1.0µA 150 nsec 170 nsec 100 nsec A CCURA CY Differential Nonlinearity Integral Nonlinearity5 M onotonicity ±0.0002% ±0.0004% ±0.0002% ±0.0004% 18-Bits FSR FSR FSR FSR typ. max. typ, max, ±0.0008% ±0.0016% ±0.0010% ±0.0016% 16-Bits FSR FSR FSR FSR typ. max. typ. max. INITIA L ERRORS Gain Offset Unipolar Bipolar ±0.01% typ. ±0.10% max ±0.01% typ. ±0.05% max ±0.01% typ. ±0.05% max STA BILITY (ppm/º C) Differential Nonlinearity Integral Nonlinearity Gain Offset Unipolar Bipolar ±0.1 typ. 0.4 max ±0.2 typ. ±0.4 max ±3 typ. ±7 max ±0.1 typ. ±0.5 max ±1 typ. ±4 max STA BILITY LONG TERM Differential Linearity Gain Offset 16ppm/168hrs. @125ºC 1ppm/I000hrs. @25ºC 15ppm/I000hrs. @25ºC 15ppm/I000hrs. @25ºC W A RM -UP TIM E 10 minutes DY NA M IC PERFORM A NCE A nalog Settling Time (1/2 LSB) 10 V olt Step 20 V olt Step LSB Change Slew Rate M ajor Carry Transition Settling to 0.006% FSR Strobed 30µsec 50µsec 8µsec 2V /µsec 10µS REFERENCE V oltage Drift Stability +10V (internal) 5ppm/ºC 1 mV /year A NA LOG OUTPUT V oltage Noise (W ideband) +5V , +10V , ±5V , ±10V 0.0004% FSR p-p Continued on next page. SP9380 SPECIFICA TION (Continued) POW ER SUPPLY REQUIREM ENTS + 15V DC (±5% ) –15V DC (±5% ) Power Dissipation Supply Rejection 30mA max 20mA max 600mW ±0.0001% /% TEM PERA TURE RA NGE Operating Storage –55 to +125ºC –65 to +150ºC PA CK A GE 32 Pin M etal NOTES: 1. Digital input must not exceed supply voltage or go below 0.5V . 2. V IL 0.4, V HL 3.2. 3. Time that data must be stable before latch control goes to 0. 4. Time that data must be stable after latch control goes to 0. 5. Intearal Linearity, for this product, is measured as the arithmetic mean value of the magnitudes of the greatest positive deviation and the greatest negative deviation from the theoretical value for any given input combination. PA CK A GE OUTLINE PIN DESIGNA TIONS 1.145 (29.08) 1.155.(29.34) DIM ENSIONS inches (mm) 0.120 (3.05) 0.130.(3.30) 0.900 (22.86) INDICA TES PIN 1 1 32 0.190 (4.85) 0.200.(5.08) 0.20 (5.08) 0.25.(6.35) 0.095 (2.41) 0.105.(2.67) 16 PIN 1.735 (44.07) 1.745.(44.23) 17 TOP V IEW 0.125 (3.2) FUNCTION PIN FUNCTION 1 REF OUT 32 A NA GND 2 GA IN A DJUST 31 OUTPUT 3 +15V 30 SUM M ING JUNCTION 4 -15V 29 20V SPA N 5 DIG GND 28 10V SPA N 6 LEN 27 BIPOLA R OFFSET 7 HEN 26 REF IN 8 DBO (LSB) 25 DB17 (M SB) 9 DB1 24 DB16 10 DB2 23 DB15 11 DB3 22 DB14 12 DB4 21 DB13 OPERA TING INSTRUCTIONS 13 DB5 20 DB12 POW ER SUPPLY A ND GROUNDING CONSIDERA TIONS 14 DB6 19 DB11 15 DB7 18 DB10 Clearly, the management of IR drops, power supply noise, thermal stability and environmental noise become critical issues when designing an 18-bit system. To optimize the absolute accuracy of a high resolution system, the following rules of thumb have to be followed: 16 DB8 17 DB9 1. Selection of low noise operation power supplies. 2. Proper decoupling of the supplies at the DA C using 10µF ceramic disk capacitor. 3. Usage of the “ holy point” grounding technique. 4. “ K elvin-sensed-output” connection of the DA C the load. Consult factory for application information. ORDERING INFORM A TION M ODEL TEM PERA TURE RA NGE SCREENING SP9380C-18 SP9380C-16 SP9380B-18 SP9380B-16 0 Cto70 0 Cto70 –55 C to +125 C –55 C to +125 C – – M IL-STD-883C M IL-STD-883C