Ordering number : ENA2203 LV52206XA Bi-CMOS IC Dual channel LED Boost Driver with PWM and 1-Wire Dimming http://onsemi.com Overview The LV52206XA is a high voltage boost driver for LED drive with 2 channels adjustable constant current sources. Features • Operating Voltage from 2.7V to 5.5V • 1-Wire 32 level digital and PWM dimming • Integrated 43V MOSFET • 600kHz Switching Frequency Typical Applications • LED Display Backlight Control SW VIN VCC OVP LV52206 Dimming control PWM/SWIRE LEDO1 FCAP LEDO2 GND Fig1. 5×2 LED Application ORDERING INFORMATION See detailed ordering and shipping information on page 11 of this data sheet. Semiconductor Components Industries, LLC, 2013 July, 2013 71013NK 20130624-S00001 No.A2203-1/12 LV52206XA Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage VCC max VCC 5.5 Maximum pin voltage1 V1 max SW 43 V V Maximum pin voltage2 V2 max Other pin 5.5 V Allowable power dissipation Pd max Ta = 25°C *1 1.30 W Operating temperature Topr –30 to +85 °C Storage temperature Tstg –55 to +125 °C *1 Mounted on a specified board: 70mm×70mm×1.2mm (4 layer glass epoxy) Caution 1) Absolute maximum ratings represent the values which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Recommendation Operating Condition at Ta = 25°C Parameter Symbol Conditions Supply voltage range1 VCC op VCC PWM frequency Fpwm PWM MODE Ratings Unit 2.7 to 5.5 V 300 to 100k Hz Electrical Characteristics Analog block at Ta = 25°C, VCC = 3.6V, unless otherwise specified Parameter Symbol Conditions Ratings min typ Unit max Standby current dissipation ICC1 SHUTDOWN 0 DC/DC current dissipation 1 ICC2 VOUT = 30V, ILED = 20mA 1 FB voltage Vfb LEDO1,2=20mA 5 μA mA 0.25 V Output current 1 lo1 LEDO 1 LEDO 2 9.5 10 10.5 μA Output current 2 lo2 LEDO 1 LEDO 2 19 20 21 μA Output current matching 1 lom1 LEDO1 LEDO 2 LEDISET=10mA –2 0.3 2 % Output current matching 2 lom2 LEDO1 LEDO 2 LEDISET=20mA –2 0.3 LEDO1,2 leak current llk LEDO1 LEDO2 OVP voltage 1 Vovp OVP SWOUT ON resistance Ron IL = 100mA 37 38 2 % 1 μA 39 250 NMOS switch current limit ILIM 1 OSC frequency Fosc 600 High level input voltage VINH SWIRE PWM 1.5 Low level input voltage VINL SWIRE PWM 0 Under voltage lockout Vuvlo VIN falling SWIRE output voltage Vack Rpullup = 15kΩ V mΩ A kHz VCC 0.4 2.2 V V V 0.4 V for Acknowledge Recommended SWIRE Timing at Ta = 25°C, VCC = 3.6V, unless otherwise specified Parameter SWIRE setup time Symbol Ton Conditions Ratings min typ max Unit μs 20 from shutdown SWIRE mode selectable time Tsel 1 SWIRE delay time to start Tw0 100 2.2 ms μs Tw1 260 μs Toff 8.9 digital mode detection SWIRE low time to switch to digital mode SWIRE low time to shutdown ms Continued on next page. No.A2203-2/12 LV52206XA Continued from preceding page. Parameter SWIRE start time for digital Symbol Ratings Conditions min typ Tstart 2 Tend 2 Unit max μs mode programming SWIRE end time for digital 360 μs mode programming SWIRE High time of bit 0 Th0 Bit detection = 0 2 180 μs SWIRE Low time of bit 0 Tl0 Bit detection = 0 Th0 × 2 360 μs SWIRE High time of bit 1 Th1 Bit detection = 1 Tl1 × 2 360 μs SWIRE Low time of bit1 Tl1 Bit detection = 1 2 DCDC startup delay Tdel Delay time of Acknowledge Tackd Duration of Acknowledge Tack 180 2 μs ms 2 μs 512 μs Block Diagram VBAT D1 L1 22μH or 10μH C2 1μF SW OVP VCC UVLO C1 ILIM OVP 1μF 0.6MHz PWM Controler TSD LEDO1 PWM/SWIRE CONTROL FCAP C3 LEDO2 GND 22nF GND L1: VL3012T-220M49 (TDK) VLS3012T-100M72 (TDK) D1: MBR0540T1 (ON semi) C2: GRM21BR71H105K (Murata) Fig.2 Block Diagram No.A2203-3/12 LV52206XA Pin Function PIN # A1 Pin Name Description LEDO1 Constant current output _pin1. A2 FCAP Filtering capacitor terminal for PWM mode. A3 VCC Supply voltage B1 LEDO2 Constant current output _pin2. B2 PWM / SWIRE 1-wire control and PWM dimming input (active High). B3 OVP Output voltage sense connection for over voltage sensing. C1 GND Ground. C2 GND Ground. C3 SW Switch pin. Drain of the internal power FET. Pd max - Ta Allowable power dissipation, Pd max - W 3.0 Mounted on a specified board: 70 70 1.2mm3 (4 layer glass epoxy) 2.5 2.0 1.5 1.30 1.0 0.52 0.5 0 - 30 0 30 60 90 120 Ambient temperature, Ta - Dimming Mode Selection Dimming Mode is selected by a specific pattern of the SWIRE within Tsel (1ms) from the startup of the device every time. In order to startup the device, the SWIRE must keep high for longer than Ton. PWM Mode The dimming mode is set to PWM mode when it is not recognized as a digital mode within Tsel. To enter Digital Mode, the SWIRE is required keeping in low state for Tw1 (See Fig.4). If the PWM frequency is used faster than 6.6kHz, the dimming mode is set to PWM mode only. But slower than 6.6kHz, it is necessary to avoid entering the digital mode condition, such as SWIRE keeps high for longer than Tsel. PWM is enabled after Tdel from Tsel. Ton Tsel Tdel Toff Shutdown SWIRE (PWM Freq > 6.6kHz) PWM Enable Tsel Tdel Toff Shutdown SWIRE (PWM Freq < 6.6kHz) PWM Enable Fig3. SWIRE Timing Diagram in PWM mode No.A2203-4/12 LV52206XA Digital Mode To enter Digital Mode, SWIRE should be taken high for more than Tw0 (100μs) from the first rising edge and keep low state for Tw1(260μs) before Tsel(1ms). Tdel Tsel Tw1 SWIRE Toff Shutdown Shutdown Device Address & data Tw0 Device Address & data Digital Mode Fig4. SWIRE Timing Diagram in Digital mode It is required sending the device address byte and the data byte to select VFB. The bit detection is determined by the ratio of Th and Tl (See Fig6). The start condition for the bit transmission required SWIRE high for at least Tstart. The end condition is required SWIRE low for at least Tend. When data is not being transferred, SWIRE is set in the “H” state. These registers are initialized with POR (Power On Reset). In the LV52206XA, the device address(DA7 to DA0) is specified as “01110011”. AKct is setting for the acknowledge response. If the device address and the data byte are transferred on AKct=1, the ACK signal is sent from the receive side to the send side. The acknowledge signal is issued when SWIRE on the send side is released and SWIRE on the receive side is set to low state. Register BIT Description DA7 7 0 DA6 6 1 DA5 5 1 Device DA4 4 1 Address DA3 3 0 DA2 2 0 DA1 1 1 DA0 0 1 Table1. Device Address Description Data Register BIT AKct 7 A1 6 Description 0 = Acknowledge disabled 1 = Acknowledge enabled Address bit1 A0 5 Address bit0 D4 4 Data bit 4 D3 3 Data bit 3 D2 2 Data bit 2 D1 1 Data bit 1 D0 0 Data bit 0 Table2. Data Description No.A2203-5/12 LV52206XA S 0 1 1 1 0 0 1 1 E Device Address S 0 1 1 1 0 0 ACK:Disable 1 1 E S Device Address S 0 A1 A0 D4 D3 D2 D1 D0 E S 1 A1 A0 D4 D3 D2 D1 D0 E ACK:Enable Start Condition E Data bit A Data bit End Condition A Acknowledge Fig5. Example of writing data Tstart Tstart DA7 DA0 D7 Tend D0 TI0 > Th0 * 2 Tend Device Address Data (DA7 to DA0) (D7 to D0) Acknowledge : Disable (D7 = 0) Tstart Tstart TI0 Th0 Low state (Bit=0) Tack A C K DA7 DA0 Tend D7 D0 TI1 > Th1 * 2 TI1 Th1 High state (Bit=1) Tack Device Address Data (DA7 to DA0) (D7 to D0) Acknowledge : Enable (D7 = 1) Fig6.Bit detection Diagram No.A2203-6/12 LV52206XA Table3 LED Current setting 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Table4 OVP setting A1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Address=00 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D4 0 0 D3 0 0 D2 0 0 D1 0 0 D0 0 1 D4 0 0 0 D3 0 0 0 D2 0 0 0 D1 0 0 1 D0 0 1 0 LED Current(mA) 0 0.5 1 1.5 2 2.5 3 3.5 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 *Default Address=01 A1 0 0 Table5 LEDOUT setting A1 1 1 1 A0 1 1 OVP(V) 38 41 *Default Adress=10 A0 0 0 0 LEDO1 ON ON OFF LEDO2 ON OFF ON *Default No.A2203-7/12 LV52206XA Start up and Shutdown The device becomes enabled when SWIRE is initially taken high. The dimming mode is determined within Tsel and the boost converter start up after Tdel. To place the device into shutdown mode, the SWIRE must be held low for Toff. PWM MODE VIN Tsel Tdel Toff SWIRE 200m * duty FB Shutdown delay FCAP DCDC_EN (internal signal) Digital MODE VIN Tdel Tsel Toff Tw1 SWIRE Device Address & data Tw0 Device Address & data Programed value Shutdown delay FB FCAP DCDC_EN (internal signal) Fig7.Start up and shutdown diagram No.A2203-8/12 LV52206XA Open LED Protection If OVP terminal voltage exceeds a threshold Vovp (38V typ) and LEDO terminal voltage less than 0.05V for 8 cycles, boost converter enters shutdown mode. In order to restart the IC, It is necessary to start it again from a shut down condition. Over Current Protection Current limit value for built-in power MOS is around 1A. The power MOS is turned off for each switching cycle when peak current through it exceeds the limit value. Under Voltage Lock Out (UVLO) UVLO operation works when VIN terminal voltage is below 2.2V. Thermal Shutdown When chip temperature is too high, boost converter is stopped. Application Circuit Diagram 10 LED Application 5x2 11 LED Application 11x1 12 LED Application 6x2 14 LED Application 7x2 L1: VLS3012T-220M49 (TDK), VLF504015MT-220M (TDK) D1: MBR0540T1 (ON semi), NSR05F40 (ONsemi) C2: GRM21BR71H105K (Murata), C1608X5R1H105K (TDK) L1:VLS3012E-220M(TDK), VLF504015MT-220M (TDK) D1:MBR0540T1 (ON semi), NSR05F40 (ONsemi) C2:GRM21BR71H105K(Murata), C1608X5R1H105K (TDK) Fig8. Various application circuit diagram No.A2203-9/12 LV52206XA Typical Characteristics (VIN = 3.6V, L = 22μH, T = 25°C, unless otherwise specified) Efficiency vs Output Current MODE=Digital LEDO Current vs. DATA Mode=Digital, LEDO1.LEDO2=0.5V Icc vs VIN MODE=PWM, Duty=100% 10LED, LEDO Current vs. PWM Duty Mode=PWM, 10kHz, LEDO1.LEDO2=0.5V Frequency vs VIN No.A2203-10/12 LV52206XA PACKAGE DIMENSIONS WLP9(1.19X1.19) unit : mm ORDERING INFORMATION Device LV52206XA-MH Package WLP9 (1.19x1.19) (Pb-Free) Shipping (Qty / Packing) 5000 / Tape & Reel No.A2203-11/12 LV52206XA ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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