Ordering number : ENA0943 LV5207LP Bi-CMOS IC LED Driver for Cellular Phone http://onsemi.com Overview The LV5207LP is an LED driver IC for cellular phones. It incorporates 7 LED drivers (tricolor and main) and a charge pump circuit. The LV5207LP allows each LED current value to be regulated by a serial bus and has a function to synchronize a ringtone melody. Functions • Charge pump ×1/×1.5 mode switchover The mode switches (step-up only and no step down) when the LED pin voltage goes down. When VBAT is 4.6V and above, this IC becomes only ×1 mode. • LED drivers Main LCD backlight LED×4 (LED current 5-bit changeover 0.8mA to 19.4mA) Tricolor LED driver×1 (LED current 5-bit changeover 0.8mA to 19.4mA Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Symbol Conditions VCC max Ratings Unit 4.5 Maximum pin voltage V1 max LED driver and change pump blocks Allowable power dissipation Pd max Mounted on a board* V 7 V 0.8 W Operating temperature Topr -30 to +75 °C Storage temperature Tstg -40 to +125 °C * Designated board : 40mm×50mm×0.8mm, glass epoxy 4-layer board (2S2P) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 August, 2013 22008 MS PC 20070220-S00003 No.A0943-1/14 LV5207LP Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage 1 VBAT 3.0 to 4.5 V Supply voltage 2 VDD 1.7 to VBAT V Electrical Characteristics Ta = 25°C, VBAT = 3.7V Parameter Symbol Ratings Conditions min Current drain typ Unit max ICC1 STBY : L (standby mode) 0 5 μA ICC2 STBY : H (sleep mode) 0.3 5 μA ICC3 Charge pump opetates. 4 7 mA VO1 IO = 100mA, ×1 Charge pump block Output voltage VO2 Load current 3.4 IO = 100mA, ×1.5 V 4.7 V ×1.5 mode 120 LED pin voltage, when main current is set to 20mA 0.32 0.35 0.38 V 400 500 600 kHz mA mA Charge pump switchover voltage Threshold voltage 1 VD1 Charge pump clock block Clock frequency Fosc LED driver block Minimum output current 1 IMIN1 Tricolor LED driver serial data = #00 0.2 0.8 1.7 Minimum output current 3 IMIN3 Main LED driver serial data = #00 0.2 0.8 1.7 mA Maximum output current 1 IMAX1 Tricolor LED driver serial data = #FF 18.4 19.4 20.4 mA Maximum output current 3 IMAX3 Main LED driver serial data = #FF 18.4 19.4 20.4 mA LE *1 -2 2 LSB Differential linearity error DLE *2 -2 2 LSB Maximum output current 1 ΔIL1 Tricolor LED driver maximum current setting Nonlinearity error -10 % -10 % VO = 4 to 0.35V Maximum output current 3 ΔIL3 Main LED driver maximum current setting VO = 2 to 0.35V Leakage current 1 IL1 Tricolor LED driver and LED driver : OFF 1 μA 1 μA VO = 5V Leakage current 3 IL3 Main LED driver and LED driver : OFF VO = 5V Control circuit block H level 1 VINH1 Input H level serial, SCTL VDD×0.8 L level 1 VINL1 Input L level serial, SCTL 0 H level 2 VINH2 Input H level reset 1.5 L level 2 VINL2 Input L level reset 0 V VDD×0.2 V V 0.3 V *1 Nonlinearity error : Error from the ideal current value. *2 Differential linearity error : Error from the ideal increment when increase by a 1 bit is made. No.A0943-2/14 LV5207LP Package Dimensions unit : mm (typ) 3322 SIDE VIEW TOP VIEW BOTTOM VIEW 13 18 12 19 3.5 (C0.116) (0.13) (0.125) 3.5 0.4 7 24 6 1 (0.5) 0.5 0.25 (0.035) 0.83 SIDE VIEW SANYO : VCT24(3.5X3.5)X01 2B OUT 1B 2A 1A PGND Pin Assignment 24 23 22 21 20 19 TEST 1 18 PVCC SCTL 2 17 VDD RT 3 16 SDATA LV5207LP SGND 4 15 SCLK Top view CPTC 5 14 RESET RLED 6 7 8 9 10 11 12 GLED BLED LEDGND1 MLED1 MLED2 MLED3 13 MLED4 No.A0943-3/14 LV5207LP Block Diagram and Sample Application Circuit VBAT 2.2μF 4.7μF 2.2μF 24 TEST SCTL 1 23 22 21 20 PGND 1A 2A 1B 2B OUT 2.2μF 19 18 Charge pump ×1/×1.5 PVCC 2 17 VDD 47kΩ SGND 3 IREF 16 SERIAL I/F RT 4 SDATA 15 SCLK 0.01μF RESET LED DRIVER 6 13 MLED4 11 12 MLED3 10 MLED2 9 MLED1 8 GLED 7 LEDGND1 RLED 14 BLED CPTC 5 * The value of the external capacitor connected to the charge pump circuit can be reduced depending on the load current. The minimum rating of the Load current doesn't increase even if 2.2μF or more capacitor is used. Pin Functions Pin No. 1 Pin name TEST Pin Description Test signal input pin. Be sure to connect the pin to GND. 2 SCTL Equivalent Circuit PVCC External tricolor LED control pin. VDD When serial RSW, GSW, and BSW are set to ON, setting the application voltage H causes tricolor LED to go ON. When the application voltage set to L, tricolor LED goes OFF. Note that if the setial setting STLEN is set to ignore SCTL, tricolor LED goes ON regardless of the state of SCTL. 3 RT Reference current setting resistor connection pin. By connecting the external resistor between this pin and PVCC GND, the reference current is generated. The pin voltage is about 1V. Change of this current value enebles change of the oscillation frequency and LED driver current value. 4 SGND GND pin for circuits other than the power circuit Continued on next page. No.A0943-4/14 LV5207LP Continued from preceding page. Pin No. 5 Pin name CPTC Pin Description Charge pump soft start capacitor connection pin. By connecting the capacitor, charge pump can be soft Equivalent Circuit PVCC charge pump output is short-circuited. 10kΩ 1kΩ 1kΩ started. The pin is held high in STBY mode or when the 6 RLED Tricolor LED driver pins. 7 GLED Feedback is applied so that the current flow through the 8 BLED output transistor becomes equal to the set current value. Each driver output current value can be adjusted independently with the 0.6 step from about 0.8mA to 19.4mA through serial setting. These pins are turned ON only when the SCTL pin is set high or the serial SCTEN pin is set to ignore SCTL. These pins function as the charge pump switchover detection pin from ×1 mode to ×1.5 mode. Pin voltage of about 0.5V or lower switches the charge pump to ×1.5 mode. 9 LEDGND1 GND pin dedicated to LED driver. 10 MLED1 Main LCD backlight LED driver pin. 11 MLED2 Feedback is applied so that the current flow through the 12 MLED3 output transistor becomes equal to the set current 13 MLED4 value. The driver current value can be adjusted with 0.6mA step from aboput 0.8mA to 19.4mA through serial setting. These pins function as the charge pump switchover detection pin from ×1 mode to ×1.5 mode. When MAX current is set, the pin voltage of about 0.35V or lower switches the charge pump to ×1.5 mode. If three MLED are used, MLED4 can be independently set ON/OFF with serial setting. Note that MLED4 :ON is active only with MSW:ON. Connect MLED4 pin to VBAT when it is not to be used. RESET Reset signal input pin. The pin is in the reset state when it is set to L. 15 SCLK Serial clock input pin 16 SDATA Serial data signal input pin. 17 VDD PVCC 0.2μA 14 VDD VDD Power pin for SCLK, SDATA, and SCTL pin input circuits. 18 PVCC Power pin 19 PGND GND pin for charge pump circuit Continued on next page. No.A0943-5/14 LV5207LP Continued from preceding page. Pin No. Pin name Pin Description 20 1A 21 2A Charge pump clock driver pin. 22 1B Charge pump charge transfer driver pin. 23 OUT Charge pump output pin. 24 2B Charge pump charge transfer driver pin. Equivalent Circuit PVCC No.A0943-6/14 LV5207LP Serial Bus Communication Specifications I2C serial transfer timing conditions twH SCL th1 twL th2 tbuf SDA th1 ts2 ts1 ts3 Resend start condition Start condition ton Stop condition tof Input waveform condition Standard mode Parameter symbol Conditions min typ SCL clock frequency Data setup time ts1 SCL setup time relative to falling edge of SDA 4.7 ts2 SDA setup time relative to rising edge of SCL 250 ns ts3 SCL setup time relative to rising edge of SDA 4.0 μs th1 SCL hold time relative to rising edge of SDA 4.0 μs th2 SDA hold time relative to falling edge of SCL 0 μs twL SCL pulse width for the L period 4.7 μs twH SCL pulse width for the H period 4.0 ton SCL, SDA (input) rise time 1000 tof SCL, SDA (input) fall time 300 tbuf Time between STOP and START conditions Pulse width Input waveform conditions Bus free time 100 unit fscl Data hold time 0 max SCL clock frequency kHz μs μs ns ns μs 4.7 High-speed mode Parameter Symbol Conditions min typ SCL clock frequency Data setup time ts1 SCL setup time relative to falling edge of SDA 0.6 ts2 SDA setup time relative to rising edge of SCL 100 ns ts3 SCL setup time relative to rising edge of SDA 0.6 μs th1 SCL hold time relative to rising edge of SDA 0.6 μs th2 SDA hold time relative to falling edge of SCL 0 μs twL SCL pulse width for the L period 1.3 μs twH SCL pulse width for the H period 0.6 ton SCL, SDA (input) rise time 300 tof SCL, SDA (input) fall time 300 tbuf Time between STOP and START conditions Pulse width Input waveform conditions Bus free time 1.3 400 unit fscl Data hold time 0 max SCL clock frequency kHz μs μs ns ns μs No.A0943-7/14 LV5207LP I2C bus transmission method Start and stop conditions In the I2C bus, SDA must basically be kept in the constant state while SCL is "H" as shown below during data transfer. SCL SDA ts2 th2 When data transfer is not made, both SCL and SDA are in the "H" state. When SCL = SDA = "H", change of SDA from "H" to "L" enables the start conditions to start access. When SCL is "H", change of SDA from "L" to "H" enables the stop conditions to stop access. Start condition Stop condition th1 ts3 SCL SDA Data transfer and acknowledgement response After establishment of start conditions, data transfer is made by one byte (8 bits). Data transfer enables continuous transfer of any number of bytes. Each time the 8-bit data is transferred, the ACK signal is sent from the receive side to the send side. The ACK signal is issued when SDA on the send side is released and SDA on the receive side is set "L" immediately after fall of the clock pulse at the SCL eighth bit of data transfer to "L". When the next 1-byte transfer is left in the receive state after transmission of the ACK signal from the receive side, the receive side releases SDA at fall of the SCL ninth clock. In the I2C bus, there is no CE signal. Instead, 7-bit slave address is assigned to each device and the first byte of transfer is assigned to the command (R/W) representing the 7-bit slave address and subsequent transfer direction. Note that only WRITE is valid in LV5207LP. The 7-bit address is transferred sequentially from MSB and the eight bit is "L" representing WRITE. In LV5207LP, the slave address is specified as (1110101). Start M S B Slave address L S B W A C K M S B Register address L S B A C K M S B L S B Data A C K STOP SCL SDA (WRITE) 1 1 1 0 1 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 No.A0943-8/14 LV5207LP Serial modes setting Address 0 0 0 0 D1 BSW 0 OFF 1 ON D2 GSW 0 OFF 1 ON D3 RSW 0 OFF 1 ON D4 CKSW 0 OFF 1 ON D5 C10 0 OFF 1 ON D6 SCTEN 0 0 SCTL enabled 1 SCTL disabled D7 CPSW 0 OFF 1 ON Data 0 0 0 D7 D6 D5 D4 D3 D2 D1 0 BLED output setting * Default GLED output setting * Default RLED output setting * Default Charge pump clock switchover * Default Use divided frequency (1/2) Charge pump force ×1 mode * Default SCTL signal enable * Default Charge pump ON/OFF setting * Default No.A0943-9/14 LV5207LP Address 0 Data 0 0 0 0 0 D4 D3 D2 D1 D0 Current value (mA) 0 0 0 0 0 0.8 0 0 0 0 1 1.4 0 0 0 1 0 2.0 0 0 0 1 1 2.6 0 0 1 0 0 3.2 0 0 1 0 1 3.8 0 0 1 1 0 4.4 0 0 1 1 1 5.0 0 1 0 0 0 5.6 0 1 0 0 1 6.2 0 1 0 1 0 6.8 0 1 0 1 1 7.4 0 1 1 0 0 8.0 0 1 1 0 1 8.6 0 1 1 1 0 9.2 0 1 1 1 1 9.8 1 0 0 0 0 10.4 1 0 0 0 1 11.0 1 0 0 1 0 11.6 1 0 0 1 1 12.2 1 0 1 0 0 12.8 1 0 1 0 1 13.4 1 0 1 1 0 14.0 1 0 1 1 1 14.6 1 1 0 0 0 15.2 1 1 0 0 1 15.8 1 1 0 1 0 16.4 1 1 0 1 1 17.0 1 1 1 0 0 17.6 1 1 1 0 1 18.2 1 1 1 1 0 18.8 1 1 1 1 1 19.4 D6 MLED4 0 OFF 1 ON D7 MSW 0 OFF 1 ON 0 1 D7 D6 0 D4 D3 D2 D1 D0 Main LED current value setting * Default MAIN LED4 output setting * Default MAIN LED output setting * Default No.A0943-10/14 LV5207LP Address 0 Data 0 0 0 0 0 D4 D3 D2 D1 D0 1 0 0 Current Value (mA) 0 0 0 0 0 0.8 0 0 0 0 1 1.4 0 0 0 1 0 2.0 0 0 0 1 1 2.6 0 0 1 0 0 3.2 0 0 1 0 1 3.8 0 0 1 1 0 4.4 0 0 1 1 1 5.0 0 1 0 0 0 5.6 0 1 0 0 1 6.2 0 1 0 1 0 6.8 0 1 0 1 1 7.4 0 1 1 0 0 8.0 0 1 1 0 1 8.6 0 1 1 1 0 9.2 0 1 1 1 1 9.8 1 0 0 0 0 10.4 1 0 0 0 1 11.0 1 0 0 1 0 11.6 1 0 0 1 1 12.2 1 0 1 0 0 12.8 1 0 1 0 1 13.4 1 0 1 1 0 14.0 1 0 1 1 1 14.6 1 1 0 0 0 15.2 1 1 0 0 1 15.8 1 1 0 1 0 16.4 1 1 0 1 1 17.0 1 1 1 0 0 17.6 1 1 1 0 1 18.2 1 1 1 1 0 18.8 1 1 1 1 1 19.4 0 0 D4 D3 D2 D1 D0 RLED current value setting * Default No.A0943-11/14 LV5207LP Address 0 Data 0 0 0 0 0 D4 D3 D2 D1 D0 1 1 0 Current Value (mA) 0 0 0 0 0 0.8 0 0 0 0 1 1.4 0 0 0 1 0 2.0 0 0 0 1 1 2.6 0 0 1 0 0 3.2 0 0 1 0 1 3.8 0 0 1 1 0 4.4 0 0 1 1 1 5.0 0 1 0 0 0 5.6 0 1 0 0 1 6.2 0 1 0 1 0 6.8 0 1 0 1 1 7.4 0 1 1 0 0 8.0 0 1 1 0 1 8.6 0 1 1 1 0 9.2 0 1 1 1 1 9.8 1 0 0 0 0 10.4 1 0 0 0 1 11.0 1 0 0 1 0 11.6 1 0 0 1 1 12.2 1 0 1 0 0 12.8 1 0 1 0 1 13.4 1 0 1 1 0 14.0 1 0 1 1 1 14.6 1 1 0 0 0 15.2 1 1 0 0 1 15.8 1 1 0 1 0 16.4 1 1 0 1 1 17.0 1 1 1 0 0 17.6 1 1 1 0 1 18.2 1 1 1 1 0 18.8 1 1 1 1 1 19.4 0 0 D4 D3 D2 D1 D0 GLED current value setting * Default No.A0943-12/14 LV5207LP Address 0 Data 0 0 0 0 1 D4 D3 D2 D1 D0 0 0 0 Current Value (mA) 0 0 0 0 0 0.8 0 0 0 0 1 1.4 0 0 0 1 0 2.0 0 0 0 1 1 2.6 0 0 1 0 0 3.2 0 0 1 0 1 3.8 0 0 1 1 0 4.4 0 0 1 1 1 5.0 0 1 0 0 0 5.6 0 1 0 0 1 6.2 0 1 0 1 0 6.8 0 1 0 1 1 7.4 0 1 1 0 0 8.0 0 1 1 0 1 8.6 0 1 1 1 0 9.2 0 1 1 1 1 9.8 1 0 0 0 0 10.4 1 0 0 0 1 11.0 1 0 0 1 0 11.6 1 0 0 1 1 12.2 1 0 1 0 0 12.8 1 0 1 0 1 13.4 1 0 1 1 0 14.0 1 0 1 1 1 14.6 1 1 0 0 0 15.2 1 1 0 0 1 15.8 1 1 0 1 0 16.4 1 1 0 1 1 17.0 1 1 1 0 0 17.6 1 1 1 0 1 18.2 1 1 1 1 0 18.8 1 1 1 1 1 19.4 0 0 D4 D3 D2 D1 D0 BLED current value setting * Default No.A0943-13/14 LV5207LP Serial map Address Data A7 A6 A5 A4 A3 A2 A1 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 1 0 1 D7 D6 D5 D4 D3 D2 D1 D0 CPSW SCTEN C10 CKSW RSW GSW BSW × 0 0 0 0 0 0 0 0 MSW MLED4 × 0 0 0 0 0 × × × 0 0 0 0 0 × × × 0 0 0 0 0 0 0 × × × 0 0 0 MC [4 : 0] 0 0 0 0 0 RC [4 : 0] 0 GC [4 : 0] 0 0 0 BC [4 : 0] 0 0 0 Table upper stage : Register name 0 Table lower stage : Default value ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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