Ordering number : EN5708A STK673-010-E Thick-Film Hybrid IC Bipolar Fixed-Current Chopper (external excitation PWM) Built-in Microstepping Control http://onsemi.com 3-Phase Stepping Motor Driver (sine wave drive) Output Current 2.4A Overview The STK673-010-E is a 3-phase stepping motor driver hybrid IC with built-in microstep controller having a bipolar constant current PWM system, in which a power MOSFET is employed at an output stage. It includes a 3-phase distributed controller for a 3-phase stepping motor to realize a simple configuration of the motor driver circuit. The number of motor revolution can be controlled by the frequency of external clock input. 2, 2-3, W2-3 and 2W2-3phase excitation modes are available. The basic step angle of the stepping motor can be separated as much as one-eighth 2-3-phase to 2W2-3-phase excitation mode control quasi-sine wave current, thereby realizing low vibration and low noise. Applications • As a 3-phase stepping motor driver for transmission and reception in a facsimile. • As a 3-phase stepping motor driver for feeding paper feed or for an optical system in a copying machine. • Industrial machines or products employing 3-phase stepping motor driving. Features • Number of motor revolution can be controlled by the frequency of external clock input. • 4 types of modes, i.e., 2, 2-3, W2-3 and 2W2-3-phase excitations, are available which can be selected based on rising of clock signals, by switching Highs and Lows of Mode A and Mode B terminals. • Setting a Mode C terminal Low allows an excitation mode that is based on rising and falling of a clock signal. By setting the Mode C terminal Low, phases that are set only by Mode A and Mode B can be changed to other phases as follows without changing the number of motor revolution: 2-phase may be switched to 2-3-phase; 2-3-phase may be switched to W2-3-phase; and W2-3-phase may be switched to 2W2-3-phase. • Phase is maintained even when the excitation mode is changed. • An MOI output terminal which outputs 1 pulse per 1 cycle of phase current. • A CW/CCW terminal which switches the rotational direction. • A Hold terminal which temporarily holds the motor in a state where the phase current is conducted. • An Enable terminal which can forcibly turns OFF a MOSFET of a 6 output driving element in normal operation. • Schmitt inputs with built-in pull-up resistor (20kΩ typ) • Motor current can be set by changing the voltage of the Vref terminal (0.63V per 1A, dealing as much as 0 to 1/2VCC2 (4A)). • The clock input for controlling the number of motor revolution lies in a range of 0 to 50kHz. • Supply voltage: VCC1 = 16 to 30V, VCC2 = 5.0V ±5% • A built-in current detection resistor (0.227Ω) • A motor current during revolution can deal with as high as 2.4A at Tc = 105°C and as high as 4A at Tc = 50°C or lower. Semiconductor Components Industries, LLC, 2013 June, 2013 61108HKIM/N2997HA (ID) No.5708-1/15 STK673-010-E Specifications Maximum Ratings at Tc = 25°C Parameter Symbol Conditions Maximum supply voltage 1 VCC1 max VCC2 = 0V Maximum supply voltage 2 VCC2 max Ratings Unit 36 V V No signal -0.3 to +7.0 Input voltage VIN max Logic input pins -0.3 to +7.0 V Phase output current IO max VCC2 = 5 V, CLOCK ≥ 100Hz 4.0 A Operating substrate temperature Tc max 105 °C Junction temperature Tj max 150 °C Storage temperature Tstg -40 to +125 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Allowable Operating Ranges at Ta = 25°C Parameter Symbol Conditions Ratings Unit Operating supply voltage 1 VCC1 With signal 16 to 30 V Operating supply voltage 2 VCC2 With signal 5.0V ± 5% V 0 to VCC2 V Input voltage VIH Phase output current 1 IO1 Without heat sink 1.7 A Phase output current 2 IO2 Tc = 105°C 2.4 A Clock frequency fCL Pin 11 input frequency 0 to 50 kHz Electrical Characteristics at Tc = 25°C, VCC1 = 24V, VCC2 = 5V Parameters Symbol Rating Conditions min VCC2 supply current ICCO Effective output current Ioave Enable=Low Each phase R/L=2Ω /6mH 2W2-3-phase excitation Vref = 0.61V FET diode forward voltage Vdf If= 1A (RL=23Ω) Output saturation voltage Vsat RL = 23Ω Output leakage current IOL RL = 23Ω Input high voltage VIH 9 terminals, Pins 11 to 18, 22 Input low voltage VIL 9 terminals, Pins 11 to 18, 22 Input current Vref input voltage Vref input current IIL VrH Ir Pins 11 to 18 pin = GND level pull-up resistance 20kΩ (typ) Pin 10, pin 10 = 2.5V Internal resistance 40kΩ (typ) VOH Pin 20, pin 20 to 19 = 820Ω MOI output low voltage VOL Pin 20, pin 21 to 20 = 1.6kΩ fc unit max 6.1 12 0.69 0.76 Arms 1.0 1.6 V 0.45 0.56 V 0.1 mA 4.0 115 440 mA V 250 Pin 10 MOI output high voltage PWM frequency 0.62 typ 625 1.0 V 550 μA VCC2/2 V 810 μA 2.5 V 0.4 63 V kHz Note: Constant voltage supply is used. No.5708-2/15 STK673-010-E Package Dimensions unit:mm (typ) 4130 78.0 8.5 1 28.0 21.0 16.5 3.6 32.0 70.0 2.0 (8.0) 0.5 27 4.0 28 0.4 2=54 2.9 Electrical Characteristics 2 at Tc = 25°C, VCC1 = 24V, VCC2 = 5V Current division ratio at phase current of 1/4 electrorotation, in each excitation mode (unit = %, typ.) Number of current division is put in parentheses. Current division 2 phase (1) 2-3 phase (3) W2-3 phase (6) 1/96 0 2/96 0 3/96 2W2-3 phase (12) 0 13 4/96 5/96 0 26 26 6/96 38 7/96 8/96 50 9/96 50 50 10/96 61 11/96 12/96 71 13/96 71 14/96 79 15/96 16/96 17/96 100 87 87 87 18/96 92 19/96 20/96 96 21/96 96 22/96 23/96 24/96 98 100 100 100 Note: Constant voltage supply is used as power supply. Electrical Characteristic 2 represents design values. Measurement for controlling the standard value is not conducted. No.5708-3/15 STK673-010-E Equivalent Block Diagram 8 VCC1A 7 VZ Charging pump (CHGP) GND2 9 VCC2(5V) 21 Clock Mode A Mode B Mode C TU 11 12 13 18 22 Hold CW / CCW Enable Reset MOI 14 15 16 17 20 F1, F2, F3 current detection Time chart generation F1, F2, F3 PWM control F1 F2 F3 4 23 6 24 5 25 F4, F5, F6 PWM control F4 F5 Vref 10 Reference clock CR oscillator 1 VCC1B 2 VCC1C VCC side level shift Step switching of ref. voltage for setting current UO UI VO VI WO WI F6 F4, F5, F6 current detection GND side level shift SUB 27 P. GNDA 28 P. GNDB GND1 19 ITF00807 Sample Application Circuit STK673-010-E 7 8 1 2 11 12 13 18 22 14 15 16 17 20 Clock Mode A Mode B Mode C TU Hold CW / CCW Enable Reset MOI Vref + R02 10 19 C3 0.1μF VCC1 16 to 30V U 4 23 6 24 R01 C4 10μF + C2 2.2μF 21 VCC2(5V) 5 25 9 27 28 V 3-phase stepping motor W C5 0.01μF + C1 220μF P. GND ITF00808 No.5708-4/15 STK673-010-E Set Equation of Output Current IO Peak Value IO peak = Vref ÷ K K = 0.63 (V/A) Vref ≤ 0.5 × VCC2 Vref = VCC2 × Rox ÷ (R01 + Rox) Rox = (R02 × 4.0kΩ) ÷ (R02 + 4.0kΩ) • R02 is preferably set to be 100Ω in order to minimize the effect of the internal impedance (4.0kΩ ±30%) of STK673-010-E • For noise reduction in 5V system, put the GND side of bypass capacitor (220μF) of VCC1 (shown in a thick line in the above Sample Application Circuit) in the vicinity of pins 27 and 28 of the hybrid IC. • Set the capacitance value of the bypass capacitor C1 such that a ripple current of a capacitance, which varies in accordance with the increase of motor current, lies in an allowable range. • K in the above-mentioned set equation varies within ±5 to ±10% depending on the inductance L and resistance value R of the used motor. Check the peak value setting of IO upon actual setting. where Input/Output Terminals Functions of 5V System Terminal name No. Conditions upon Functioning Function 0 = Low, 1 = High Basic clock for switching phase current of motor Rising edge in Mode C = 1 Input frequency range: DC to 50kHz Rising and falling edge in Mode C = 0 Clock 11 Mode A 12 Sets excitation mode See table listed below Mode B 13 Sets excitation mode See table listed below Mode C 18 Sets excitation mode See table listed below Sets excitation mode See table listed below TU 22 Switches 2-3 phase excitation of step current to rectangular current Hold 14 Temporarily holds the motor in a state 0 CW/CCW 15 Switches the rotational direction of the motor 1 = CW, 0 = CCW Enable 16 Turns OFF all of the driving MOSFET 0 Reset 17 System reset Make sure to input a reset signal of 10μs or more 0 MOI 20 Monitors the number of revolution of the motor Vref 10 Sets the peak value of the motor current set at 0.63V per 1A Minimum pulse width: 10μs High level duty: 40 to 60% More effective in increasing torque than in lowering vibration of motor Outputs 1 pulse of a high level signal per one cycle of phase current Maximum value 0.5 × VCC2 (4A max) Excitation Mode Table Input condition Excitation No. Excitation Mode Number of current steps Number of clock pulse per one cycle of Mode A Mode B Mode C TU 0 0 1 1 (1) 2-phase 1 6 0 1 1 1 (2) 2-3-phase 3 12 0 1 1 0 (3) 2-3-phase TU 1 12 1 0 1 1 (4) W2-3-phase 6 24 1 1 1 1 (5) 2W2-3-phase 12 48 0 0 0 1 (6) 2-3-phase 3 6 phase current 0 0 0 0 (7) 2-3-phase TU 1 6 0 1 0 1 (8) W2-3-phase 6 12 1 0 0 1 (9) 2W2-3-phase 12 24 As shown in the table, TU terminal is only effective for Excitation Nos. (3) and (7). Although the present hybrid IC is not damaged even when TU = 0 is mistakenly input in Excitation, other than Excitation Nos. (3) and (7), motor vibration or motor current may increase. * Timing charts for 3-phase stepping motor driver is illustrated on pages 9 to 13 for exemplary operations of Enable Hold, CW/CCW for Excitation Nos. (1), (2), (3), (4), (5) and (9), and Excitation No. (4). No.5708-5/15 STK673-010-E Notes On Use (1) Input terminal use of 5V system [RESET and Clock (timing of input signal upon rising of power supply)] The driver is configured to include a 5V system logic section and a 24V MOSFETs section. The MOSFETs on both VCC1 side and GND side are N-channels. Thus, the MOSFETs on the VCC1 side is provided with a charging pump circuit for generating a voltage higher than that of VCC1. When a Low signal is input to a RESET terminal for operating the RESET, the charging pump is stopped. After the release of the RESET (High input), it requires a period of 1.7ms to rise the charging pump. Accordingly, even when a Clock signal is input during the rising of the charging pump circuit, the MOSFET cannot be operated. Such a timing needs to be taken into consideration for inputting a Clock signal. An example of timing is shown in Figure 1. Rising of 5V power supply RESET signal input Clock signal > 10μs > 1.7ms ITF00809 Figure 1. Timing chart of RESET signal and Clock signal When the RESET terminal switches from Low to High where a High period is 1.7ms or longer and the Clock input is conducted in a Low state, each phase current of the motor is maintained at the following values. Phase Current in the case where the initial Clock signal is maintained Current in the case where the initial Clock signal is maintained at Low level (Other than 2-3-phase TU excitation) at Low level (2-3-phase TU excitation) U phase 0 0 V phase -87% of peak current during normal rotation -100% of peak current during normal rotation W phase +87% of peak current during normal rotation +100% of peak current during normal rotation Refer to the timing charts for operations. [Clock] Clock signals should be input under the following conditions so that all 9 types of excitation modes shown in the Excitation Mode Table. Input frequency range DC to 50kHz Minimum pulse width 10μs High level duty 40 to 60% When Mode C is not used, it is an operation based on rising of the Clock and thus the above-mentioned condition of high level duty is negligible. A minimum pulse width of 10μs or more allows excitation operation by Mode A and Mode B. Since the operation is based on rising and falling of the Clock under the use of Mode C, it is most preferable to set the high level duty to 50% so as to obtain uniform step-wise current widths. [Mode A, Mode B, Mode C and TU] These 4 terminals allow selection of excitation modes. For specific operations, refer to Excitation Mode Table and Timing Charts. No.5708-6/15 STK673-010-E [Hold, CW/CCW] Hold temporary holds the motor while a phase current of the motor is conducted, even when there are clock inputs of Low input. High input releases the hold, and the motor current changes again synchronizing with the rising of Clock signals. Refer to Timing Chart for exemplary operations. CW/CCW switches the rotational direction of the motor. Switching to High gives a rotational operation of CW, and Low gives a rotation operation of CCW. The timing of switching the rotation is synchronizes the rising of the clock signals. Refer to Timing Chart for exemplary operations. [Enable] High input renders a normal operation and Low input forcibly renders a gate signal of MOSFETs Low, thereby cutting a motor current. Once again High input renders a current to conduct in the motor. The timing of the current does not synchronize with the clock. Since Low input of Enable forcibly cuts the motor current, it can be used to cut a V-phase or W-phase while Clock is maintained in a Low level state after the RESET operation. Rising of 5V power supply RESET signal input Clock signal > 10μs Enable signal > 1.7ms > 10μs ITF00810 Figure 2. Input timings of RESET signal, Enable signal and Clock signal [Vref (Setting motor current peak value)] A peak value of a motor current IO is determined by R01, R02, VCC2 (5V) and the following set equation (I). Set equation of peak value of motor current IO IO peak = Vref ÷ K (I) where Vref ≤ 0.5 × VCC2 K = 0.63 (V/A) Vref = VCC2 × Rox ÷ (R01 + Rox) Rox = (R02 × 4.0kΩ) ÷ (R02 + 4.0kΩ) • R02 is preferably set to be 100Ω in order to minimize the effect of the internal impedance (4.0kΩ ± 30%) of STK673-010-E • K in the above-mentioned set equation varies with in ±5 to ±10% depending on the inductance L and resistance value R of the used motor. Check the peak value setting of IO upon actual setting. * Refer to Figure 4 for an example of Vref-IO characteristics (2) Allowable operating ranges of motor current Set the peak value of the motor current IO so as to lie within a region below the curve shown in Figure 5 on page 13. When the operation substrate temperature Tc is set to 105°C, IO max should be 2.4A or lower and a Hold operation should be conducted where IO max is 2.0A or lower. For operation where Tc = 50°C, IO max should be 4.0A or lower and a Hold operation should be conducted where IO max is 3.3A or lower. No.5708-7/15 STK673-010-E (3) Heat Radiation Design Heat radiation design for reducing the operation substrate temperature of the hybrid IC is effective in enhancing the quality of the hybrid IC. The size of a heat sink varies depending on the average power loss Pd in the hybrid IC. As shown in Figure 6 on page 14, Pd increases in accordance with the increase of the output current. Since the starting current and the stationary current coexist in an actual motor operation, Pd cannot be obtained only from the data shown in Figure 6. Therefore, Pd is obtained assuming that the timing of the actual motor operation is a repeated operation shown in the following Figure 3. T1 T2 T1: Starting time of positive rotation IO1 Positive rotation current T2: Stationary time of positive rotation T4 T3 T3: Starting time of reverse rotation IO2 T4: Stationary time of reverse rotation 0 IO3 T0: One cycle time of repeated motor operation P1: Pd of IO1 Reverse rotation current P2: Pd of IO2 T0 P3: Pd of IO3 IO4 P4: Pd of IO4 ITF00811 Figure 3. Timing Chart of Motor Operation The average power loss Pd in the hybrid IC upon an operation shown in Figure 3 can be obtained by the following equation (II): Pd = (T1 × P1 + T1 × P2 + T3 × P3 + T4 × P4) ÷ T0 (II) When the value obtained by the above equation (II) is equal to or less than 3.4W and the ambient temperature Ta is equal to or lower than 60°C, there is no need of providing a heat sink. Refer to Figure 7 for data of the operation substrate temperature when no heat sink is used. The size of the heat sink can be decided depending on θc-a obtained by the following equation (III) and from Figure 8. θc-a = (Tc max – Ta) ÷ Pd (III) where Tc max: Maximum operation substrate temperature = 105°C Ta: Ambient temperature of hybrid IC Although heat radiation design can be realized by following the above equations (II) and (III), make sure to check that the substrate temperature Tc is equal to or lower than 105°C after mounting the hybrid IC into a set. No.5708-8/15 STK673-010-E Timing Chart of 3-phase Stepping Motor Driver 2-phase excitation Mode A Mode B Reset Enable Hold Mode C CW / CCW Clock MOI U phase excitation 0 V phase excitation 0 W phase excitation 0 TU ITF00812 2-3 phase excitation Mode A Mode B Reset Enable Hold Mode C CW / CCW Clock MOI U phase excitation 0 V phase excitation 0 W phase excitation 0 TU ITF00813 No.5708-9/15 STK673-010-E 2-3 phase excitation TU Mode A Mode B Reset Enable Hold Mode C CW / CCW Clock MOI U phase excitation 0 V phase excitation 0 W phase excitation 0 TU ITF00814 W2-3 phase excitation Mode A Mode B Reset Enable Hold Mode C CW / CCW Clock MOI U phase excitation 0 V phase excitation 0 W phase excitation 0 TU ITF00815 No.5708-10/15 STK673-010-E 2W2-3 phase excitation Mode A Mode B Reset Enable Hold Mode C CW / CCW Clock MOI U phase excitation 0 V phase excitation 0 W phase excitation 0 TU ITF00816 W2-3 phase excitation (Enable operation) Mode A Mode B Reset Enable Hold Mode C CW / CCW Clock MOI U phase excitation 0 V phase excitation 0 W phase excitation 0 TU ITF00817 No.5708-11/15 STK673-010-E W2-3 phase excitation (Hold operation) Mode A Mode B Reset Enable Hold Mode C CW / CCW Clock MOI U phase excitation 0 V phase excitation 0 W phase excitation 0 TU ITF00818 W2-3 phase excitation (CW/CCW operation) Mode A Mode B Reset Enable Hold Mode C CW / CCW Clock MOI U phase excitation 0 V phase excitation 0 W phase excitation 0 TU ITF00819 No.5708-12/15 STK673-010-E W2-3 phase excitation to 2W2-3 phase excitation (Mode C operation) Mode A Mode B Reset Enable Hold Mode C CW / CCW Clock MOI U phase excitation 0 V phase excitation 0 W phase excitation 0 TU ITF00820 Vref - IO Figure 4 2.5 Ro ta 4.0 4.0A 3.5 2.0 1.5 1.0 Ho ld 3.3A 3.0 tio na tC loc k≥ 10 0H z 2.5 2.4A 2.0 2.0A 1.5 1.0 0.5 0.5 0 Tc= 105°C 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 4.0 Motor current IO (peak value of stepping current) - A ITF00821 PD - IO Figure 6 18 VCC1=24V, VCC2=5V, Clock=1kHz, continuous operation of W2-3 phase excitation star connection line load Line R=1.8Ω, L=4mH 16 14 12 TYP value data 10 8 6 4 2 0 20 40 60 80 100 Operating substrate temperature, Tc - °C ΔTc - Pc Figure 7 90 Substrate temperature rise, ΔTc - °C Hybrid IC's internal average power loss, PD - W IO -- Tc Figure 5 4.5 VCC1=24V, VCC2=5V, Clock=1kHz, continuous operation of W2-3 phase excitation star connection line load Line R=1.8Ω, L=4mH Motor current, IO - A Motor current setting voltage, Vref - V 3.0 120 ITF00822 With out heat sink longitudinal self-cooling 80 70 60 50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 Motor current, IO - A 3.0 3.5 4.0 ITF00823 0 1 2 3 4 5 6 Hybrid IC's internal average power loss, Pc - W 7 ITF00824 No.5708-13/15 STK673-010-E 7 5 3 2 10 no s 7 urfa c blac k su 5 3 e co atin g rfac e co at 2 1.0 2.5 2.0 °C 05 1 = C 5° Tc =2 c T 1.5 1.0 0.5 0 2 10 3 5 7 2 100 3 5 Heat sink surface, S - cm2 2.5 0 7 1000 ITF00825 Vdf - If Figure 10 1 2 3 4 5 Output current, IO - A ITF00826 IIL - VIL Figure 11 500 450 Input current 11 to 18 pin, IIL - μA Diode forward voltage F1 to F6, Vdf - V Vst - IO Figure 9 3.0 Output saturation voltage, Vst - V Heat sink thermal resistance, θc-a - °C/W θc-a - S Figure 8 100 2.0 1.5 5°C =2 Tc C 05° =1 Tc 1.0 0.5 400 350 300 250 Tc=25°C 200 Tc=105°C 150 100 50 0 0 0 1 2 3 4 Diode forward current, If - A 1000 0 5 1.0 1.5 2.0 2.5 Input voltage, VIL - V Ir - VrH Figure 12 0.5 ITF00827 VOH - IOH Figure 13 5.0 3.0 ITF00828 MOI output high voltage, VOL - V 4.5 Vref input current, Ir - μA 800 600 5°C =2 Tc °C 105 Tc= 400 200 Tc= 25°C Tc= 105 °C 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0 0.5 1.0 1.5 2.0 2.5 Vref input voltage, VrH - V ITF00829 VOL - IOL Figure 14 0.6 MOI output low voltage, VOL - V 3.0 0 1 2 3 4 5 6 7 8 20 pins output current, IOH - mA 9 10 ITF00830 0.5 5°C 10 = Tc 0.4 0.3 Tc 5°C =2 0.2 0.1 0 0 1 2 3 4 5 6 7 20 pins output current, IOL - mA 8 9 10 ITF00831 No.5708-14/15 STK673-010-E ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PS No.5708-15/15