LC87F6AC8A - ON Semiconductor

Ordering number : ENA0145
LC87F6AC8A
CMOS LSI
8-bit Withstand Voltage
Microcontroller
http://onsemi.com
128K-byte Flash ROM / 4096-byte RAM / 100pin
Overview
The LC87F6AC8A is an 8-bit microcontroller that, centered around a CPU running at a minimum bus cycle time of 83.3
ns, integrates on a single chip a number of hardware features such as 128K-byte flash ROM (onboard programmable),
4096-byte RAM, on-chip debugging function, a vacuum fluorescent display (VFD) automatic display controller/driver,
a 16-bit timer/counter (may be divided into 8-bit timers), a 16-bit timer/counter (may be divided into 8-bit timer/counter
or 8-bit PWMs), four 8-bit timers with a prescaler, a 16-bit timer with a prescaler (may be divided into 8-bit timers), a
base timer used as a time-of-day clock, a high-speed clock counter, a system clock frequency divider, two synchronous
SIO* with automatic transfer capability, an asynchronous/synchronous SIO, two channels of 12-bit PWM modules*, an
8-bit 15-channel AD converter, a small signal detector, and a 27-source 10-vector interrupt feature*.
(* can be supported with the LC876A00 or LC876B00 series by selecting “User Options.”)
Features
„Flash ROM
• Capable of onboard programming with a single 5V power supply
• On-chip debugging function
• Block erasable in 128-byte units
• 131072 × 8 bits
„RAM
• 4096 × 9 bits
„Minimum bus cycle time
• 83.3s (at 12 MHz)
VDD = 2.8 to 5.5[V]
• 250ns (at 4 MHz)
VDD = 2.5 to 5.5[V]
Note: The bus cycle time refers to the ROM read speed.
QIP100E(14X20)
„Minimum instruction cycle time (Tcyc)
• 249.9ns (at 12 MHz) VDD = 2.8 to 5.5[V]
• 750ns (at 4 MHz)
VDD = 2.5 to 5.5[V]
„Package form
• QIP100E (lead/Halogen free type)
ORDERING INFORMATION
See detailed ordering and shipping information on page 34 of this data sheet.
Semiconductor Components Industries, LLC, 2014
April, 2014 Ver. 1.70a
41714HKPC 20140327-S00001 No.A0145-1/34
LC87F6AC8A
„Ports
• Normal withstand voltage I/O ports
User Option Selection
Ports Whose Input/Output Can Be Specified in 1-bit Units
For LC876A00 series
32 (P1n, P70 to P73, P8n, P30 to P37, PAn)
For LC876B00 series
32 (P1n, P70 to P73, P8n, P32 to P35, SI2Pn, PAn)
Port that can also be used for oscillation
• 12V max. withstand voltage I/O ports
Ports whose input/output can be specified in 4-bit units
(in 1- bit units when configured for N-channel open drain output)
• Normal withstand voltage input-only port (also used for oscillation)
• Vacuum fluorescent display (VFD) driver ports
Large current outputs for digits
Large current outputs for digits/segments
Outputs for digits/segments
Outputs for segments
Multiplexed pin function
I/O ports
Input ports
• Dedicated oscillator pins
• Reset pin
• Power pins
• Dedicated vacuum fluorescent display driver power pin
1 (XT2)
8 (P0n)
1 (XT1)
9 (S0/T0 to S8/T8)
7 (S9/T9 to S15/T15)
8 (S16 to S23)
24 (S24 to S47)
8 (PFn)
24 (PCn, PDn, PEn)
2 (CF1,
____ CF2)
1 ( RES)
6 (VSS1 to VSS2, VDD1 to VDD4)
1 (VP)
„VFD automatic display controller
<1> Programmable segment/digit output patterns
Waveform output can be switched between segment and digit output. (number of pins available for digit waveform
output: 9 to 24)
Capable of driving large current VFDs in parallel
<2> Provides 16-step dimmer function
„Small signal detection (microphone signals, etc.)
<1> Counts pulses with amplitudes greater than a preset level
<2> 2-bit counter
„Timers
• Timer 0: 16-bit timer/counter with two capture registers
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers) × 2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers) + 8-bit counter (with
two 8-bit capture registers)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with two 16-bit capture registers)
Mode 3: 16-bit counter (with two 16-bit capture registers)
• Timer 1: 16-bit timer/counter with PWM/toggle output capability
Mode 0: 8-bit timer with an 8-bit prescaler (with toggle output) + 8-bit timer/counter with an 8-bit prescaler (with
toggle output)
Mode 1: 8-bit PWM with an 8-bit prescaler × 2 channels
Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle output) (toggle output also possible from the
low-order 8 bits)
Mode 3: 16-bit timer with an 8-bit prescaler (with toggle output) (The low-order 8 bits can be used as PWM.)
No.A0145-2/34
LC87F6AC8A
• Timer 4: 8-bit timer with a 6-bit prescaler
• Timer 5: 8-bit timer with a 6-bit prescaler
• Timer 6: 8-bit timer with a 6-bit prescaler (with toggle output)
• Timer 7: 8-bit timer with a 6-bit prescaler (with toggle output)
• Timer 8: 16-bit timer
Mode 0: 8-bit timer with an 8-bit prescaler × 2 channels
Mode 1: 16-bit timer with an 8-bit prescaler
*Timer 8 is not supported by emulator. An on-chip debugger must be used to develop software for timer 8.
• Base timer
<1> The clock can be selected from among the subclock (32.768kHz crystal oscillator), system clock, and timer 0
prescaler output.
<2> Interrupts are programmable in 5 different time schemes.
„High-speed clock counter
<1> Capable of counting clocks with a maximum clock rate of 20MHz (when 10MHz main clock is used)
<2> Real-time output
„Serial interface
• SIO0: 8-bit synchronous serial interface
<1> LSB first/MSB first is selectable.
<2> Built-in 8-bit baudrate generator (maximum transfer clock cycle: 4/3 tCYC)
<3> Automatic continuous data communication (1 to 256 bits, selectable in 1-bit units) (suspension and resumption
of data transfer controllable in byte units)
• SIO1: 8-bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clock)
Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrate)
Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clock)
Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect)
• SIO2: 8-bit synchronous serial interface *Available in LC876B00 series compatible configuration
<1> LSB first
<2> Built-in 8-bit baudrate generator (maximum transfer clock cycle: 4/3 tCYC)
<3> Automatic continuous data communication (1 to 32 bytes, selectable in byte units)
„ADC: 8 bits × 15 channels
• Reference voltage can be selected from the VDD1 or VDD2 pin.
„PWM *Available in LC876A00 series compatible configuration
• Multifrequency 12-bit PWM × 2 channels
„Remote control receiver circuit (multiplexed with the P73/INT3/T0IN pin)
<1> Noise rejection function (noise filter time constant selectable from 1/32/128 tCYC)
„Watchdog timer
<1>External RC watchdog timer
<2>Interrupt and reset signals selectable
No.A0145-3/34
LC87F6AC8A
„Interrupts: 27 sources, 10 vector addresses (LC876A00 compatible)
26 sources, 10 vector addresses (LC876B00 compatible)
<1> Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt request of
the level equal to or lower than the current interrupt is not accepted.
<2> When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address is given priority.
* LC876A00 series compatible configuration
No.
Vector Address
Level
Interrupt Source
1
00003H
X or L
INT0
2
0000BH
X or L
INT1
3
00013H
H or L
INT2 / T0L / INT4
4
0001BH
H or L
INT3 / base timer / INT5
5
00023H
H or L
T0H / INT6
6
0002BH
H or L
T1L / T1H / INT7
7
00033H
H or L
SIO0 / T8L / T8H
8
0003BH
H or L
SIO1
9
00043H
H or L
ADC / MIC / T6 / T7 / PWM4 / PWM5
10
0004BH
H or L
VFD / port 0 / T4 / T5
* LC876B00 series compatible configuration
No.
Vector Address
Level
1
00003H
X or L
Interrupt Source
2
0000BH
X or L
INT1
3
00013H
H or L
INT2 / T0L / INT4
4
0001BH
H or L
INT3 / base timer / INT5
INT0
5
00023H
H or L
T0H / INT6
6
0002BH
H or L
T1L / T1H / INT7
7
00033H
H or L
SIO0 / T8L / T8H
8
0003BH
H or L
SIO1 / SIO2
9
00043H
H or L
ADC / MIC / T6 / T7
10
0004BH
H or L
VFD / port 0 / T4 / T5
• Priority levels X > H > L
• When interrupts of the same level occur at the same time, the interrupt with the smallest vector address is given
priority.
„Subroutine stack levels: Up to 2048 levels (The stack is allocated in RAM.)
„High-speed multiplication division instructions
• 16 bits × 8 bits (5 tCYC execution time)
• 24 bits × 16 bits (12 tCYC execution time)
• 16 bits ÷ 8 bits (8 tCYC execution time)
• 24 bits ÷ 16 bits (12 tCYC execution time)
„Oscillator circuits
• RC oscillator circuit (internal)
• CF oscillator circuit
• Crystal oscillator circuit
• Multifrequency oscillator circuit (internal)
: For system clock
: For system clock with internal Rf
: For low-speed system clock with external Rd and Rf
: For system clock
No.A0145-4/34
LC87F6AC8A
„System clock divider function
• Capable of run
The minimum instruction cycle time can be selected from among 300ns, 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs,
38.4μs, and 76.8μs (at a main clock rate of 10MHz).ning on low current.
„Clock output function
<1> Capable of generating 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, or 1/64 of the source clock that is selected as the system
clock.
<2> Capable of generating the source clock for the subclock.
„Standby function
• HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation. (The VFD
display function and part of the serial transfer functions are disabled.)
<1> Oscillation is not halted automatically.
<2> Released by system reset or occurrence of an interrupt.
• HOLD mode: Suspends instruction execution and operation of the peripheral circuits.
<1> The CF oscillator, RC oscillator, crystal oscillator, and multifrequency RC oscillator automatically stop
operation.
<2> There are three ways of releasing HOLD mode:
1) Setting the reset pin to a low level
2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level
3) Establishing an interrupt source at port 0
• X’tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer.
<1> The CF oscillator, RC oscillator, and multifrequency RC oscillator automatically stop operation.
<2> The crystal oscillator retains the state when X’tal HOLD mode is entered.
<3> There are four ways of releasing X’tal HOLD mode:
1) Setting the reset pin to a low level
2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level
3) Establishing an interrupt source at port 0
4) Establishing an interrupt source in the base timer circuit
„On-chip debugger function
• Supports software debugging with the microcontroller mounted on the target device
„Development tools
• Evaluation chip: LC87EV690
• Flash ROM programming board: W87FQ100
User Option Selection
LC876A00 series compatible
LC876B00 series compatible
Emulator
EVA62S + ECB876600D + SUB876A00 + POD100QFP
ICE-B877300 + SUB876A00 + POD100QFP
EVA62S + ECB876600D + SUB876B00 + POD100QFP
ICE-B877300 + SUB876B00 + POD100QFP
„Same package and pin assignment as mask ROM version
• The LC87F6AC8A allows the user to specify the optional functions of the LC876A00 or LC876B00 series
microcontrollers in the form of flash ROM data (note, however, that pins S32 to S47 are not provided with an internal
pull-down resistor). This makes it possible to conduct sample tests using the production model circuit board.
• When a program that is designed for the mask ROM version is applied to the LC87F6AC8A, the size of ROM and
RAM that can be used is the same as that of the mask ROM version of the microcontrtoller.
No.A0145-5/34
LC87F6AC8A
Package Dimensions
unit : mm
PQFP100 14x20 / QIP100E
CASE 122BV
ISSUE A
0.8±0.2
23.2±0.2
17.2±0.2
100
14.0±0.1
20.0±0.1
12
0.65
0.3±0.05
0.1±0.1 (2.7)
3.0 MAX
(0.58)
0.15
+0.15
0.05
0.13
0~10°
0.10
SOLDERING FOOTPRINT*
22.30
GENERIC
MARKING DIAGRAM*
0.65
0.43
1.30
16.30
(Unit: mm)
NOTE: The measurements are not to guarantee but for reference only.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
XXXXXXXXX
YMDDD
XXXXX = Specific Device Code
Y = Year
M = Month
DDD = Additional Traceability Data
*This information is generic. Please refer to
device data sheet for actual part marking.
No.A0145-6/34
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
PA0
PA1
PA2
PA3
P00
P01
P02
P03
VSS2
VDD2
P04
P05/CKO
P06/T6O
P07/T7O
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/SO1
P14/SI1/SB1
P15/SCK1
P16/T1PWML/AN14
P17/T1PWMH/BUZ
P30/INT4/T1IN/INT6/T0LCP1/PWM4
P31/INT4/T1IN/PWM5
P32/INT4/T1IN
P33/INT4/T1IN
P34/INT5/T1IN/INT7/T0HCP1
P35/INT5/T1IN
P36/INT5/T1IN/AN12
P37/INT5/T1IN/AN13
RES
XT1/AN10
XT2/AN11
VSS1
CF1
CF2
VDD1
P80/AN0
P81/AN1
P82/AN2
P83/AN3
P84/AN4
P85/AN5
P86/AN6
P87/AN7/MICIN
P70/INT0/T0LCP/AN8
P71/INT1/T0HCP/AN9
P72/INT2/T0IN/NKIN
P73/INT3/T0IN
S0/T0
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
S47/PF7
S46/PF6
S45/PF5
S44/PF4
S43/PF3
S42/PF2
S41/PF1
S40/PF0
VDD4
S39/PE7
S38/PE6
S37/PE5
S36/PE4
S35/PE3
S34/PE2
S33/PE1
S32/PE0
S31/PD7
S30/PD6
S29/PD5
S28/PD4
S27/PD3
S26/PD2
S25/PD1
S24/PD0
S23/PC7
S22/PC6
S21/PC5
S20/PC4
VP
LC87F6AC8A
Pin Assignment * LC876A00 series compatible configuration
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
S19/PC3
S18/PC2
S17/PC1
S16/PC0
VDD3
S15/T15
S14/T14
S13/T13
S12/T12
S11/T11
S10/T10
S9/T9
S8/T8
S7/T7
S6/T6
S5/T5
S4/T4
S3/T3
S2/T2
S1/T1
QIP100E (lead/Halogen free type)
No.A0145-7/34
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
PA0
PA1
PA2
PA3
P00
P01
P02
P03
VSS2
VDD2
P04
P05/CKO
P06/T6O
P07/T7O
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/SO1
P14/SI1/SB1
P15/SCK1
P16/T1PWML/AN14
P17/T1PWMH/BUZ
SI2P0/SO2/INT4/T1IN/INT6/T0LCP1
SI2P1/SI2/SB2/INT4/T1IN
P32/INT4/T1IN
P33/INT4/T1IN
P34/INT5/T1IN/INT7/T0HCP1
P35/INT5/T1IN
SI2P2/SCK2/INT5/T1IN/AN12
SI2P3/SCK2O/INT5/T1IN/AN13
RES
XT1/AN10
XT2/AN11
VSS1
CF1
CF2
VDD1
P80/AN0
P81/AN1
P82/AN2
P83/AN3
P84/AN4
P85/AN5
P86/AN6
P87/AN7/MICIN
P70/INT0/T0LCP/AN8
P71/INT1/T0HCP/AN9
P72/INT2/T0IN/NKIN
P73/INT3/T0IN
S0/T0
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
S47/PF7
S46/PF6
S45/PF5
S44/PF4
S43/PF3
S42/PF2
S41/PF1
S40/PF0
VDD4
S39/PE7
S38/PE6
S37/PE5
S36/PE4
S35/PE3
S34/PE2
S33/PE1
S32/PE0
S31/PD7
S30/PD6
S29/PD5
S28/PD4
S27/PD3
S26/PD2
S25/PD1
S24/PD0
S23/PC7
S22/PC6
S21/PC5
S20/PC4
VP
LC87F6AC8A
Pin Assignment * LC876B00 series compatible configuration
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
S19/PC3
S18/PC2
S17/PC1
S16/PC0
VDD3
S15/T15
S14/T14
S13/T13
S12/T12
S11/T11
S10/T10
S9/T9
S8/T8
S7/T7
S6/T6
S5/T5
S4/T4
S3/T3
S2/T2
S1/T1
QIP100E (lead/Halogen free type)
No.A0145-8/34
LC87F6AC8A
System Block Diagram * LC876A00 series compatible configuration
Interrupt control
IR
Standby control
PLA
Flash ROM
RC
MRC
Clock
generator
CF
PC
X’tal
SIO0
Bus interface
ACC
SIO1
Port 0
B register
Port 1
C register
Timer 0
(Hi-speed clock counter)
Port 3
ALU
Timer 1
Port 7
Base timer
Port 8
PSW
VFD display
controller
Port A
RAR
INT0 to INT7
noise filter
ADC
RAM
Timer 4
Small signal detector
Stack pointer
Timer 5
Timer 6
Wtachdog timer
PWM4, 5
Timer 7
On-chip debugger
Timer 8
No.A0145-9/34
LC87F6AC8A
System Block Diagram * LC876B00 series compatible configuration
Interrupt control
IR
Standby control
PLA
Flash ROM
RC
MRC
Clock
generator
CF
PC
X’tal
SIO0
Bus interface
ACC
SIO1
Port 0
B register
SIO2
Port 1
C register
Timer 0
(Hi-speed clock counter)
Port 3
ALU
Timer 1
Port 7
Base timer
Port 8
PSW
VFD display
controller
Port A
RAR
INT0 to INT7
noise filter
ADC
RAM
Timer 4
Small signal detector
Stack pointer
Timer 5
Timer 6
Watchdog timer
Timer 7
On-chip debugger
Timer 8
No.A0145-10/34
LC87F6AC8A
Pin Description
* Common to LC876A00 and LC876B00 compatible series
Pin Name
I/O
Description
Option
VSS1, VSS2
–
– power supply pin
No
VDD1, VDD2
VDD3, VDD4
–
+ power supply pin
No
VP
Port 0
–
– VFD power supply pin
No
I/O
• 8-bit input/output port
Yes
P00 to P07
• Input/output can be specified in 4-bit units.
• Pull-up registers can be turned on and off in 4-bit units.
• HOLD release input
• Port 0 interrupt input
• 12V maximum withstand voltage in N-channel open drain output mode
• Multiplexed pin functions
P05: Clock output (system clock/subclock selectable)
P06: Timer 6 toggle output
P07: Timer 7 toggle output
Port 1
I/O
P10 to P17
Yes
• 8-bit input/output port
• Input/output can be specified in 1-bit units.
• Pull-up registers can be turned on and off in 1-bit units.
• Multiplexed pin functions
P10: SIO0 data output
P11: SIO0 data input / bus input/output
P12: SIO0 clock input/output
P13: SIO1 data output
P14: SIO1 data input / bus input/output
P15: SIO1 clock input/output
P16: Timer 1 PWML output AD converter input port (AN14)
P17: Timer 1 PWMH output/buzzer output
Port 7
I/O
P70 to P73
• 4-bit input/output port
No
• Input/output can be specified in 1-bit units.
• Pull-up registers can be turned on and off in 1-bit units.
• Multiplexed pin functions
P70: INT0 input/HOLD release input/timer 0L capture input/watchdog timer output
P71: INT1 input/HOLD release input/timer 0H capture input
P72: INT2 input/HOLD release input/timer 0 event input/timer 0L capture input/
high-speed clock counter input
P73: INT3 input (input with noise filter)/timer 0 event input/timer 0H capture input
AD converter input port: AN8(P70), AN9(P71)
Port 8
P80 to P87
I/O
H level
L level
○
×
○
○
○
○
×
○
○
INT2
○
○
○
×
×
INT3
○
○
○
×
×
&
○
INT1
Rising
Falling
INT0
Falling
Rising
• Interrupt acknowledge type
• 8-bit input/output port
No
• Input/output can be specified in 1-bit units.
• Multiplexed pin functions
AD converter input port: AN0 to AN7
Small signal detector input port: MICIN (P87)
No.A0145-11/34
LC87F6AC8A
Pin Name
I/O
S0/T0 to S8/T8
O
Description
• Large current output for vacuum fluorescent display (VFD) controller digits
Option
No
(also can be used as segment outputs)
S9/T9 to
O
• Large current output for vacuum fluorescent display (VFD) controller segments/digits
No
I/O
• Output for vacuum fluorescent display (VFD) controller segments/digits
No
S15/T15
S16 to S23
• Multiplexed pin functions
High withstand voltage input port: PC0 to PC7
S24 to S31
I/O
• Output for vacuum fluorescent display (VFD) controller segments
No
• Multiplexed pin functions
High withstand voltage input port: PD0 to PD7
S32 to S39
I/O
• Output for vacuum fluorescent display (VFD) controller segments
• Multiplexed pin functions
High withstand voltage input port: PE0 to PE7
S40 to S47
I/O
• Output for vacuum fluorescent display (VFD) controller segments
• Multiplexed pin functions
High withstand voltage input/output port: PF0 to PF7
Port
I/O
PA0 to PA3
• 4-bit input/output port
Yes
(Not available for flash
ROM version)
Yes
(Not available for flash
ROM version)
Yes
• Input/output can be specified in 1-bit units
• Pull-up registers can be turned on and off in 1-bit units.
• Multiplexed pin functions
On-chip debugger control function: PA01 to PA03
____
RES
I
Reset pin
No
XT1
I
• 32.768kHz crystal resonator input pin
No
• Multiplexed pin functions
General-purpose input port
Must be connected to VDD1 when not to be used.
AD converter input port: AN10
XT2
I/O
• 32.768kHz crystal resonator output pin
No
• Multiplexed pin functions
General-purpose input/output port
Must be configured for oscillation and held open when not to be used.
AD converter input port: AN11
CF1
I
Ceramic resonator input pin
No
CF2
O
Ceramic resonator output pin
No
No.A0145-12/34
LC87F6AC8A
* LC876A00 series compatible configuration
Pin Name
Port 3
I/O
I/O
P30 to P37
Description
Option
• 8-bit input/output port
Yes
• Input/output can be specified in 1-bit units.
• Pull-up registers can be turned on and off in 1-bit units.
• Multiplexed pin functions
P30: PWM4 output/INT6 input
P31: PWM5 output
P30 to P33: INT4 input/HOLD release input/timer 1 event input/
timer 0L capture input/timer 0H capture input
P34: INT7 input
P34 to P37: INT5 input/HOLD release input/timer 1 event input/
timer 0L capture input/timer 0H capture input
AD converter input port: AN12 (P36), AN13(P37)
H level
L level
○
○
×
×
○
○
○
×
×
INT6
○
○
○
×
×
INT7
○
○
○
×
×
&
○
INT5
Rising
Falling
INT4
Falling
Rising
• Interrupt acknowledge type
* LC876B00 series compatible configuration
Pin Name
Port 3
I/O
I/O
P30 to P37
Description
Option
• 4-bit input/output port
Yes
• Input/output can be specified in 1-bit units
• Pull-up registers can be turned on and off in 1-bit units.
• Multiplexed pin functions
P32 to P33: INT4 input/HOLD release input/timer 1 event input/
timer 0L capture input/timer 0H capture input
P34: INT7 input
P34 to P35: INT5 input/HOLD release input/timer 1 event input/
timer 0L capture input/timer 0H capture input
SIO2 port
SI2P0 to SI2P3
I/O
H level
L level
○
○
×
×
○
○
○
×
×
INT6
○
○
○
×
×
INT7
○
○
○
×
×
Rising
○
INT5
&
Falling
INT4
Falling
Rising
• Interrupt acknowledge type
• 4-bit input/output port
Yes
• Input/output can be specified in 1-bit units
• Multiplexed pin functions
SI2P0: SIO2 data output/INT6 input
SI2P1: SIO2 data input / bus input/output
SI2P2: SIO2 clock input/output
SI2P3: SIO2 clock output
SI2P0 to SI2P1: INT4 input/HOLD release input/timer1 event input/
timer 0L capture input/timer 0H capture input
SI2P2 to SI2P3: INT5 input/HOLD release input/timer1 event input/
timer 0L capture input/timer 0H capture input
AD converter input port: AN12 (SI2P2), AN13(SI2P3)
• See the table above for Port 3 for the interrupt acknowledge type for SIO2 ports.
No.A0145-13/34
LC87F6AC8A
Port Output Types
The tables below list the types of port outputs and the presence/absence of a pull-up resistor.
Data can be read into any input/output port even if it is in output mode.
* Common to the LC876A00 and LC876B00 compatible series
Port Name
P00 to P07
P10 to P17
Option Selected
in Units of
1 bit
1 bit
Option Type
Output Type
Pull-up Resistor
Pull-down
Resistor
1
CMOS
Programmable (Note 1)
2
12V withstand voltage N-channel open drain
No
–
–
1
CMOS
Programmable
–
2
N-channel open drain
Programmable
–
P70
–
No
N-channel open drain
Programmable
–
P71 to P73
–
No
CMOS
Programmable
–
P80 to P87
–
No
N-channel open drain
No
–
–
No
High withstand voltage P-channel open drain
–
Fixed
1
High withstand voltage P-channel open drain
–
Fixed
2
High withstand voltage P-channel open drain
–
No
–
S0/T0 to S15/T15
S16 to S31
S32 to S47 (Note 2)
1 bit
PA0 to PA3
1 bit
1
CMOS
Programmable
2
N-channel open drain
Programmable
–
Input only
No
–
No
–
XT1
–
No
XT2
–
No
32.768kHz crystal resonator output
(N-channel open drain when selecting
general-purpose output port)
* LC876A00 series compatible configuration
Port Name
P30 to P37
Option Selected
in Units of
1 bit
Pull-down
Option Type
Output Type
Pull-up Resistor
1
CMOS
Programmable
–
2
N-channel open drain
Programmable
–
Option Type
Output Type
Pull-up Resistor
1
CMOS
Programmable
–
2
N-channel open drain
Programmable
–
No
–
Resistor
* LC876B00 series compatible configuration
Port Name
P32 to P35
Option Selected
in Units of
1 bit
Pull-down
Resistor
CMOS
SI2P0 to SI2P3
–
No
(SI2P1: N-channel open drain when selecting
SIO2 data)
Note 1: The control of the presence or absence of the programmable pull-up resistors for port 0 is exercised in 4-bit units
(P00 to P03, P04 to P07).
Note 2: A built-in internal pull-down resistor can be connected to S32 to S47 in 1-bit units (with a mask option) only for
the mask ROM version of product.
The flash ROM version (LC87F6AC8A) does not include the internal pull-down resistor.
No.A0145-14/34
LC87F6AC8A
*1
Make the following connection to minimize the noise input to the VDD1 pin and prolong the backup time. Be sure to
electrically short the VSS1and VSS2 pins.
IC
VDD1
Power
supply
Backup capacitors
*2
VDD2
VDD3
VDD4
VSS1
*2
VFD
power
supply
VSS2
The internal memory is sustained by VDD1. If VDD2 is not backed up, the high-level output at the ports are unstable
in HOLD backup mode, allowing through current to flow into the input buffer and thus shortening the backup time.
Make sure that the port outputs are held at a low level in HOLD backup mode.
No.A0145-15/34
LC87F6AC8A
1. Absolute Maximum Ratings at Ta = 25°C, VSS1 = VSS2 = 0V
Parameter
Maximum supply
Symbol
Pin/Remarks
VDD MAX
VDD, VDD2, VDD3, VDD4
VI(1)
•XT1
voltage
Input voltage
Conditions
VDD1=VDD2=VDD3
=VDD4
Specification
VDD[V]
min.
typ.
max.
unit
-0.3
to
+6.5
V
-0.3
to
VDD+0.3
•CF1
____
• RES
VI(2)
VP
VDD-45
to
VDD+0.3
Output voltage
VO(1)
S0/T0 to S15/T15
VDD-45
to
VDD+0.3
Input/output voltage
VIO(1)
•CMOS output P0
-0.3
to
VDD+0.3
-0.3
to
12
VDD-45
to
VDD+0.3
•P1, P7, P8, PA
•P30 to P37
(LC876A00 compatible)
•P32 to P35 / SI2P0 to SI2P3
(LC876B00 compatible )
•XT2
Peak output
VIO(2)
Open drain output P0
VIO(3)
S16 to S47
IOPH(1)
current
•P0, P1, PA
•CMOS output
•P30 to P37
•Per 1 applicable pin
-10
mA
(LC876A00 compatible)
•P32 to P35 / SI2P0 to SI2P3
(LC876B00 compatible)
High level output current
Total output
IOPH(2)
P71 to P73
Per 1 applicable pin
-3
IOPH(3)
S0/T0 to S15/T15
Per 1 applicable pin
-30
IOPH(4)
S16 to S47
Per 1 applicable pin
-15
ΣIOAH(1)
•P00 to P03
Total current of all
-30
•PA
applicable pins
ΣIOAH(2)
•P04 to P07
Total current of all
•P1
applicable pins
current
-30
•P30 to P37
(LC876A00 compatible)
•P32 to P35 / SI2P0 to SI2P3
(LC876B00 compatible)
ΣIOAH(3)
P71 to P73
Total current of all
-5
applicable pins
ΣIOAH(4)
S0/T0 to S15/T15
Total current of all
-65
applicable pins
ΣIOAH(5)
S16 to S27
Total current of all
-60
applicable pins
ΣIOAH(6)
S28 to S39
Total current of all
-60
applicable pins
ΣIOAH(7)
S40 to S47
Total current of all
-60
applicable pins
Continued on next page.
No.A0145-16/34
LC87F6AC8A
Continued from preceding page.
Parameter
Peak output
Symbol
IOPL(1)
current
Pin/Remarks
•P0, P1, PA
Conditions
Specification
VDD[V]
min.
typ.
max.
unit
Per 1 applicable pin
20
mA
Per 1 applicable pin
5
Total current of all
50
•P30 to P37
(LC876A00 compatible)
•P32 to P35 / SI2P0 to SI2P3
Low level output current
(LC876B00 compatible)
IOPL(2)
•P7, P8
•XT2
Total output
ΣIOAL(1)
•P00 to P03, PA
current
applicable pins
ΣIOAL(2)
•P04 to P07
Total current of all
•P1
applicable pins
50
•P30 to P37
(LC876A00 compatible )
•P32 to P35 / SI2P0 to SI2P3
(LC876B00 compatible)
ΣIOAL(3)
Allowable power
Pd max
•P7, P8
Total current of all
•XT2
applicable pins
QIP100E
Ta=-20 to +70°C
20
508
mW
°C
dissipation
Operating ambient
Topr
-20
to
+70
Tstg
-55
to
+125
temperature
Storage ambient
temperature
Note: The applicable pins (SI2Pn or P30, P31, P36, and P37) vary depending on the user options selected.
Check the pin assignment diagram of the selected product type (LC876A00 or LC876B00).
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
No.A0145-17/34
LC87F6AC8A
2. Allowable Operating Range at Ta = -20 to +70°C, VSS1 = VSS2 = 0V
Parameter
Operating supply
voltage (Note 1)
Memory
Symbol
VDD(1)
Pin/Remarks
VDD1=VDD2=VDD3=VDD4
VDD(2)
VHD
VDD1
sustaining supply
Specification
max.
unit
0.250μs ≤ tCYC ≤ 200μs
VDD[V]
min.
2.8
typ.
5.5
V
0.735μs ≤ tCYC ≤ 200μs
2.5
5.5
•In HOLD mode
2.0
5.5
-35
VDD
•RAM and register
voltage
Pull-down supply
Conditions
contents sustained
VP
VP
VIH(1)
•CMOS output P0
voltage
High level input
voltage
Output disabled
2.5 to 5.5
0.3VDD
+0.7
VDD
•P8, PA
VIH(2)
Open drain output type P0
Output disabled
2.5 to 5.5
0.3VDD
+0.7
11
VIH(3)
•P1
Output disabled
2.5 to 5.5
0.3VDD
+0.7
VDD
Output P-channel Tr off
2.5 to 5.5
0.33VDD
+1.0
VDD
•P30 to P37
(LC876A00 compatible)
•P32 to P35 / SI2P0 to SI2P3
(LC876B00 compatible)
•P71, 72, 73
•P70 port input/ interrupt side
Low level input
VIH(4)
S16 to S47
VIH(5)
•P87 small signal input side
Output disabled
2.5 to 5.5
0.75VDD
VDD
VIH(6)
•P70 watchdog timer side
Output disabled
2.5 to 5.5
0.9VDD
VDD
VIH(7)
•XT1, XT2
____
•CF1, RES
2.5 to 5.5
0.75VDD
VDD
VIL(1)
•P0, P8, PA
Output disabled
2.5 to 5.5
VSS
0.15VDD
VIL(2)
•P1
Output disabled
2.5 to 5.5
VSS
0.1VDD
voltage
+0.4
•P30 to P37
+0.4
(LC876A00 compatible)
•P32 to P35 / SI2P0 to SI2P3
(LC876B00 compatible)
•P71 to P73
•P70 port input/interrupt side
VIL(3)
S16 to S47
Output P-channel Tr off
2.5 to 5.5
-35
0.2VDD
VIL(4)
•P87small signal input side
Output disabled
2.5 to 5.5
VSS
0.25VDD
VIL(5)
•P70 watchdog timer side
Output disabled
2.5 to 5.5
VSS
0.8VDD
VIL(6)
•XT1, XT2
____
2.5 to 5.5
VSS
0.25VDD
3.0 to 5.5
0.250
200
2.5 to 5.5
0.735
200
-1.0
•CF1, RES
Instruction cycle
time
(Note 1)
tCYC
μs
Continued on next page.
No.A0145-18/34
LC87F6AC8A
Continued from preceding page.
Parameter
External system
Symbol
FEXCF(1)
Pin/Remarks
CF1
clock frequency
Conditions
•CF2 pin open
Specification
VDD[V]
min.
2.8 to 5.5
typ.
max.
unit
0.1
12
MHz
2.5 to 5.5
0.1
4
2.8 to 5.5
0.2
24
2.5 to 5.5
0.2
8
•System clock frequency division
ratio=1/1
•External system clock duty=
50±5%
•CF2 pin open
•System clock frequency division
ratio=1/2
•External system clock duty=
50±5%
Oscillation
FmCF(1)
CF1, CF2
frequency range
(Note 2)
12MHz ceramic oscillation mode
2.8 to 5.5
12
2.5 to 5.5
4
MHz
See Fig. 1.
FmCF(2)
CF1, CF2
4MHz ceramic oscillation mode
See Fig. 1.
FmRC
Internal RC oscillation
2.5 to 5.5
FmMRC
Multifrequency RC oscillator
2.5 to 5.5
0.3
1.0
18
2.5 to 5.5
32.768
2.0
source oscillation
FsX’tal
XT1, XT2
32.768kHz crystal oscillation
kHz
mode
See Fig. 2.
Note 1: Onboard programming is possible when VDD≥4.5[V].
Note 2: See Table 1 and Table 2 for the oscillation constant.
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
No.A0145-19/34
LC87F6AC8A
3. Electrical Characteristics at Ta = -20 to +70°C, VSS1 = VSS2 = 0V
Parameter
High level input
Symbol
IIH(1)
Pin/Remarks
Open drain output type P0
current
Conditions
•Output disabled
Specification
max.
unit
2.5 to 5.5
VDD[V]
min.
typ.
5
μA
2.5 to 5.5
1
2.5 to 5.5
60
•VIN=11V
(including output TR’s off
leakage current)
IIH(2)
•P0, P1, P7, P8, PA
•Output disabled
•P30 to P37
•Pull-up resistor off
(LC876A00 compatible)
•P32 to P35, SI2P0 to SI2P3
(LC876B00 compatible)
Low level input
leakage current)
IIH(3)
S16 to S47
•In input port mode
IIH(4)
(PC,
____ PD, PE, PF)
RES
•VIN=VDD
VIN=VDD
2.5 to 5.5
1
IIH(5)
XT1, XT2
•In input port mode
2.5 to 5.5
1
IIH(6)
CF1
•VIN=VDD
VIN=VDD
IIH(7)
P87/AN7/MICIN
IIL(1)
current
2.5 to 5.5
15
4.5 to 5.5
4.2
8.5
15
small signal input side
VIN=VBIS+0.5V
(VBIS is a bias voltage.)
2.5 to 4.5
1.5
5.5
10
•P0, P1, P7, P8, PA
•Output disabled
2.5 to 5.5
-1
•P30 to P37
•Pull-up resistor off
(LC876A00 compatible)
High level output
•VIN=VDD
(including output TR’s off
•P32 to P35, SI2P0 to SI2P3
•VIN=VSS
(including output TR’s off
IIL(2)
(LC876B00 compatible)
____
RES
VIN=VSS
2.5 to 5.5
-1
IIL(3)
XT1, XT2
•In input port mode
2.5 to 5.5
-1
IIL(4)
CF1
•VIN=VSS
VIN=VSS
2.5 to 5.5
-15
IIL(5)
P87/AN7/MICIN
VOH(1)
voltage
leakage current)
VIN=VBIS-0.5V
(VBIS is a bias voltage.)
4.5 to 5.5
-15
-8.5
-4.2
small signal input side
2.5 to 4.5
-10
-5.5
-1.5
•CMOS output type P0
IOH=-1.0mA
4.5 to 5.5
VDD-1
IOH=-0.5mA
3.0 to 5.5
VDD-1
IOH=-0.1mA
2.5 to 5.5
VDD-0.5
V
•P1
VOH(2)
•P30 to P37
(LC876A00 compatible)
•PWM4, PWM5
VOH(3)
(LC876A00 compatible)
•P32 to P35, SI2P0 to SI2P3
(LC876B00 compatible)
VOH(4)
P71 to P73
IOH=-0.4mA
2.5 to 5.5
VDD-1
VOH(5)
S0/T0 to S15/T15
IOH=-20mA
4.5 to 5.5
VDD-1.8
VOH(6)
IOH=-10mA
3.0 to 5.5
VDD-1.8
VOH(7)
•IOH=-1.0mA
2.5 to 5.5
VDD-1
IOH=-5.0mA
4.5 to 5.5
VDD-1.8
VOH(9)
IOH=-2.5mA
3.0 to 5.5
VDD-1.8
VOH(10)
•IOH=-1.0mA
2.5 to 5.5
VDD-1
•When per pin IOH of all pins
is 1mA or less
VOH(8)
S16 to S47
•When per pin IOH of all pins
is 1mA or less
Continued on next page.
No.A0145-20/34
LC87F6AC8A
Continued from preceding page.
Parameter
Low level output
voltage
Symbol
VOL(1)
VOL(2)
VOL(3)
VOL(4)
VOL(5)
VOL(6)
VOL(7)
Pin/Remarks
•P0, P1, PA
•P30 to P37
(LC876A00 compatible)
•P32 to P35, SI2P0 to SI2P3
(LC876B00 compatible)
•P30 to P31
(LC876A00 compatible:
when PWM4/5 is used)
• Ports 7, 8
Conditions
Specification
VDD[V]
min.
typ.
max.
unit
V
IOL=10mA
4.5 to 5.5
1.5
IOL=5mA
3.0 to 5.5
1.5
IOL=1.6mA
2.5 to 5.5
0.4
IOL=1.0mA
4.5 to 5.5
1.0
IOL=0.5mA
3.0 to 5.5
1.0
IOL=0.1mA
2.5 to 5.5
0.5
IOL=1mA
2.5 to 5.5
0.4
•XT2
Pull-up
Rpu
MOS-Tr resistance
Ports 0, 1, 7, A
VOH=0.9VDD
•P30 to P37
4.5 to 5.5
15
40
70
2.5 to 4.5
25
70
150
2.5 to 5.5
-1
2.5 to 5.5
-30
kΩ
(LC876A00 compatible)
•P32 to P35
(LC876B00 compatible)
Output off leakage
IOFF
•S0/T0 to S15/T15
•Output P-channel Tr off
current
(1)
•S16 to S47
•VOUT=VSS
High withstand
IOFF
•Output P-channel Tr off
(2)
•VOUT=VDD-40V
Rinpd
S16 to S47
Output P-channel Tr off
2.5 to 5.5
5.0
μA
kΩ
200
voltage input pin L
level hold Tr.
High withstand
Pull-down resistor present
•Output P-channel Tr off
voltage pull-down
•S0/T0 to S15/T15
resistance
•S16 to S47
•VOUT=3V
•Vp=-30V
Hysteresis voltage
Rpd
VHIS(1)
•P1, P3, P7
60
100
2.5 to 5.5
0.1VDD
2.5 to 5.5
0.1VDD
2.5 to 5.5
10
200
V
•P30 to P37
(LC876A00 compatible)
•P32 to P35, SI2P0 to SI2P3
(LC876B00 compatible)
____
• RES
Pin capacitance
VHIS(2)
•P87 small signal input side
CP
All pins
•f=1MHz
pF
•For the pin other than that
under test
VIN=VSS
•Ta=25°C
Input sensitivity
Vsen
•P87 small signal input side
2.5 to 5.5
0.12VDD
Vpp
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
No.A0145-21/34
LC87F6AC8A
4. Serial I/O Characteristics at Ta = -20 to +70°C, VSS1 = VSS2 = 0V
Input clock
Parameter
Symbol
Period
tSCK(1)
Low level
tSCKL(1)
pulse width
tSCKLA(1)
High level
tSCKH(1)
pulse width
tSCKHA(1)
Pin/Remarks
SCK0(P12)
Conditions
See Fig. 6.
SCK2(SI2P2)
(LC876B00 compatible)
Specification
VDD[V]
min.
2.5 to 5.5
4/3
2.5 to 5.5
2/3
2.5 to 5.5
2/3
2.5 to 5.5
2/3
2.5 to 5.5
5
typ.
tSCK(2)
2.5 to 5.5
2
Low level
tSCKL(2)
2.5 to 5.5
1
tSCKH(2)
2.5 to 5.5
1
•CMOS output type selected
2.5 to 5.5
4/3
•See Fig. 6.
2.5 to 5.5
1/2
2.5 to 5.5
3/4
See Fig. 6.
unit
tCYC
Period
SCK1(P15)
max.
pulse width
High level
Serial clock
pulse width
Period
tSCK(3)
Low level
tSCKL(3)
pulse width
tSCKLA(2)
SCK0(P12)
SCK2(SI2P2),
SCK2O(SI2P3)
(LC876B00 compatible)
SCK(P12)
tSCK
For SIO0
SI2P2, SI2P3
1
Output clock
For SIO2
High level
tSCKH(3)
pulse width
tSCKHA(2)
SCK(P12)
2.5 to 5.5
1/2
2.5 to 5.5
2
For SIO0
SI2P2, SI2P3
7/4
For SIO2
Period
tSCK(4)
Low level
tSCKL(4)
SCK1(P15)
•CMOS output type selected
2.5 to 5.5
•See Fig. 6.
2.5 to 5.5
2
1/2
tCYC
2.5 to 5.5
1/2
tSCK
pulse width
High level
tSCKH(4)
pulse width
Data setup time
tsDI
SI0(P11), SI1(P14),
Serial input
SB0(P11), SB1(P14)
•Specified with respect to the
rising edge of SIOCLK.
•See Fig. 6.
Data hold time
thDI
SI2(SI2P1),
SB2(SI2P1)
(LC876B00 compatible)
Serial output
Output delay time tdDO
SO0(P10), SO1(P13),
SB0(P11), SB1(P14)
•Specified with respect to the
4.5 to 5.5
0.03
3.0 to 4.5
0.05
2.5 to 3.0
0.1
4.5 to 5.5
0.03
3.0 to 4.5
0.05
2.5 to 3.0
0.1
3.0 to 5.5
+0.05
•Specified as the time up to the
beginning of output change in
SB2(SI2P1)
open drain output mode.
(LC876B00 compatible)
•See Fig. 6.
1/3
tCYC
falling edge of SIOCLK.
SO2(SI2P0),
μs
2.5 to 3.0
1/3
tCYC
+0.15
Note: The SIO2 function is available only when the LC876B00 series compatible configuration is selected as a user
option.
No.A0145-22/34
LC87F6AC8A
5. Pulse Input Conditions at Ta = -20 to +70°C, VSS1 = VSS2 = 0V
Parameter
Symbol
Pin/Remarks
Conditions
High/low level
tPIH(1)
INT0(P70),
•Interrupt source flag can be set.
pulse width
tPIL(1)
INT1(P71),
•Event input to timers 0 and 1 is
INT2(P72)
VDD[V]
min.
2.5 to 5.5
1
2.5 to 5.5
1
2.5 to 5.5
2
2.5 to 5.5
64
2.5 to 5.5
256
2.5 to 5.5
1
typ.
max.
unit
tCYC
enabled.
tPIH(2)
•INT4(P30 to P33)
•Interrupt source flag can be set.
tPIL(2)
•INT5(P34 to P37)
•Event input to timers 0 and 1 is
•INT6(P30)
Specification
enabled.
•INT7(P34)
(LC876A00 compatible)
•INT4(SI2P0, SI2P1,
P32, P33)
•INT5(P34, P35,
SI2P2, SI2P3)
•INT6(SI2P0)
•INT7(P34)
(LC876B00 compatible)
tPIH(3)
INT3(P73) when noise filter
•Interrupt source flag can be set.
tPIL(3)
time constant is 1/1
•Event input to timer 0 is enabled.
tPIH(4)
INT3(P73) when noise filter
•Interrupt source flag can be set.
tPIL(4)
time constant is 1/32
•Event input to timer 0 is enabled.
tPIH(5)
INT3(P73) when noise filter
•Interrupt source flag can be set.
tPIL(5)
time constant is 1/128
•Event input to timer 0 is enabled.
tPIH(6)
MICIN(P87)
tPIL(6)
tPIH(7)
tPIL(7)
tPIL(8)
Small signal detection counter
counted
NKIN(P72)
High-speed clock counter counted
2.5 to 5.5
1/12
____
RES
Reset is enabled.
2.5 to 5.5
200
μs
No.A0145-23/34
LC87F6AC8A
6. AD Converter Characteristics at Ta = -20 to +70°C, VSS1 = VSS2 = 0V
Parameter
Symbol
Pin/Remarks
Resolution
N
•AN0(P80) to AN7(P87),
Absolute precision
ET
AN8(P70), AN9(P71),
Conversion time
tCAD
AN10(XT1),
AN11(XT2)
•AN12, AN13(P36, P37)
(LC876A00 compatible)
Conditions
Specification
VDD[V]
(Note 3)
3.0 to 5.5
AD conversion time=32 × tCYC
4.5 to 5.5
(when ADCR2=0)
(Note 4)
3.0 to 5.5
•AN12, AN13 (SI2P2, SI2P3)
(LC876B00 compatible)
•AN14 (P16)
AD conversion time=64 × tCYC
4.5 to 5.5
(when ADCR2=1)
(Note 4)
3.0 to 5.5
Analog input voltage
min.
3.0 to 5.5
VAIN
3.0 to 5.5
typ.
max.
unit
±1.5
LSB
μs
8
bit
15.62
97.92
(tCYC=
(tCYC=
0.488μs)
3.06μs)
23.52
97.92
(tCYC=
(tCYC=
0.735μs)
3.06μs)
18.82
97.92
(tCYC=
(tCYC=
0.294μs)
1.53μs)
47.04
97.92
(tCYC=
(tCYC=
0.735μs)
1.53μs)
VSS
VDD
V
1
μA
range
Analog port input
IAINH
VAIN=VDD
3.0 to 5.5
current
IAINL
VAIN=VSS
3.0 to 5.5
-1
Note 3: The quantization error (±1/2LSB) is excluded from the absolute accuracy.
Note 4: The conversion time refers to the interval from the time a conversion starting instruction is issued until the time
the complete digital value corresponding to the analog input value is loaded in the register.
No.A0145-24/34
LC87F6AC8A
7. Consumption Current Characteristics at Ta = -20 to +70°C, VSS1 = VSS2 = 0V
Parameter
Normal mode
Symbol
IDDOP(1)
consumption
current (Note 5)
IDDOP(2)
Pin/Remarks
Conditions
•FmCF=12MHz ceramic oscillation
VDD1
=VDD2
•FsX’tal=32.768kHz crystal oscillation
=VDD3
=VDD4
•Internal RC oscillation stopped
•System clock set to 12MHz side
Specification
typ.
max.
unit
4.5 to 5.5
VDD[V]
min.
7.9
24
mA
2.8 to 4.5
3.8
14
4.5 to 5.5
7.8
22
2.8 to 4.5
3.5
12
4.5 to 5.5
4.8
14
2.5 to 4.5
2.4
6
1.6
10
2.5 to 4.5
0.7
4
4.5 to 5.5
0.85
4
2.5 to 4.5
0.35
3
4.5 to 5.5
290
1100
2.5 to 4.5
96.0
400
•Frequency division ratio set to 1/1
•CF1=20MHz external clock
•FsX’tal=32.768kHz crystal oscillation
•System clock set to CF1 side
•Internal RC oscillation stopped
•Frequency division ratio set to 1/2
IDDOP(3)
•FmCF=4MHz ceramic oscillation
•FsX’tal=32.768kHz crystal oscillation
•System clock set to 4MHz side
•Internal RC oscillation stopped
•Frequency division ratio set to 1/1
IDDOP(4)
•FmCF=0Hz (oscillation stopped)
4.5 to 5.5
•FsX’tal=32.768kHz crystal oscillation
•Internal RC oscillation stopped
•System clock set to internal multifrequency
oscillator
RC oscillator set to 1MHz
•Frequency division ratio set to 1/2
IDDOP(5)
•FmCF=0Hz (oscillation stopped)
•FsX’tal=32.768kHz crystal oscillation
•System clock set to internal RC oscillator
•Frequency division ratio set to 1/2
IDDOP(6)
•FmCF=0Hz (oscillation stopped)
μA
•FsX’tal=32.768kHz crystal oscillation
•System clock set to 32.768kHz side
•Internal RC oscillation stopped
•Frequency division ratio set to 1/2
Continued on next page.
No.A0145-25/34
LC87F6AC8A
Continued from preceding page.
Parameter
HALT mode
Symbol
IDDHALT(1)
consumption current
(Note 5)
Pin/Remarks
Conditions
VDD1
•HALT mode
=VDD2
=VDD3
•FmCF=12MHz ceramic oscillation
=VDD4
•System clock set to 12MHz side
Specification
VDD[V]
min.
typ.
max.
unit
4.5 to 5.5
3.4
10
mA
2.8 to 4.5
1.3
6
4.5 to 5.5
3.9
10
2.8 to 4.5
1.5
6
4.5 to 5.5
1.6
4
2.5 to 4.5
0.7
3
4.5 to 5.5
1000
3000
2.5 to 4.5
440
2500
4.5 to 5.5
300
1200
2.5 to 4.5
130
750
4.5 to 5.5
25
80
2.5 to 4.5
7.4
45
4.5 to 5.5
0.04
20
2.5 to 4.5
0.01
15
4.5 to 5.5
22
65
2.5 to 4.5
5.7
40
•FsX’tal=32.768kHz crystal oscillation
•Internal RC oscillation stopped
•Frequency division ratio set to 1/1
IDDHALT(2)
•HALT mode
•CF1=20MHz external clock
•FsX’tal=32.768kHz crystal oscillation
•System clock set to CF1 side
•Internal RC oscillation stopped
•Frequency division ratio set to 1/2
IDDHALT(3)
•HALT mode
•FmCF=4MHz ceramic oscillation
•FsX’tal=32.768kHz crystal oscillation
•System clock set to 4MHz side
•Internal RC oscillation stopped
•Frequency division ratio set to 1/1
IDDHALT(4)
•HALT mode
μA
•FmCF=0Hz (oscillation stopped)
•FsX’tal=32.768kHz crystal oscillation
•Internal RC oscillation stopped
•System clock is internal multifrequency RC
oscillator set to 1MHz
•Frequency division ratio set to 1/2
IDDHALT(5)
•HALT mode
•FmCF=0Hz (oscillation stopped)
•FsX’tal=32.768kHz crystal oscillation
•System clock set to internal RC oscillator
•Frequency division ratio set to 1/2
IDDHALT(6)
•HALT mode
•FmCF=0Hz (oscillation stopped)
•FsX’tal=32.768kHz crystal oscillation
•System clock set to 32.768kHz side
•Internal RC oscillation stopped
•Frequency division ratio set to 1/2
HOLD mode
IDDHOLD(1)
VDD1
consumption current
•HOLD mode
•CF1=VDD or open
(external clock mode)
Timer HOLD mode
consumption current
IDDHOLD(2)
VDD1
•Timer HOLD mode
•CF1=VDD or open
(external clock mode)
•FsX’tal=32.768kHz crystal oscillation
Note 5: The consumption current value does not include the currents that flow into the output transistors and internal
pull-up resistors.
No.A0145-26/34
LC87F6AC8A
8. F-ROM Programming Characteristics at Ta = +10 to +55°C, VSS1 = VSS2 = 0V
Parameter
Onboard
Symbol
IDDFW(1)
programming current
Programming time
Pin/Remarks
VDD1
Conditions
•128-byte write
Specification
typ.
max.
unit
3.0 to 5.5
VDD[V]
min.
25
40
mA
3.0 to 5.5
22.5
45
ms
•Including erase current
tFW(1)
•128-byte write
•Including erase current
•Excluding the time for setting
up 128-byte data
No.A0145-27/34
LC87F6AC8A
9. Power Pin Treatment Conditions 1 (VDD1, VSS1)
It is necessary to place capacitors between VDD1 and VSS1 as described below.
• Trace length from VDD1, VSS1 pins to capacitors C1, C2 should be as short as possible and of the same length
(L1=L1’, L2=L2’) wherever possible.
• Place high capacitance capacitor C1 and low capacitance capacitor C2 in parallel.
Capacitance of C2 must be 0.1μF or more.
• VDD1 and VSS1 wiring traces must be thicker than other traces.
L2
L1
C1
VSS1
C2
VDD1
L1’
L2’
10. Power Pin Treatment Conditions 2 (VDD2, VSS2)
It is necessary to place capacitors between VDD2 and VSS2 as described below.
• Trace length from VDD2, VSS2 pins to capacitor C3 should be as short as possible and of the same length (L3=L3’)
wherever possible.
• Capacitance of C3 must be 0.1μF or more.
• The VDD2 and VSS2 wiring traces must be thicker than other traces.
L3
VSS2
C3
VDD2
L3’
No.A0145-28/34
LC87F6AC8A
Characteristics of a Sample Main System Clock Oscillator Circuit
Given below are the characteristics of a sample main system clock oscillator circuit that are measured using our
company-designated oscillation characteristics evaluation board and external components with circuit constant values
with which the oscillator vendor confirmed normal and stable oscillation.
Table 1 Characteristics of a Sample Main System Clock Oscillator Circuit with a Ceramic Resonator
Nominal
Frequency
Operating
Circuit Constants
Vendor Name
12MHz
MURATA
4MHz
MURATA
Resonator
CSTCE12M0G52-R0
C1
C2
Rd1
[pF]
[pF]
[Ω]
(10)
(10)
470
Voltage Range
[V]
2.8 to 5.5
Oscillation
Stabilization Time
Typ
Max
[ms]
[ms]
0.05
0.15
CSTLS4M00G53-B0
(15)
(15)
2.2k
2.5 to 5.5
0.05
0.15
CSTCR4M00G53-R0
(15)
(15)
2.2k
2.5 to 5.5
0.07
0.2
Remarks
C1, C2 integrated type
C1, C2 integrated type
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after VDD
goes above the lower limit level of the operating voltage range (see Figure 4).
Characteristics of a Sample Subsystem Clock Oscillator Circuit
Given below are the characteristics of a sample subsystem clock oscillator circuit that are measured using our
company-designated oscillation characteristics evaluation board and external components with circuit constant values
with which the oscillator vendor confirmed normal and stable oscillation.
Table 2 Characteristics of a Sample Subsystem Clock Oscillator Circuit with a Crystal Resonator
Nominal
Frequency
32.768kHz
Circuit Constants
Vendor Name
EPSON
TOYOCOM
Resonator
MC-306
Operating
Oscillation
Voltage
Stabilization Time
C3
C4
Rf
Rd2
Range
Typ
Max
[pF]
[pF]
[Ω]
[Ω]
[V]
[S]
[S]
18
18
10M
0
2.5 to 5.5
1.5
3
Remarks
Applicable CL value
12.5pF
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after the
instruction for starting the subclock oscillator circuit is executed or the time interval that is required for the oscillation to
get stabilized after HOLD mode is released (see Figure 4).
Note: The components for oscillation should be placed and routed as close to the IC as possible because they are
vulnerable to the influences of the circuit pattern.
CF1
XT1
CF2
Rd1
C1
CF
C2
Figure 1 CF Oscillator Circuit
XT2
Rf
C3
X’tal
Rd2
C4
Figure 2 XT Oscillator Circuit
0.5VDD
Figure 3 AC Timing Measurement Point
No.A0145-29/34
LC87F6AC8A
VDD
Operating VDD
lower limit
0V
Power supply
Reset time
RES
Internal RC oscillation
tmsCF
CF1, CF2
tmsXtal
XT1, XT2
Operating mode
Undefined
Reset
Instruction execution
Reset Time and Oscillation Stabilization Time
HOLD release signal
HOLD release signal
absent
HOLD release signal valid
Internal RC oscillation
tmsCF
CF1, CF2
tmsXtal
XT1, XT2
Operating mode
HOLD
HALT
HOLD Release Signal and Oscillation Stabilization Time
Figure 4 Oscillation Stabilization Time
No.A0145-30/34
LC87F6AC8A
VDD
RRES
Note: Determine the value of CRES and RRES so that the
reset signal is clearly present for a period of 200μs after
the supply voltage goes beyond the lower limit of the
IC’s operating voltage range.
____
RES
CRES
Figure 5 Reset Circuit
SIOCLK
DATAIN
DI0
DI1
DI2
DI3
DI4
DI5
DI6
DI7
DI8
DATAOUT
DO0
DO1
DO2
DO3
DO4
DO5
DO6
DO7
DO8
Data RAM transfer period
(SIO0 and SIO2 only)
tSCK
tSCKL
tSCKH
SIOCLK
tsDI
thDI
DATAIN
tdDO
DATAOUT
Data RAM transfer period
(SIO0 and SIO2 only)
tSCKLA
tSCKHA
SIOCLK
tsDI
thDI
DATAIN
tdDO
DATAOUT
Figure 6 Serial I/O Waveforms
tPIL
tPIH
Figure 7 Pulse Input Timing Signal Waveform
No.A0145-31/34
LC87F6AC8A
„ Difference between the LC876A00 and LC876900 Series
Function
ADC
LC876A00 Series
8 bits ×15 channels
LC876900 Series
8 bits ×14 channels
Conversion time: 32/64/128/256 tCYC
Conversion time: 32/64 tCYC
PWM
PWM4/PWM5 (P30/P31multiplexed pin functions)
PWM2/PWM3 (dedicated pin)
Port3
P30 to P37: 8 bits
P32 to P37: 6 bits
(No middle withstand voltage port)
(P32 to P35: Medium withstand voltage input support
ports)
No. of VFD pins
48
52
Middle withstand voltage input
12V max. (P0)
14V max. (P0, P32 to 35)
2
1
voltage
Timer 0 capture registers
Timer 8
(T0CAH/T0CAL, T0CAH1/T0CAL1)
(T0CAH/T0CAL)
8-bit timer with 8-bit prescaler × 2 channels
Not supported
16-bit timer with 8-bit prescaler × 2 channels
External interrupt
INT6 is assigned to P30 and INT7 to P34.
INT6/INT7
No. of Port A bits
PA0 to PA3: 4 bits
Multifrequency RC oscillator
Built-in
IFLG
List of interrupt source flag function
Pin Assignment
Pin 1
LC876A00 Series
P16/T1PWML/AN14
LC876900 Series
P16/T1PWML
Pin 3
P30/INT4/T1IN/INT6/T0LCP1/PWM4
PWM2/INT4/T1IN
Pin 4
P31/INT4/T1IN/PWM5
PWM3/INT4/T1IN
Pin 7
P34/INT5/T1IN/INT7/T0HCP1
P34/INT5/T1IN
Pin 81
PA0
S48/PG0
Pin 82
PA1
S49/PG1
Pin 83
PA2
S51/PG2
Pin 84
PA3
S52/PG3
No.A0145-32/34
LC87F6AC8A
„ Difference between the LC876B00 Series and LC876800 Series
Function
ADC
LC876B00 Series
8 bits ×15 channels
LC876800 Series
8 bits ×14 channels
Conversion time: 32/64/128/256 tCYC
Conversion time: 32/64 tCYC
Port3 (4 bits)
No middle withstand voltage port
Medium withstand voltage input support
No. of VFD pins
48
52
Middle withstand voltage input
12V max. (P0)
14V max. (P0, P3)
2
1
(T0CAH/T0CAL, T0CAH1/T0CAL1)
(T0CAH/T0CAL)
8-bit timer with 8-bit prescaler × 2 channels
Not supported
voltage
Timer 0 capture resisters
Timer 8
16-bit timer with 8-bit prescaler × 2 channels
External interrupt
INT6 is assigned to P0 and INT7 to P34.
INT6/INT7
Multifrequency RC oscillator
Built-in
No. of Port A bits
PA0 to PA3: 4 bits
IFLG
List of interrupt source flag function
Pin Assignment
LC876B00 Series
LC876800 Series
Pin 1
P16/T1PWML/AN14
Pin 3
SI2P0/SO2/INT4/T1IN/INT6/T0LCP1
P16/T1PWML
SI2P0/SO2/INT4/T1IN
Pin 7
P34/INT5/T1IN/INT7/T0HCP1
P34/INT5/T1IN
Pin 81
PA0
S48/PG0
Pin 82
PA1
S49/PG1
Pin 83
PA2
S51/PG2
Pin 84
PA3
S52/PG3
„ Operating Voltage Differences between the LC876A00/LC876B00 Series and LC876800/ LC876900
Series
Operating Supply Voltage
Operating supply
voltage/instruction cycle time
LC876A00/LC876B900 Series
2.8 to 5.5[V] (0.252μs ≤ Tcyc ≤ 200μs)
LC876800/LC876900 Series
3.0 to 5.5[V] (0.294μs ≤ Tcyc ≤ 200μs)
2.5 to 5.5[V] (0.735μs ≤ Tcyc ≤ 200μs)
2.5 to 5.5[V] (0.735μs ≤ Tcyc ≤ 200μs)
Except for onboard programming (VDD < 4.5V)
Except for onboard programming (VDD < 4.5V)
No.A0145-33/34
LC87F6AC8A
ORDERING INFORMATION
Device
LC87F6AC8ALU-EJ-H
Package
QIP100E(14X20)
(Pb-Free / Halogen Free)
Shipping (Qty / Packing)
250 / Tray Foam
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PS No.A0145-34/34