PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Features Description ÎÎ8 Differential Channel (2-lane) Exchange Pericom semiconductor’s PI3PCIE3442 is a differential exchange switch featuring pass-through pinout. It supports two full PCI Express® lanes operating at 8.0Gbps PCIe® 3.0 performance. ÎÎPCI Express® 3.0 performance, 8.0 Gbps ÎÎBi-directional operation ÎÎLow Bit-to-Bit Skew: 10ps (between ± signals) With the select control input low, Port A connects to Port B, and Port C connects to port D for an 8-channel differential passthough. When the select control input is high Port A connects to Port D, and Port B connects to Port C. ÎÎLow Crosstalk: -29dB @ 2.5GHz (5Gbps) -20dB @ 4.0GHz (8Gbps) ÎÎLow Insertion Loss: -1.1dB @ 2.5GHz (5Gbps) -1.45dB @ 4.0GHz (8Gbps) ÎÎVDD Operating Range: 3.3V ±10% Application ÎÎESD Tolerance: 2kV HBM Switching 4 lanes of DP1.2 from PC/Notebook/Tablet to Display monitor ÎÎPackaging (Pb-free & Green): àà 42-contact, TQFN (ZH42), 3.5x9mm. àà 40-contact, TQFN (ZL40), 3x6mm. Block Diagram Truth Table Function SEL OE# Ax = Bx Cx = Dx 0 0 Ax = Dx Cx = Bx 1 0 Ax, Bx, Cx, Dx = Hi-Z (disconnect) x 1 OE# SEL A0+ A0C0+ C0- A1+ A1C1+ C1A2+ A2C2+ C2A3+ A3C3+ C3- All trademarks are property of their respective owners. 14-0088 1 B0+ B0- D0+ D0B1+ B1- D1+ D1B2+ B2- D2+ D2B3+ B3- D3+ D3- www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch 34 B1+ A1- 6 33 B1- C1+ 7 32 D1+ C1- 8 31 D1- GND 30 VDD 29 B2+ 12 27 D2+ C2- 13 26 D2- A3+ 14 25 B3+ A3- 15 24 B3- C3+ 16 23 D3+ 22 D3- C3- 17 21 C2+ GND B2- 20 28 VDD 11 19 A2- GND A2+ 10 18 9 VDD SEL All trademarks are property of their respective owners. 14-0088 2 OE# GND B0+ B0- 37 36 35 A0+ 38 39 31 B1- C1+ 5 30 D1+ C1- 6 29 D1- SEL 7 A2+ 8 A2- 28 VDD 27 GND 9 26 B2+ C2+ 10 25 B2- C2- 11 24 D2+ A3+ 12 23 D2- A3- 13 22 B3+ C3+ 14 21 B3- GND 20 5 B1+ 4 D3+ A1+ 32 A1- 19 D0- 3 D3- 35 D0- A1+ GND 4 33 18 C0- D0+ 2 17 D0+ 34 C0- 16 36 1 C3- 3 C0+ VDD C0+ A0- B0- 15 B0+ 37 GND 38 40 GND Pin Diagram 40-TQFN 39 VDD 40 VDD 2 41 1 A0- 42 A0+ OE# Pin Diagram 42-TQFN www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Application Diagram PI3PCIE3442 OE# SEL B0+ B0- A0+ A0- DA0-DA3 DA0-DA3 C0+ C0- D0+ D0B1+ B1- A1+ A1- CAB_DETA C1+ C1- DP Source A D2+ D2- DB0-DB3 B3+ B3- A3+ A3- DP conn A DB Monitor A DBX or DAX AUXX, HPDX CAB_DETX C3+ C3- DP Source B CAB_DETX B2+ B2- C2+ C2- CAB_DETB AUXX, HPDX D1+ D1- A2+ A2- AUXB, HPDB DAX or DBX D3+ D3- DP conn B DB Monitor B ENB INB OUTB0 OUTB1 OUTB0 ENB INB OUTB1 SBO PI3DBS3224 SBI SAI SAO SBO PI3DBS3224 SBI SAI OUTA0 SAO OUTA1 OUTA0 OUTA1 INA ENA INA ENA Generic 2 x 2 DP1.2 Switching Using PI3PCIE3442 (3x6mm 40 pad QFN) All trademarks are property of their respective owners. 14-0088 3 www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Pin Description (42-TQFN) Pin # Pin Name I/O Description 1 A0+ I/O Signal I/O, Channel 0, Port A 2 A0– 5 A1+ I/O Signal I/O, Channel 1, Port A 6 A1– 10 A2+ I/O Signal I/O, Channel 2, Port A 11 A2– 14 A3+ I/O Signal I/O, Channel 3, Port A 15 A3– 38 B0+ I/O Signal I/O, Channel 0, Port B 37 B0− 34 B1+ I/O Signal I/O, Channel 1, Port B 33 B1− 29 B2+ I/O Signal I/O, Channel 2, Port B 28 B2− 25 B3+ I/O Signal I/O, Channel 3, Port B 24 B3− 3 C0+ I/O Signal I/O, Channel 0, Port C 4 C0– 7 C1+ I/O Signal I/O, Channel 1, Port C 8 C1– 12 C2+ I/O Signal I/O, Channel 2, Port C 13 C2– 16 C3+ I/O Signal I/O, Channel 3, Port C 17 C3− 36 D0+ I/O Signal I/O, Channel 0, Port D 35 D0− 32 D1+ I/O Signal I/O, Channel 1, Port D 31 D1− 27 D2+ I/O Signal I/O, Channel 2, Port D 26 D2− 23 D3+ I/O Signal I/O, Channel 3, Port D 22 D3− 41 OE# I Output Enable, active low. When OE# = 0 the device I/O is enabled. When OE#=1, all I/O are high impedance 9 SEL I Operation mode Select (when SEL=0: A→B, C→D, when SEL=1: A→D, C→B) 18, 20, 30, 40, 42 VDD Pwr 3.3V ±10% Positive Supply Voltage 19, 21, 39, Center Pad GND Pwr Power ground All trademarks are property of their respective owners. 14-0088 4 www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Pin Description (40-TQFN) Pin # Pin Name I/O Description 39 A0+ I/O Signal I/O, Channel 0, Port A 40 A0– 3 A1+ I/O Signal I/O, Channel 1, Port A 4 A1– 8 A2+ I/O Signal I/O, Channel 2, Port A 9 A2– 12 A3+ I/O Signal I/O, Channel 3, Port A 13 A3– 36 B0+ I/O Signal I/O, Channel 0, Port B 35 B0− 32 B1+ I/O Signal I/O, Channel 1, Port B 31 B1− 26 B2+ I/O Signal I/O, Channel 2, Port B 25 B2− 22 B3+ I/O Signal I/O, Channel 3, Port B 21 B3− 1 C0+ I/O Signal I/O, Channel 0, Port C 2 C0– 5 C1+ I/O Signal I/O, Channel 1, Port C 6 C1– 10 C2+ I/O Signal I/O, Channel 2, Port C 11 C2– 14 C3+ I/O Signal I/O, Channel 3, Port C 16 C3− 34 D0+ I/O Signal I/O, Channel 0, Port D 33 D0− 30 D1+ I/O Signal I/O, Channel 1, Port D 29 D1− 24 D2+ I/O Signal I/O, Channel 2, Port D 23 D2− 20 D3+ I/O Signal I/O, Channel 3, Port D 19 D3− 38 OE# I Output Enable, active low. When OE# = 0 the device I/O is enabled. When OE#=1, all I/O are high impedance 7 SEL I Operation mode Select (when SEL=0: A→B, C→D, when SEL=1: A→D, C→B) 17, 28 VDD Pwr 3.3V ±10% Positive Supply Voltage 15, 18, 27, 37, Center Pad GND Pwr Power ground All trademarks are property of their respective owners. 14-0088 5 www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Storage Temperature .....................................................–65°C to +150°C Supply Voltage to Ground Potential .................................–0.5V to +4.6V DC Input Voltage ............................................................... –0.5V to VDD DC Output Current ........................................................................ 120mA Power Dissipation ............................................................................ 0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Electrical Characteristics Recommended Operating Conditions Symbol Parameter Conditions VDD 3.3V Power Supply IDD Total current from VDD 3.3V supply TCASE Case temperature range for operation within spec. Min Typ Max Units 3.0 3.3 3.6 V 300 μA 85 Celsius SEL and OE# at OV or VDD -40 DC Electrical Characteristics for Switching over Operating Range Parameters Description Test Conditions(1) Min VIH Input HIGH Voltage Guaranteed HIGH level 0.65 x VDD VIL Input LOW Voltage Guaranteed LOW level –0.5 VIK Clamp Diode Voltage VDD = Max., IIN = –18mA IIH Input HIGH Current, SEL VDD = Max., VIN = VDD –10 +10 IIL Input LOW Current, SEL VDD = Max., VIN = GND –10 +10 IIH Input HIGH Current, AX, BX, CX, DX VDD = Max., VIN = 1.8V –10 +10 IIL Input LOW Current, AX, BX, CX ,DX VDD = Max., VIN = 0V –10 +10 Typ(1) Max 0.35 x VDD –0.7 Units V –1.2 µA µA Note: 1. Typical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading. Switching Characteristics Parameters Description tPZH, tPZL Line Enable Time - SEL to AN, BN, CN, DN 0.5 45 tPHZ , tPLZ Line Disable Time - SEL to AN, BN, CN, DN 0.5 25 tb-b Bit-to-bit skew within the same differential pair 10 tch-ch Channel-to-channel skew 20 All trademarks are property of their respective owners. Test Conditions 14-0088 6 Min. Typ. Max. Units ns ps www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Dynamic Electrical Characteristics Parameter (VIN = -10dBm, DC = 0V) DDILOFF DDRL Differential Off Isolation Differential Return Loss DDNEXT BW Test Conditions Differential Insertion Loss DDIL VI F Description Near End Crosstalk Max Signal Frequency Range Min. Typ.(1) Max. f=1.2GHz -0.8 -1.0 f=2.5GHz -1.0 -1.2 f=4.0GHz -1.3 -1.5 f=5.0GHz -1.8 -2.0 f=7.5GHz -4.5 -5.0 f= 4.0GHz -19 f= 0 to 2.8GHz -26 f= 2.8 to 5.0GHz -14 f= 5.0 to 8.0GHz -7.5 f= 0 to 2.8GHz -26 f= 2.8 to 5.0GHz -20 f= 5.0 to 8.0GHz -16 Insertion loss 1.5dB, VIN=0.623Vpp, DC=0V 4.0 Insertion loss 1.5dB, VIN=0.623Vpp, DC=0.9V 4.0 Insertion loss 3dB, VIN=0.623Vpp, DC=0V 8.0 Insertion loss 3dB, VIN=0.623Vpp, DC=0.9V 8.0 -3dB Bandwidth Units dB dB dB dB GHz 6.5 GHz Notes: 1. Guaranteed by design. Typical values are at VDD = 3.3V , TA = 25°C ambient and maximum loading. All trademarks are property of their respective owners. 14-0088 7 www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Differential Insertion Loss Differential Return Loss All trademarks are property of their respective owners. 14-0088 8 www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Differential Off Isolation Differential Crosstalk All trademarks are property of their respective owners. 14-0088 9 www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch 8.0 Gbps RX signal eye without PI3PCIE3442 + BALANCED PORT1 – 8.0 Gbps RX signal eye with PI3PCIE3442 + BALANCED – PORT1 + BALANCED – PORT2 + 50 – 50 + – DUT BALANCED PORT2 DUT Differential Insertion Loss and Return Test Circuit BALANCED PORT1 BALANCED PORT2 + + 50 – – 50 + + 50 – – 50 Differential Off Isolation Test Circuit DUT Differential Near End Xtalk Test Circuit All trademarks are property of their respective owners. 14-0088 10 www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Test Circuit for Electrical Characteristics(1-5) 3.0V VDD 200-ohm Pulse Generator VIN D.U.T VOUT 4pF CL RT 200-ohm Notes: 1.CL = Load capacitance: includes jig and probe capacitance. 2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator 3. Output 1 is for an output with internal conditions such that the output is low except when disabled by the output control. output 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 4. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, ZO = 50Ω, t R ≤ 2.5ns, t F ≤ 2.5ns. 5. The outputs are measured one at a time with one transition per measurement. Switch Positions Test Switch tPLZ , tPZL 3.0V tPHZ , tPZH GND Prop Delay Open Switching Waveforms SEL VDD/2 VDD/2 VDD 0V Output 1 tPZL tPLZ 0.75V VOH VOL + 0.15V tPHZ tPZH VOL - 0.15V 0.75V VOL VOH VOL Output 2 Voltage Waveforms Enable and Disable Times All trademarks are property of their respective owners. 14-0088 11 www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Packaging Information: 40-Contact TQFN (3x6mm) DATE: 07/11/13 Notes: 1. All dimensions are in mm. Angles in degrees. 2. Coplanarity applies to the exposed pad as well as the terminals. 3. Refer JEDEC MO-220 DESCRIPTION: 40-contact, Thin Fine Pitch Quad Flat No-Lead, TQFN PACKAGE CODE: ZL (ZL40) DOCUMENT CONTROL #: PD-2165 REVISION: -- 13-0211 All trademarks are property of their respective owners. 14-0088 12 www.pericom.com06/04/14 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Packaging Information: 42-Contact TQFN (3.5x9mm) Notes: 1. All dimensions are in millimeters. Angles in degrees. 2. Coplanarity applies to the exposed pad as well as the terminals. 3. Refer JEDEC MO-220. 4. Recommended land pattern is for reference only. 5. Thermal pad soldering area DATE: 11/14/12 DESCRIPTION: 42-contact Thin Fine Pitch Quad Flat No-Lead (TQFN) PACKAGE CODE: ZH42 DOCUMENT CONTROL #: PD-2035 REVISION:D 12-0529 Note: For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php Ordering Information Ordering Code Package Code Package Description PI3PCIE3442ZHE ZH 42-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN) PI3PCIE3442ZLE ZL 40-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN) Notes: • Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ • "E" denotes Pb-free and Green • Adding an "X" at the end of the ordering code denotes tape and reel packaging All trademarks are property of their respective owners. 14-0088 13 www.pericom.com06/04/14