PI6C557-10 Network Clock Generator Product Features Description • 100MHz Differential Output, 33MHz LVCMOS The PI6C557-10 is an integrated 100MHz differential and 33MHz LVCMOS clock generator. It uses a 25MHz quartz crystal to provide an input frequency reference. The high performance internal PLL multiplier is a proven design that ships world-wide for PCI Express applications. • Supply voltage of 3.3V ±5% • 25MHz input frequency • Jitter 60ps cycle-to-cycle (typ) 100MHz • Industrial temperature range • Packaging: (Pb-free and Green) The PI6C557-10 is available in a 16 lead 4.4 x 5.0mm TSSOP package and is operated from a single 3.3V supply. Separate supply pins are provided for analog core, 100MHz differential output, and 33MHz LVCMOS output to adhere to lowest risk, best known power supply partitioning practices. —16-pin, 173 mils wide TSSOP Block Diagram VDD 5 100M 100M Phase Lock Loop X1/CLK Crystal Driver 25 MHz crystal or clock X2 33M 5 Load Capacitors GND OE Pin Configuration 09-0015 GNDA 1 16 OE VDDA 2 15 GND VDDX 3 14 100M XIN 4 13 100M XOUT 5 12 VDD GNDX 6 11 VDD33 GND 7 10 33M VDD 8 9 1 GND33 PS8982A 07/27/09 PI6C557-10 Network Clock Generator Pin Description Pin # 2 3 4 5 6 7 8 Pin Name GNDA VDDA VDDX XIN XOUT GNDX GND VDD I/O Type Power Power Power Input Output Power 9 10 11 GND33 33M VDD33 Power Output Power Ground for 33MHz output. 33.3MHz LVCMOS output. Power for 33MHz output 12 13 14 15 16 VDD 100M 100M GND OE Power Output Output Power Input Power. Complimentary 100MHz differential output. 100MHz differential output. Ground. Output enable, tristates both 100MHz and 33MHz outputs when HIGH. Internal pull-down is 30Kohm. 1 Description Analog Ground Analog power, connect to clean 3.3V source Crystal oscillator circuit power Crystal input. Crystal output. Crystal power ground. Ground. Power. Application Information Decoupling Capacitors Decoupling capacitors of 0.01μF should be connected between each VDD pin and the ground plane and placed as close to the VDD pin as possible. 09-0015 2 PS8982A 07/27/09 PI6C557-10 Network Clock Generator Electrical Specifications Maximum Ratings Supply Voltage to Ground Potential......................................................... 5.5V All Inputs and Outputs ..................................................... -0.5V to VDD+0.5V Ambient Operating Temperature ................................................-40 to +85°C Storage Temperature .................................................................-65 to +150°C Junction Temperature ........................................................................... 150°C Soldering Temperature ......................................................................... 260°C Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Characteristics (VDD = 3.3V ± 5%, TA = -40°C to +85°C) Symbol VDD VIH VIL IIL IDD IDDOE CIN COUT LPIN Parameter Supply Voltage Input High Voltage(1) Input Low Voltage(1) Input Leakage Current Conditions OE OE 0 < Vin < VDD With input pull-up and pull-downs Operating Supply Current Normal Operation OE = HIGH Input Capacitance Input pin capacitance Output Capacitance Output pin capacitance Pin Inductance Min. 3.135 2.0 GND -0.3 -20 Typ. 3.3 Max. 3.465 VDD +0.3 0.8 150 Unit V V V μA 35 27 5 6.5 51 40 mA mA pF pF nH 5 Notes: 1. Single edge is monotonic when transitioning through region. 09-0015 3 PS8982A 07/27/09 PI6C557-10 Network Clock Generator 100MHz Differential DC Characteristics (VDD = 3.3V ± 5%, TA = -40°C to +85°C) to 3.465V unless otherwise stated below.) Symbol Parameter Conditions Min. Typ. Max. Units VOD Differential Output Voltage 400 725 850 mV VOC Common Mode Voltage 1.0 1.25 1.6 V 100MHz Differential AC Characteristics (VDD = 3.3V ± 5%, TA = -40°C to +85°C) t465V) Symbol fout Parameter Conditions Min. Typ. Max. Units 100 MHz 1.4 ns 53 % 86 ps Output Frequency tr/tf Output Rise/Fall time 20% - 80% 100-Ohm Differential Termination 1 1.2 CL = 10pF tDC Output duty cycle 47 1E-6 BER PCIE Gen 1 (pk-pk) Phase Jitter 33MHz LVCMOS DC Characteristics (VDD = 3.3V ± 5%, TA = -40°C to +85°C) t 3.465V unless otherwise stated below.) Symbol Parameter Conditions VOL Output Voltage Low VDD = 3.135V, IOL = 6mA VOH Output Voltage High VDD = 3.135V, IOH = –6mA ZO Output Impedance Min. Typ. Max. 0.4 2.4 Units V Ω 45 33MHz LVCMOS AC Characteristics (VDD = 3.3V ± 5%, TA = -40°C to +85°C) tV to 3.465V) Symbol Parameter fout Output Frequency tr/tf Output Rise/Fall time tDC Output Duty Cycle JCC Jitter, Cycle-to-Cycle Conditions Min. 20% to 80%, CL = 10pF tDC = tH/tCY, tH = High Pulse Width, tCY = Output Cycle Time, @ VDD/2 Typ. Max. Units 33.3 MHz 4 ns 55 % 300 ps 3 45 Notes: 1. Measured from the VDD/2 of the input to the differential output crossing point 2. Defined as skew between outputs at the same supply voltage and with equal load condition. Measured at the outputs differential crossing point. 3. Defined as skew between outputs on different parts operating at the same supply voltage and with equal load condition. Measured at the outputs differential crossing point. 4. All parameters are measured at 500MHz unless noted otherwise 09-0015 4 PS8982A 07/27/09 PI6C557-10 Network Clock Generator Thermal Characteristics Symbol θJA Parameter Thermal Resistance Junction to Ambient θJC Conditions Still air Min. Thermal Resistance Junction to Case Typ. Max. 90 24 Unit °C/W °C/W Recomended Crystal Specification Pericom recommends SRX7278 for optimium performance. Parameter Value Mode of Oscillation Frequency Frequency Tolerance Temperature and Aging Stability Load Cap Equivelent Series Resistance Drive Level Fundamental AT 25 ±20 ±30 20 35 100 Units MHz PPM pF Ω μW 3.3V Differential Driver Termination 3.3V 3.3V 50Ω Driver R1 100Ω 50Ω 100Ω Differential Transmission Line A general interface is shown above. In a 100 differential transmission line environment, drivers require a matched load termination of 100 across near the receiver input. 09-0015 5 PS8982A 07/27/09 PI6C557-10 Network Clock Generator Package Mechanical: 16-Pin, TSSOP (L) DOCUMENT CONTROL NO. PD - 1310 REVISION: E 16 DATE: 03/09/05 .169 .177 4.3 4.5 1 .193 .201 4.9 5.1 .004 .008 1 .047 max. 1.20 0.45 .018 0.75 .030 SEATING PLANE .0256 BSC 0.65 .007 .012 .002 .006 0.09 0.20 .252 BSC 6.4 0.05 0.15 0.19 0.30 Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335 • www.pericom.com Note: 1. Package Outline Exclusive of Mold Flash and Metal Burr 2. Controlling dimentions in millimeters 3. Ref: JEDEC MO-153F/AB DESCRIPTION: 16-Pin, 173-Mil Wide, TSSOP PACKAGE CODE: L Ordering Information(1-3) Ordering Code Package Code PI6C557-10LE L PackageType Pb-free & Green, 16-Pin TSSOP Note: 1. Thermal characteristics and package top marking information can be found at http://www.pericom.com/packaging/ 2. E = lead-free and green packaging 3. Adding an X suffix = tape/reel Pericom Semiconductor Corporation • www.pericom.com 09-0015 6 PS8982A 07/27/09