PI3V713-A 3.3V, 7-Channel Analog Video Switch Features Description • Designed specifically to switch VGA signals • 7-Channels for VGA signals (R,G,B, Hsync, Vsync, DDC Data, and DDC CLK) • VDD = 3.3V +/-10% • DDC path will operate as a 5V to 3.3V level shifter • H/V output buffer with +/-24mA drive • ESD tolerance on video I/O pins is up to 12kV HBM per JEDEC standard • -3dB BW of 1.7GHz (typ) • Low Xtalk, (-38dB typ) • Low and Flat ON-STATE resistance (Ron = 4.8-Ohm, Ron(Flat) = 0.5ohm, typ) • Low input/output capacitance (Con = 5.6pF, typ) • Packaging (Pb-free and Green): Pericom’s PI3V713-A is a 7-channel video mux/demux used to switch between multiple VGA sources or end points. In a notebook application where analog video signals are found in both the notebook and the dock, a switch solution is required to switch between the two video port locations. With the high bandwidth of ~1.7GHz, the signal integrity will remain strong even through the long FR4 trace between the notebook and the docking station. In addition to high signal performance, the video signals are also protected against high ESD with integrated diodes to VDD and GND that will support up to12kV HBM ESD protection. Application Routing VGA signals with low signal attenuation and high ESD. –32-contact TQFN (ZLE) Applications • Routes physical layer signals for high bandwidth digital video G G1 B B1 G2 R B2 G 32 31 30 29 28 1 27 2 26 GND 3 25 VDD B 4 24 5 V_SOURCE V1_OUT SCL_SOURCE V2_OUT Control Logic SDA1 5V to 3.3V Level Shifter SCL1 SDA2 GND R2 23 G1 G2 VDD 22 B1 7 21 8 20 B2 H1_OUT 9 19 10 18 11 17 12 13 14 15 16 SDA1 SDA_SOURCE SDA_SOURCE SCL_SOURCE GND H2_OUT Dual Buffer SEL H_SOURCE V_SOURCE Reserved 6 SCL2 H1_OUT Dual Buffer R1 H2_OUT V1_OUT V2_OUT 5V VDD +5V SDA2 SCL1 R2 H_SOURCE GND R1 TEST R GND SEL Pin Diagram VDD Block Diagram SCL2 10-0192 1 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Pin Description Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin Name R G GND VDD B H_SOURCE V_SOURCE Reserved SDA_SOURCE SCL_SOURCE GND SDA1 SDA2 SCL1 SCL2 5V VDD V2_OUT V1_OUT H2_OUT H1_OUT B2 B1 VDD G2 G1 R2 R1 GND Pin Type I/O I/O Ground Power I/O I I I I/O I/O Ground I/O I/O I/O I/O Power O O O O I/O I/O Power I/O I/O I/O I/O Ground 29 TEST Input 30 SEL I 31 32 GND VDD Ground Power 10-0192 Description Red signal from VGA Transmitter Green signal from VGA Transmitter Ground 3.3V +/-10% power rail Blue signal from VGA Transmitter Horizontal Synchronous signal from VGA Transmitter Vertical Synchronous signal from VGA Transmitter For normal operation, this pin needs to be tied HIGH DDC, data signal from VGA Transmitter DDC, clock signal from VGA Transmitter Ground DDC, data signal for VGA output port 1 DDC, data signal for VGA output port 2 DDC, clock signal for VGA output port 1 DDC, clock signal for VGA output port 2 5V +/-10% Power rail Vertical Synchronous buffered signal for VGA output port 2 Vertical Synchronous buffered signal for VGA output port 1 Horizontal Synchronous buffered signal for VGA output port 2 Horizontal Synchronous buffered signal for VGA output port 1 Blue signal for VGA port 2 Blue signal for VGA port 1 3.3V +/-10% power rail Green signal for VGA port 2 Green signal for VGA port 1 Red signal for VGA port 2 Red signal for VGA port 1 Ground Description is TEST pin to enable TEST mode. IF this pin is LOW, then test mode is enabled. For normal usage disable TEST mode by holding this pin high, or floating. There is an internal 100Kohm pull-up on this pin Control signal. If pin 30 is LOW, port 1 is chosen If pin 30 is HIGH, port 2 is chosen Ground 3.3V +/-10% power rail 2 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Storage Temperature....................................–65°C to +150°C Supply Voltage to Ground Potential...............–0.5V to +4.0V DC Input Voltage............................................–0.5V to +5.5V DC Output Current......................................................120mA Power Dissipation...........................................................0.5W Truth Table SEL Result 0 Port 1 is active 1 Port 2 is active DC Electrical Characteristics for Video Switching over Operating Range (TA = –40°C to +85°C, VDD = 3.3V ±10% , 5V VDD = 5V) Parameters Description Test Conditions(1) Min. Typ.(2) Max. 2 - - –0.5 - 0.8 - –0.8 –1.2 VIH Input HIGH Voltage (SEL/Priority and MS pins) Guaranteed HIGH level VIL Input LOW Voltage (SEL/Priority, and MS pins) Guaranteed LOW level VIK Clamp Diode Voltage VDD = Max., ISELx = –18mA IIH Input HIGH Current (SEL/Priority) VDD = Max., VSELx = VDD - - ±5 IIL Input LOW Current (SEL/Priority) VDD = Max., VSELx = GND - - ±5 IOFF_H/V/DDC Power Down Leakage Current for H/V and DDC channels only VDD = 0V, VB = 0V, VA ≤ 3.6 - - ±5 RON Switch On-Resistance for RGB path (3) VDD = Min., 0V ≤ Vinput ≤ 1.2V, Iinput = –40mA - 4.8 5.6 RFLAT(ON) On-Resistance Flatness for RGB path (4) VDD = Min., Vinput @ 0V and 1.2V, Iinput = –40mA - 0.5 +1 ∆RON On-Resistance match from center ports to any other port (RGB path only)(4) VDD = Min., 0V ≤ Vinput ≤ 1.2V, Iinput = –40mA - 0.1 1 VOH (H/V) Output high for H/V signals 5V VDD = 5V, IOH = -24mA VOL (H/V) Output low for H/V signals 5V VDD = 5V, IOL = 24mA 10-0192 3 3.0 5V VDD 0 0.8 PS9101 Units V µA Ω V 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Capacitance (TA = 25°C, f = 1MHz) Parameters(4) Test Conditions(1) Description Typ.(2) CIN Input Capacitance 2.0 COFF RGB Capacitance, Switch OFF 2.4 CON RGB Switch Capacitance, Switch ON 5.6 Units pF Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VDD = 3.3V, Ta = 25°C ambient and maximum loading. 3. Measured by the voltage drop between input and output pins at indicated current through the switch. On-Resistance is determined by the lower of the voltages on the two pins. 4. This parameter is determined by device characterization but is not production tested. Power Supply Characteristics Parameters Test Conditions(1) Description ICC _3.3V rail Quiescent Power Supply Current for 3.3V power rail VDD = Max., VDD = 3.6V, 5V VDD = 5.5V VSEL = GND or VDD ICC_5V VDD Quiescent Power supply current for 5V VDD 5V VDD = 5.5V, VDD = 3.6V, VSEL= GND or VDD Min. Typ.(2) Max. Units - 250 500 µA 500 100 nA Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VDD = 3.3V, Ta = 25°C ambient and maximum loading. Dynamic Electrical Characteristics Over the Operating Range (TA=-40º to +85ºC, VDD=3.3V±10%, GND=0V) Parameters Description Test Conditions Min. Typ.(2) Max. XTALK Crosstalk f = 250MHz, See Fig. 2 - -38 - OIRR OFF Isolation f = 250MHz, See Fig. 3 - -46 - BW Bandwidth –3dB See Fig. 1 - 1.7 - ILOSS Insertion Loss for RGB path Freq = 10MHz (VGA) with 75-Ohm Freq = 100MHz (XGA) load Freq = 300MHz (UXGA) Description -2.09 Min. Typ.(2) - 0.25 Max. Propagation Delay(2,3) tPZH, tPZL Line Enable Time - SEL to Input, Output 0.5 - 15 tPHZ, tPLZ Line Disable Time - SEL to Input, Output 0.5 - 10 - 0.1 0.2 Trise (H/V) Skew between opposite transitions of the same output (tPHL - tPLH) (2) Horizontal/Vertical synchronous output rise time (H1_out, V1_out, H2_out, and V2_out) with 15pF load Tfall (H/V) Horizontal/Vertical synchronous output fall time (H1_out, V1_out, H2_out, and V2_out) with 15pF load GHz dB -1.88 tPD tSK(p) dB -1.77 Switching Characteristics Parameters Units Units ns 1.5 1.6 Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Guaranteed by design. 3. The switch contributes no propagational delay other than the RC delay of the On-Resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25ns for 10pF load. Since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side. 10-0192 4 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Test Circuit for Electrical Characteristics(1) 6.0V VDD 200-ohm Pulse Generator VIN D.U.T VOUT 10pF CL RT 200-ohm Notes: 1. CL = Load capacitance: includes jig and probe capacitance. 2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator 3. All input impulses are supplied by generators having the following characteristics: f = 10 MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns. 4. The outputs are measured one at a time with one transition per measurement. Switch Positions Test Switch tPLZ, tPZL (output on I-side) 6.0V tPHZ, tPZH (output on I-side) GND Prop Delay Open Test Circuit for Dynamic Electrical Characteristics HP4396B R S T HP11667A PI3V713-A 16 2/3-ohm 16 2/3-ohm 16 2/3-ohm Figure 1. Bandwidth -3dB Testing 10-0192 5 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch HP4396B R S T HP11667A 16 2/3-ohm PI3V713-A 16 2/3-ohm R 16 2/3-ohm 75Ω G 75Ω Figure 2. Crosstalk Test Setup HP4396B R S T HP11667A PI3V713-A 16 2/3-ohm R 16 2/3-ohm R1 16 2/3-ohm 75Ω R2 Figure 3. Off Isolation Test Setup 10-0192 6 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Switching Waveforms 2.5V SEL Input tPHL tPLH 2.5V Output 0V 3.5V 2.5V 2.5V 2.5V 1.25V 1.25V Output 1.5V tPZL tPLZ VOH VDD/2 VOH tPZH VOL VOH –0.3V VDD/2 Output Voltage Waveforms Propagation Delay Times VOL +0.3V tPHZ VOL VOH VOL Voltage Waveforms Enable and Disable Times 3.5V 2.5V Data In tPLHX 1.5V tPHLX 3.5V VOH Data Out at Channel X I tSK(o) 2.5V Input 2.5V tPLH VOL VOH 1.5V tPHL VOH 2.5V Output VOL 2.5V Data Out at Channel Y tSK(p) = I tPHL – tPLH I VOL tPLHy tPHLy tSK(o) = I tPLHy – tPLHx I or I tPHLy – tPHLx I Output Skew - tSK(o) Pulse Skew - tSK(p) Applications Information Logic Inputs The logic control inputs can be driven up to +3.6V regardless of the supply voltage. For example, given a +3.3V supply, the output enables or select pins may be driven low to 0V and high to 3.6V. Driving IN Rail-to-Rail® minimizes power consumption. 10-0192 7 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch 1 DATE: 10/09/09 DESCRIPTION: 32-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN) PACKAGE CODE: ZL (ZL32) DOCUMENT CONTROL #: PD-2044 Note: REVISION: A 09-0125 • For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php Ordering Information Ordering Code PI3V713-A ZLE Package Code Package Description ZL Pb-free & Green, 32-pin TQFN Notes: • Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ • "E" denotes Pb-free and Green • Adding an "X" at the end of the ordering code denotes tape and reel packaging Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 10-0192 8 PS9101 06/29/10