PI4ULS5V202 ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package Features Description VCCA can be Less than, Greater than or Equal to VCCB 1.2V to 5.5V on A Port and 1.2V to 5.5V on B Port High−Speed with 20 Mb/s Data Rate for push-pull application High−Speed with 2 Mb/s Data Rate for open-drain application No Direction-Control Signal Needed Low Bit-to-Bit Skew Non-preferential Power-up Sequencing ESD protection exceeds 8KV HBM per JESD22A114 Integrated 10 kΩ Pull-up Resistors Package: UDFN1.2x1.6-8L and MSOP-8L The PI4ULS5V202 is a 2-bit configurable dual supply bidirectional auto sensing translator that does not require a directional control pin. The A and B ports are designed to track two different power supply rails, VCCA and VCCB respectively. Both the VCCA and VCCB supply rails are configurable from 1.2V to 5.5V. This allows voltage logic signals on the VCCA side to be translated into lower, higher or equal value voltage logic signals on the VCCB side, and vice-versa. The translator has integrated 10 kΩ pull-up resistors on the I/O lines. The integrated pull-up resistors are used to pull-up the I/O lines to either VCCA or VCCB. The PI4ULS5V202 is an excellent match for open-drain applications such as the I2C communication bus. Applications Pin Description I2C, SMBus, MDIO Low Voltage ASIC Level Translation Mobile Phones, PDAs, Camera Pin No Pin Configuration VCCB VCCA A1 B1 A2 B2 GND EN UDFN1.2x1.6-8L VccA Pin Name Type 1 VCCA Power 2 A1 I/O 3 A2 I/O 4 GND GND 5 EN Input 6 7 B2 B1 I/O I/O 8 VCCB Power Description A-port supply voltage.1.2V ≤ VCCA ≤ 5.5 V Input/output A. Referenced to VCCA. Input/output A. Referenced to VCCA Ground. Output enable (active High). Pull EN low to place all outputs in 3state mode. Input/output B. Referenced to VCCB Input/output B. Referenced to VCCB B-port supply voltage. 1.2 V ≤ VCCB ≤ 5.5V VccB A1 B1 A2 B2 GND EN MSOP-8L 2014-01-0005 PT0461-2 1 01/26/14 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Block Diagram Figure 1: Block Diagram Maximum Ratings Storage Temperature ................................................................................... -65oC to +150oC DC Supply Voltage port B..............................................................................-0.3V to +5.5V DC Supply Voltage port A ..............................................................................-0.3V to+5.5V Vi(A) referenced DC Input / Output Voltage..............................................-0.3V to +5.5V Vi(B) referenced DC Input / Output Voltage...............................................-0.3V to+5.5V Enable Control Pin DC Input Voltage ....................................... -0.3V to+5.5V Short circuit duration (I/O to GND) ...................................................... 40mA Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended operation conditions Symbol Min Typ Max Unit VCCA Positive DC Supply Voltage 1.2 - 5.5 V VCCB VCCB Positive DC Supply Voltage 1.2 - 5.5 V VEN Enable Control Pin Voltage GND - 5.5 V VIO I/O Pin Voltage GND - 5.5 V TA Operating Temperature Range −40 - +85 °C VCCA Parameter 2014-01-0005 PT0461-2 2 01/26/14 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| DC Electrical Characteristics Unless otherwise specified, -40°C≤TA≤85°C, 1.2V≤Vcc≤5.5V Symbol Parameter Test Conditions VIHB B port Input HIGH Voltage - VILB B port Input LOW Voltage - VIHA A port Input HIGH Voltage - VILA A port Input LOW Voltage - VIH Control Pin Input HIGH Voltage - VIL Control Pin Input LOW Voltage - VOHB B port Output HIGH Voltage B port source current = -20 µA VOLB B port Output LOW Voltage B port sink current =1 mA VOHA A port Output HIGH Voltage A port source current= -20 µA VOLA A port Output LOW Voltage A port sink current =1 mA IQVCB VCCB Supply Current IQVCA VCCA Supply Current ITS−VCCB B Tri−state Output Mode B port and A port unconnected, VEN = VCCA B port and A port unconnected, VEN = VCCA B port and A port unconnected, VEN = GND B port and A port unconnected, VEN = GND Min VCCB – 0.4 VCCA – 0.2 VCCA – 0.2 2/3 * VCCB Typ Max Unit - - V - 0.15 V - - V - 0.15 V - - V - 0.15 V - - V - - 1/3 * VCCB V 2/3 * VCCA - - V - - 1/3 * VCCA V - 0.5 5.0 µA - 0.3 5.0 µA - 0.1 1 µA A Tri−state Output Mode Supply 0.1 1 Current I/O Tri−state Output Mode IOZ Leakage 0.1 1.0 Current RPU Pull−Up Resistors I/O A and B 10 Note: All units are production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design. Typical values are for VCCB = +2.8 V, VCCA = +1.8 V and TA = +25°C. ITS−VCCA µA µA kΩ AC Electrical characteristics Timing Characteristics − Rail−to−Rail Driving Configuration (I/O test circuits of Figures 2, 3 and 7, CLOAD = 15 pF, driver output impedance ≤ 50Ω, RLOAD = 1 MΩ, unless otherwise specified) Symbol Parameter Test Conditions Min Typ Max Unit VCCA= 1.8V , VCCB = 2.8V tRB B port Rise Time - - - 15 nS tFB B port Fall Time - - - 15 nS tRA A port Rise Time - - - 25 nS tFA A port Fall Time - - - 10 nS Propagation Delay (Driving A) - - - 15 nS - - - 15 nS Propagation Delay (Driving B) - - - 15 nS - - - 15 nS tPPSKEW Part−to−Part Skew - - - 5 nS MDR Maximum Data Rate - 20 - - Mbps PT0461-2 01/26/14 tPHL−A−B tPLH−A−B tPHL−B−A tPLH−B−A To be continued. 2014-01-0005 3 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Continuously. Symbol VCCA= 2.8V , VCCB =1.8V tRB Test Conditions Min Typ Max Unit B port Rise Time - - - 25 nS B port Fall Time - - - 10 nS A port Rise Time - - - 20 nS A port Fall Time - - - 15 nS Propagation Delay (Driving A) - - - 15 - - - 15 nS nS Propagation Delay (Driving B) - - - 15 - - - 15 nS nS Part−to−Part Skew - - - 5 nS Maximum Data Rate - 20 - - Mbps tRB B port Rise Time - - - 15 nS tFB B port Fall Time - - - 10 nS tRA A port Rise Time - - - 15 nS tFA A port Fall Time - - - 10 nS tPHL−A−B Propagation Delay (Driving A) - - - 15 nS - - - 15 nS Propagation Delay (Driving B) - - - 15 nS - - - 15 nS tPPSKEW Part−to−Part Skew - - - 5 nS MDR Maximum Data Rate - 20 - - Mbps B port Rise Time - - - 15 nS - - tFB tRA tFA tPHL−A−B tPLH−A−B tPHL−B−A tPLH−B−A tPPSKEW MDR Parameter VCCA= 2.5V , VCCB =3.6V tPLH−A−B tPHL−B−A tPLH−B−A VCCA= 3.6V , VCCB =2.5V tRB tFB B port Fall Time - 10 nS tRA A port Rise Time - - - 15 nS tFA A port Fall Time - - - 15 nS tPHL−A−B Propagation Delay (Driving A) - - - 15 nS - - - 15 nS Propagation Delay (Driving B) - - - 15 nS - - - 15 nS Part−to−Part Skew - - - 5 nS Maximum Data Rate - 20 - - Mbps PT0461-2 01/26/14 tPLH−A−B tPHL−B−A tPLH−B−A tPPSKEW MDR To be continued. 2014-01-0005 4 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Continuously. Symbol VCCA= 1.5V , VCCB = 5.5V tRB Parameter Test Conditions Min Typ Max Unit B port Rise Time - - - 15 nS tFB B port Fall Time - - - 20 nS tRA A port Rise Time - - - 30 nS tFA A port Fall Time - - - 10 nS tPHL−A−B Propagation Delay (Driving A) - - - 20 nS - - - 20 nS - - - 20 nS tPLH−B−A Propagation Delay (Driving B) - - - 20 nS tPPSKEW Part−to−Part Skew - - - 5 nS MDR VCCA= 5.5, VCCB =1.5V Maximum Data Rate - 20 - - Mbps tRB B port Rise Time - - - 30 nS tFB B port Fall Time - - - 20 nS tRA A port Rise Time - - - 15 nS tFA A port Fall Time - - - 40 nS tPHL−A−B Propagation Delay (Driving A) - - - 20 nS - - - 20 nS - - 20 nS tPLH−B−A Propagation Delay (Driving B) - - - 20 nS tPPSKEW Part−to−Part Skew - - - 5 nS MDR VCCA= 1.2V , VCCB = 5.5V Maximum Data Rate - 20 - - Mbps tRB tPLH−A−B tPHL−B−A tPLH−A−B tPHL−B−A B port Rise Time - - - 15 nS tFB B port Fall Time - - - 30 nS tRA A port Rise Time - - - 30 nS tFA A port Fall Time - - - 15 nS tPHL−A−B Propagation Delay (Driving A) - - - 20 nS - - - 15 nS Propagation Delay (Driving B) - - - 15 nS - - - 15 nS tPPSKEW Part−to−Part Skew - - - nS MDR VCCA= 5.5V , VCCB = 1.2V Maximum Data Rate - 20 - 5 - Mbps tRB B port Rise Time - - - 30 nS tFB B port Fall Time - - - 15 nS tRA tPLH−A−B tPHL−B−A tPLH−B−A A port Rise Time - - - 15 nS tFA A port Fall Time - - - 30 nS tPHL−A−B Propagation Delay (Driving A) - - - 15 nS - - - 15 nS - - - 20 nS tPLH−B−A Propagation Delay (Driving B) - - - 15 nS tPPSKEW Part−to−Part Skew - - - 5 nS MDR Maximum Data Rate - 20 - - Mbps tPLH−A−B tPHL−B−A 2014-01-0005 PT0461-2 5 01/26/14 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Timing Characteristics – Open Drain Driving Configuration (I/O test circuits of Figures 4, 5 and 7, CLOAD = 15 pF, driver output impedance ≤ 50Ω, RLOAD = 1 MΩ, unless otherwise specified) Symbol Parameter Test Conditions Min Typ Max Unit 1.2 ≤ VCCA ≤ VCCB ≤ 5.5V tRB B port Rise Time - - - 450 nS tFB B port Fall Time - - - 30 nS tRA A port Rise Time - - - 450 nS tFA A port Fall Time - - - 30 nS tPHL−A−B Propagation Delay (Driving A) - - - 300 nS - - - 300 nS - - - 300 nS tPLH−B−A Propagation Delay (Driving B) - - - 300 nS tPPSKEW Part−to−Part Skew - - - 50 nS MDR Maximum Data Rate - 2 - - Mbps tPLH−A−B tPHL−B−A Test Circuits 2014-01-0005 PT0461-2 6 01/26/14 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2014-01-0005 PT0461-2 7 01/26/14 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Functional Description The PI4ULS5V202 is a 2-bit configurable dual supply bidirectional auto sensing translator that does not require a directional control pin. The A and B ports are designed to track two different power supply rails, VCCA and VCCB respectively. Both the VCCA and VCCB supply rails are configurable from 1.2 V to 5.5 V. This allows voltage logic signals on the VCCA side to be translated into lower, higher or equal value voltage logic signals on the VCCB side, and vice-versa. The translator has integrated 10 kΩ pull−up resistors on the I/O lines. The integrated pull-up resistors are used to pull−up the I/O lines to either VCCA or VCCB. The PI4ULS5V202 is an excellent match for open-drain applications such as the I2C communication bus. Application Information Level Translator Architecture The PI4ULS5V202 auto sense translator provides bidirectional voltage level shifting to transfer data in multiple supply voltage systems. This device has two supply voltages, VCCA and VCCB, which set the logic levels on the input and output sides of the translator. When used to transfer data from A port to B port, input signals referenced to the VCCA supply are translated to output signals with a logic level matched to VCCB. In a similar manner, translation shifts input signals with a logic level compatible to VCCB to an output signal matched to VCCA. The PI4ULS5V202 consists of two bidirectional channels that independently determine the direction of the data flow without requiring a directional pin. The one−shot circuits are used to detect the rising or falling input signals. In addition, the one shots decrease the rise and fall time of the output signal for high-to-low and low-to-high transitions. Each input/output channel has an internal 10 kΩ pull. The magnitude of the pull-up resistors can be reduced by connecting external resistors in parallel to the internal 10 kΩ resistors. Input Driver Requirements The rise (tR) and fall (tF) timing parameters of the open drain outputs depend on the magnitude of the pull−up resistors. In -addition, the propagation times (tPD), skew (tPSKEW) and maximum data rate depend on the impedance of the device that is connected to the translator. The timing parameters listed in the data sheet assume that the output impedance of the drivers connected to the translator is less than 50 kΩ. Enable Input (EN) The PI4ULS5V202 has an Enable pin (EN) that provides tri−state operation at the I/O pins. Driving the Enable pin to a low logic level minimizes the power consumption of the device and drives the I/O VCCB and I/O VCCA pins to a high impedance state. Normal translation operation occurs when the EN pin is equal to a logic high signal. The EN pin is referenced to the VCCA supply and has overvoltage tolerant protection. Power Supply Guidelines During normal operation, supply voltage VCCA can be greater than, less than or equal to VCCB. The sequencing of the power supplies will not damage the device during the power up operation. For optimal performance, 0.01 μ F to 0.1μ F decoupling capacitors should be used on the VCCA and VCCB power supply pins. Ceramic capacitors are a good design choice to filter and bypass any noise signals on the voltage lines to the ground plane of the PCB. The noise immunity will be maximized by placing the capacitors as close as possible to the supply and ground pins, along with minimizing the PCB connection traces. 2014-01-0005 PT0461-2 8 01/26/14 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Mechanical Information UDFN1.2x1.6-8L 2014-01-0005 PT0461-2 9 01/26/14 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Recommended Land pattern for DFN1.6*1.2-8L Note: All linear dimensions are in millimeters 2014-01-0005 PT0461-2 10 01/26/14 PI4ULS5V202 2-Bit Bi-directional Level Shifter with Automatic Sensing & Ultra Tiny Package ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| MSOP-8 Ordering Information Part No. Package Code PI4ULS5V202XVE XV PI4ULS5V202UE U Package Lead free and Green 8-pin UDFN1.2x1.6 Lead free and Green 8-pin MSOP Note: E = Pb-free Adding X Suffix= Tape/Reel Pericom Semiconductor Corporation 1-800-435-2336 www.pericom.com Pericom reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Pericom does not assume any responsibility for use of any circuitry described other than the circuitry embodied in Pericom product. The company makes no representations that circuitry described herein is free from patent infringement or other rights, of Pericom. 2014-01-0005 PT0461-2 11 01/26/14