RS2330 THD Optimized CRM PFC Controller DESCRIPTION RS2330 is an active transition-mode (TM) power-factor-correction (PFC) controller for AC/DC switching mode power supply applications. RS2330 features an internal start-up time for stand-alone applications, a quadrant multiplier with THD optimizer for near unity power factor, zero current detector (ZCD) to ensure TM operation, a current sensing comparator with built-in leading-edge blanking, and a totem pole output ideally suited for driving a power MOSFET. RS2330 offers great protection coverage including system over-voltage protection (OVP) to eliminate runaway output voltage due to load removal, VCC under voltage lockout (UVLO), cycle-by-cycle current limiting, multiplier output clamping that limit maximum peak switch current, and gate drive output clamping for external power MOSFET protection. FEATURES • • • • • • • • • • • • • • • Active transition-mode(TM) optimizer One quadrant multiplier with THD optimizer Low dynamic OVP sensing current setting Low start-up current and operating current Cycle-by-cycle current limiting Internal RC filter Trimmed 1.5% internal band-gap reference Under Voltage Lockout (UVLO) with hysteretic static output Over-Voltage Protection(OVP) Internal start-up timer for stand-alone clamping Disable function Totem pole output with high state clamping Proprietary audio noise free operation 11V to 32V wide range of VCC voltage 3000V HBM ESD SOP-8L green package APPLICATIONS • Single stage high PF flyback AC/DC SMPS • LED lighting power BLOCK DIAGRAM Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, No. 233-1, Baociao Rd., Sindian Dist., New Taipei City 23145, Taiwan RS2330 APPLICATION CIRCUIT ORDER INFORMATION Device RS2330 Y Z V1.0 Device Code Y is package & Pin Assignments designator: S : SOP-8 Z is Lead Free designator: P: Commercial Standard, Lead (Pb) Free and Phosphorous (P) Free Package G: Green (Halogen Free with Commercial Standard) 2 January 2013 RS2330 PIN CONFIGURATION PIN DESCRIPTION Pin Name FB COMP MULT CS ZCD GND GD VCC V1.0 Description Inverting Input of Error Amplifier. Connected to Resistor Divider from system Output. This is also used for system open loop protection. Out of Error Amplifier. A feedback compensation network is placed between COMP and the FB pin. Input of Multiplier. Connected to Line Voltage after Bridge Diodes via A Resistor Divider to provide Sinusoidal Reference Voltage to the Current loop. Current Sense Input pin. Connected to MOSFET Current Sensing Node. Zero Current Detection Input. When Activated, A New Switching Cycle Starts. If it is connected to GND, the device is disabled. Ground pin Gate driver output. Drive power MOSFET. DC Power Supply Voltage. 3 Pin No. 1 2 3 4 5 6 7 8 January 2013 RS2330 FUNCTION DESCRIPTION RS2330 is a highly integrated power factor correction (PFC) controller IC. The transition mode conversion greatly reduces the switch turn-on loss, improves the conversion efficiency and provides very good power factor correction. ERROR AMPLIFIER Connected to a resistor divider from output line, the inverting input of the Error Amplifier (E/A) is compared to an internal reference voltage (2.5V) to set the regulation on output voltage. The E/A output is internally connected to the multiplier input and externally connected for loop compensation. It is usually realized with a capacitor, which connected between the inverting input and EA output. The system loop bandwidth is set below 20Hz to suppress the AC ripple of the line voltage. MULTIPLIER The one quadrant multiplier output limits the MOSFET peak current with respect of the system output voltage and the AC half wave rectified input voltage. Through controlling the CS comparator threshold as the AC line voltage traverses sinusoid ally from zero to be resistive to the AC line. In RS2330, the two inputs for the multiplier are designed to achieve good linearity over a wide dynamic range to represent an AC line free from distortion. Special efforts have been made to assure universal line applications with respect to a 90 to 264 VAC range. The multiplier output is internally clamped to 1.0V. So the MOSFET is ported against critical operation during start up. OVER VOLTAGE PROTECTION Static OVP comparator is activated and power MOSFET Gate is off when COMP voltage is dropped below 2.25V. Normal operation is resumed when Error Amplifier goes back to its linear region is resumed when Error Amplifier goes back to its linear region after output voltage drops. STARTUP CURRENT AND START UP CONTROL The typical startup current of RS2330 is 5μA when the VCC pin is lower than the UVLO threshold so that VCC could be charged up and start up the device. A high clue, low wattage startup resistor can therefore be used to minimize the power loss during the normal operation. CURRENT SENSING COMPARATOR AND LEADING EDGE BLANKING Cycle-by-cycle current limiting is provided in RS2330’s peak current mode control. The switch current is detected by a sense is compared with this sense voltage through an internal comparator. An internal RC filter is connected spike. The remaining switch-on spike is blanked out via an internal leading of LEB is that it limits the system minimum on time, thus the THD of system at light load will be decreased. The RS flip-ensures that only one single switch-on and switch-off pulse appears at the gate drive output during a given cycle. ZERO CURRENT D ELECTION RS2330 can perform zero current detection by using an auxiliary winding of the inductor. When the stored energy is dully released to the output, the voltage at ZCD decrease. A new switching cycle is imitated following the ZCD triggering. The turn on of power MOSFET is imitated at moment that the inductor’s current reaches zero. V1.0 4 January 2013 RS2330 DISABLE FUNCTION When the ZCD pin is pulled low, RS2330 is disabled and some internal functional blocks are tuned off. The operation current is very small under this condition until the ZCD pin is released. GATE DRIVE OUTPUT The output stage is designed to ensure zero cross-conduction current. This minimizes hear dissipation, increase efficiency, and enhance reliability. The output driver is efficiency, and enhance reliability. The output driver is also slew rate controlled to minimize EMI. The built-in 16V clamp at the gate output protects the MOSFET gate from high voltage stress. PROTECTION CONTROLS RS2330 ensures good reliability design through its good protection coverage (OVP), VCC under voltage lockout (UVLO), cycle-by-cycle current limiting and output gate clamp are standard features provided by RS2330. V1.0 5 January 2013 RS2330 CHARACTERISTICS CURVE V1.0 6 January 2013 RS2330 ABSOLUTE MAXIMUM RATINGS Parameter Supply voltage pin voltage Symbol VCC Source Zero current detector max. current Range 38 50 IZCD Sink Input voltage to FB pin Input voltage to COMP pin Units V mA -10 VFB VCOMP -0.3 to 7 -0.3 to 7 V V VCS -0.3 to 7 V VMULT -0.3 to 7 V PD 600 mW Input voltage to CS pin Input voltage to MULT pin Power dissipation ESD capability, HBM model ESD ESD capability, Machine model 3000 V 300 V Lead temperature 20S TL 260 ℃ Junction temperature range Tj -40 to 150 ℃ TSTG -40 to 150 ℃ Operating junction temperature range Note: Stress beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. Exposure to absolute maximum-rated conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Unless otherwise specified: TA=25℃) Parameter Symbol Supply Voltage Section Operating range Vcc Turn-on threshold UVLO Turn-off threshold Hysterics Hys Zener voltage Vz Supply Current Section Start-up current Quiescent current, no switching Operating supply current Error Amplifier Section Voltage feed- back input threshold Voltage gain Gain bandwidth Source current Sin current Upper clamp voltage Lower clamp voltage Multiplier Section Linear operating range Output max. slope Gain V1.0 Pin Test Conditions 8 8 8 8 8 After turn on Icc=5mA FOSC FOSC-JIT TOSC-JIT 8 8 8 Vcc=11V Vcc=14.5V CL=1nf @70KHz VFB Gv Gd 1 Vcc=14.5V Open loop Icomp 2 Vcomp 2 Vmult ∆Vcs/ ∆Vmult K 3 Vcomp=3.6V, Vinv=2.4V Vcomp=3.6V, Vinv=2.6V Isource=0.5mA I sink=0.2mA Vcomp=3.0V Vmult=from 0 to 0.5V Vcomp=Upper clamp voltage Vmult=1V, Vcomp=3.5V 7 Min. Typ. Max. Unit 11 15.5 8.0 33.5 16.5 8.8 7.7 36.5 32 17.5 9.6 39.5 V V V μA V - 5 1.8 5 15 3.0 7 μA mA mA 2.45 60 -2 2 - 2.5 80 1.2 -6 6 5.2 2.25 2.55 -10 10 - V dB MHz mA mA V V 0 to 3.5 - - V 0.95 1.1 - V/V 0.28 0.36 0.44 1/V January 2013 RS2330 Parameter Current Sense Comparator Symbol Pin Test Conditions Min. Typ. Max. Unit VCS 4 Vmult=2.5V Vcomp=Upper clamp voltage 0.94 1.0 1.06 V Td(H-L) 4 - 200 450 nS VZCD 5 - 0.25 - V VZCD VZCD IZCD IZCD 5 5 5 5 Izcd=2.5mA Izcd=-2.5mA 5.1 -3 3 0.75 5.7 0 - 6.3 -5 10 V V V mA mA Gate Drive Section Low output voltage High output voltage Rising time Falling time Output clamp voltage VOL VOH Tr Tf Voclamp 7 7 7 7 7 Vcc=14.5V, Io=100mA Vcc=14.5V, Io=100mA C1=1000pf, 10~90% C1=1000Pf, 10~90% Vcc=28V 8 - 80 30 16 1.5 150 70 18 V V ns ns V Start Up Timer Re-start timer period Tstart 45 55 65 μs Current sense reference clamp Delay to output Zero Current Detector Input threshold voltage edge Hysteretic Upper clamp voltage Lower clamp voltage Source current capability Sink current after disable V1.0 rising 8 January 2013 RS2330 PACKAGE INFORMATION 8-PIN, SOP Notes: 1. Refer to JEDEC MS-012 AA. 2. All dimensions are in millimeter. V1.0 9 January 2013 RS2330 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian Dist., New Taipei City 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw V1.0 10 January 2013