TABLE 1: ELECTRICAL SPECIFICATIONS AT 25 OC FIGURE 1: SCHEMATIC DIAGRAM WHITE DOT DENOTES PIN #1 SPEC LIMITS TYP. PARAMETER MIN. PRIMARY INDUCTANCE (1-2) VOLTAGE = 0.250Vrms FREQUENCY = 100 KHZ 190.8 201.4 MAX. UNITS 1 212 µHY PRIMARY 2 TURN RATIO'S: SEC (16-15) : PRI (1-2) SEC (14-13) : PRI (1-2) SEC (12-11) : PRI (1-2) SEC (10-9) : PRI (1-2) SEC (7-8) : PRI (1-2) BIAS (4-5) : PRI (1-2) PRI LEAKAGE INDUCTANCE 100 KHz, 250mV, TIE SEC'S ------------------------------------------- 1 : 19 1 : 4.75 1 : 19 1 : 19 1 : 19 1 : 6.33 ------------------------------------------- + 4% + 4% + 4% + 4% + 4% + 4% -------- -------- 10 µHY 3750 2200 --------------- --------------- Vrms Vrms SECONDARY #4 15 14 4 BIAS SECONDARY #5 13 12 5 HIPOT: PRI & BIAS TO SECONDARY PRI TO BIAS 16 SECONDARY #3 11 7 SECONDARY #2 FIGURE 2: PHYSICAL DIMENSIONS mm (INCHES) 8 10 SECONDARY #1 9 46.23 (1.82) MAX 40.0 (1.575) MAX WHITE DOT OVER PIN#1 P TSD-1853 M YYWW 30.5 (1.20) MAX 10.0 (.394) 1 5.0 (.197) ∅ 1.0 (.039) 8 35.0 (1.378) 1 4 2 5 7 35.25 (1.388) REMOVE PIN #3 & 6 8 35.25 (1.388) 16 15 14 12 11 10 NOTE1: REINFORCED INSULATION SYSTEM, UL1950, IEC950, CSA-950: A) ALL MATERIALS MEET "UL", "CSA" & "IEC" REQUIREMENTS B) ALL MATERIAL RATED 130C OR BETTER. C) TRIPLE INSULATION WIRE ON SEC'S & BIAS. D) DESIGNED TO MEET >6.5mm CREEPAGE REQUIREMENTS. E) VARNISH FINISHED ASSEMBLY. REV. 05/02/03 07/07/03 9 UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN MM DIMENSIONAL TOLERANCES ARE: DECIMALS ANGLES .X + .25 +0 O 30' .XX + .15 DO NOT SCALE DRAWING DESCRIPTION OF CHANGES ORIGINAL RELEASE CHANGED PIN WIRE LOCATION FLYBACK TRANSFORMER CONTROL DRAWING PREMIER P/N: TSD-1853 REVISION: 07/07/03 DRAWN BY: PETER PHAM REF: 20326006 SCALE: NONE SHEET: 1 OF 3 BY PP PP