RNA51958A,B Voltage Detecting, System Resetting IC Series REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Description RNA51958A,B are semiconductor integrated circuits for resetting of all types of logic circuits such as CPUs, and has the feature of setting the detection voltage by adding external resistance. They include a built-in delay circuit to provide the desired retardation time simply by adding an external capacitor. They fined extensive applications, including battery checking circuit, level detecting circuit and waveform shaping circuit. Features • • • • • Few external parts Large delay time with a capacitor of small capacitance (td ≈ 100 ms, at 0.33 µF) Wide supply voltage range: 2 V to 17 V Wide application range Ordering Information Part Name RNA51958AFPH0 RNA51958BFPH0 Package Type Package Code Package Abbreviation SOP-8 pin SOP-8 pin PRSP0008DE-C PRSP0008DE-C FP FP Taping Abbreviation (Quantity) H (2,500 pcs / Reel) H (2,500 pcs / Reel) Surface Treatment 0 (Ni/Pd/Au) 0 (Ni/Pd/Au) Application • Reset circuit of Pch, Nch, CMOS, microcomputer, CPU and MCU, Reset of logic circuit, Battery check circuit, switching circuit back-up voltage, level detecting circuit, waveform shaping circuit, delay waveform generating circuit, DC/DC converter, over voltage protection circuit Recommended Operating Condition • Supply voltage range: 2 V to 17 V Outline and Article Indication • RNA51958A, B Type No. R958A YMWC CCC R958B YMWC CCC SOP-8 Pin No.1 REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 1 of 11 Trace Code Lot No. Y : Year Code (the last digit of year) M : Month Code W : Week Code C : Control Code RNA51958A,B Pin Arrangement RNA51958AFP/BFP NC 1 8 NC Input 2 7 Power-supply NC 3 6 Output GND 4 5 Delay capacitor (Top view) NC: No Connection Outline: PRSP0008DE-C Block Diagram RNA51958A, B Powersupply A: Built-in Load B: Open Collector 5µA Typ 25µA Typ Output – Input + + 1.25V GND Delay capacitor Operating Waveform Output state Input voltage RNA51958A, B 1.25V t H td td L td ≈ 0.34 × Cd(pF) µs REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 2 of 11 t RNA51958A,B Absolute Maximum Ratings (Ta = 25°C, unless otherwise noted) Item Supply voltage Output sink current Symbol VCC Isink Output voltage VO Power dissipation Pd Ratings 18 6 VCC 18 400 Thermal derating Kθ 4.4 mW/°C Topr Tstg –40 to +85 –55 to +125 –0.3 to VCC –0.3 to +7 °C °C Operating temperature Storage temperature Input voltage range Vin Unit V mA Conditions Type A (output with constant current load) Type B (open collector output) 8-pin SOP (PRSP0008DE-C) V mW Refer to the thermal derating curve. 8-pin SOP (PRSP0008DE-C) VCC ≤ 7 V VCC > 7 V V Electrical Characteristics (Ta = 25°C, unless otherwise noted) • “H” reset type Item Symbol Min Typ Max Detecting voltage VS 1.20 1.25 1.30 V Hysteresis voltage ∆VS 9 15 23 mV VS/∆T — 0.01 — %/°C V Detecting voltage temperature coefficient Supply voltage range VCC Input voltage range Vin Input current Iin 2 — 17 –0.3 — VCC –0.3 — 7.0 — 100 500 — 390 590 — 360 540 Unit V nA µA Test Conditions VCC = 5V VCC ≤ 7V VCC > 7V Vin = 1.25V Type A, VCC = 5V Circuit current ICC Delay time tpd 1.6 3.4 7.0 ms Vsat — 0.2 0.4 V VCC = 5V, Vin < 1.35V, Isink = 4mA IOH — — 30 nA Type B Output saturation voltage Output leakage current Type B, VCC = 5V Cd = 0.01µF * Output load current IOC –40 –25 –17 µA Type A, VCC = 5V, VO = 1/2 × VCC Output high voltage VOH VCC–0.2 VCC–0.06 — V Type A Note: Please set the desired delay time by attaching capacitor of the range between 4700 pF and 10 µF. REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 3 of 11 RNA51958A,B Typical Characteristics Detection Voltage vs. Ambient Temperature Thermal Derating 1.28 Detection Voltage VS (V) Power Dissipation Pd (mW) 500 8-pin SOP (PRSP0008DE-C) 400 300 200 100 0 0 25 50 75 85 100 1.27 VSH 1.26 1.24 1.23 1.22 –40 –20 125 Ambient Temperature Ta (°C) Detection Voltage vs. Supply Voltage Input Current IIN (nA) Detection Voltage VS (V) 1.27 VSH 1.25 VSL 1.24 1.23 4 8 12 16 100 Ta = 25°C 50 0.1 7 5 3 0.01 7 5 3 3 5 7 10 3 5 7 100 3 5 7 1000 Ta = 85°C 4 8 12 16 20 Delay Time vs. Ambient Temperature Delay Time tpd (ms) Delay Capacitance Cd (µF) 1 7 5 3 VIN = 1.25V Ta = –40°C 6 REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 4 of 11 80 100 Supply Voltage VCC (V) Delay Capacitance vs. Delay Time Delay Time tpd (ms) 60 150 0 0 20 10 7 V CC = 5V 5 3 3 57 1 40 200 Supply Voltage VCC (V) 0.001 0.1 20 Input Current vs. Supply Voltage 250 1.22 0 0 Ambient Temperature Ta (°C) 1.28 1.26 VSL 1.25 CD = 0.01µF 5 4 VCC = 5V 3 10V VCC = 15V 2 1 0 –40 –20 0 20 40 60 80 100 Ambient Temperature Ta (°C) RNA51958A,B Output Saturation Voltage Vsat (V) –12 VCC = 5V VCC = 15V –10 –8 –6 –4 –2 0 –40 –20 0 20 Output Saturation Voltage vs. Output Sink Current 0.3 40 60 80 100 Supply voltage detecting : VCC = 5V 0.2 0.1 0 0 1 2 3 4 5 6 Ambient Temperature Ta (°C) Output Sink Current Isink (mA) Output Load Current vs. Output Voltage (RNA51958A) Circuit Current vs. Supply Voltage (RNA51958B) –40 –30 –20 VCC = 5V VCC = 10V VCC = 15V –10 0 0 4 8 12 Output Voltage VO (V) REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 5 of 11 16 Circuit Current ICC (µA) Output Load Current ICC (µA) Canstant Current at Cd pin Ipd (µA) Canstant Current at Cd pin vs. Ambient Temperature 800 600 Ta = –40°C 400 Ta = 25°C Ta = 85°C 200 0 0 4 8 12 16 Supply Voltage VCC (V) RNA51958A,B Example of Application Circuit Reset Circuit of RNA51958 Powersupply R1 RL Output Input RESET Logic circuit RNA51958x R2 GND VCC Powersupply Delay capacitor GND Cd Figure 1 Reset Circuit of RNA51958 Notes: 1. When the detecting supply voltage is 4.25 V, RNA51953 are used. In this case, R1 and R2 are not necessary. When the voltage is anything except 4.25 V, RNA51957 and RNA51958 are used. In this case, the detecting supply voltage is 1.25 × (R1 +R2)/R2 (V) approximately. The detecting supply voltage can be set between 2 V and 15 V. 2. If a longer delay time is necessary, RNA51953, RNA51957, RNA51958 are used. In this case, the delay time is about 0.34 × Cd (pF) µs. 3. If the RNA51958 and the logic circuit share a common power source, type A (built-in load type) can be used whether a pull-up resistor is included in the logic circuit or not. 4. The logic circuit preferably should not have a pull-down resistor, but if one is present, add load resistor RL to overcome the pull-down resistor. 5. When the reset terminal in the logic circuit is of the low reset type, RNA51953 and RNA51957 are used and when the terminal is of the high reset type, RNA51958 are used. 6. When a negative supply voltage is used, the supply voltage side of RNA51958 and the GND side are connected to negative supply voltage respectively. Case of Using Reset Signal except Supply Voltage in the RNA51958 (a) Reset at ON (b) Reset at transistor ON Powersupply R1 Input Out put RL RNA51958x R2 GND Powersupply RESET Logic circuit Delay capacitor GND VCC Powersupply R1 Input Out put RL RNA51958x R2 Cd GND Powersupply RESET Logic circuit Delay capacitor Cd Control signal Figure 2 Case of Using Reset Signal except Supply Voltage in the RNA51958 REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 6 of 11 GND VCC RNA51958A,B Delay Waveform Generating Circuit When RNA51958 are used, a waveform with a large delay time can generate only by adding a small capacitor. Power-supply R1 Input Output RNA51958 R2 GND Delay capacitor Cd Figure 3 Delay Waveform Generating Circuit Operating Waveform Input (VCC partial pressure) Output td td ≈ 0.34 × Cd(pF) µs Figure 4 Operating Waveform REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 7 of 11 RNA51958A,B Notice for use About the Power Supply Line 1. About bypass capacitor Because the ripple and the spike of the high frequency noise and the low frequency are superimposed to the power supply line, it is necessary to remove these. Therefore, please install C1 and C2 for the low frequency and for the high frequency between the power supply line and the GND line as shown in following figure 5. VCC + C1 C2 Power-supply R1 Example of ripple noise measures Output Input Vin RNA51958 R2 GND Delay capacitor Cd Figure 5 Example of Ripple Noise Measures 2. The sequence of voltage impression Please do not impress the voltages to the input terminals earlier than the power supply terminal. Moreover, please do not open the power supply terminal with the voltage impressed to the input terminal. (The setting of the bias of an internal circuit collapses, and a parasitic element might operate.) About the Input Terminal 1. Setting range of input voltage The following voltage is recommended to be input to the input terminal (pin 2). about 0.8 (V) < Vin < VCC – 0.3 (V) ... at VCC ≤ 7 V about 0.8 (V) < Vin < 6.7 (V) ............. at VCC > 7 V 2. About using input terminal Please do an enough verification to the transition characteristic etc. of the power supply when using independent power supply to input terminal (pin 2). VCC Vin is decided to the VCC subordinating, and operates in the range about 0.8 (V) < Vin < VCC – 0.3 (V). Output Power-supply Input RNA51958 Vin GND Delay capacitor Cd Figure 6 Recommended Example REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 8 of 11 RNA51958A,B VCC1 Independent VCC2 VCC Independent Power-supply Output Input Output Input RNA51958 Vin Power-supply RNA51958 Vin VCC GND GND Delay capacitor Cd GND Delay capacitor Cd Example 2. Logic pulse input (not recommended) Example 1. Independent power supply system Please do enough verifying about transition characteristic of VCC1 and VCC2. Figure 7 3. Calculation of detecting voltage Detecting voltage Vs can be calculated by the following expression. However, the error margin is caused in the detecting voltage because input current Iin (standard 100 nA) exists if it sets too big resistance. Please set the constant to disregard this error margin. R1 + R 2 VS = 1.25 × + Iin × R1 R2 error margin VCC Power-supply R1 Vin R2 Iin → Input Output RNA51958 GND Delay capacitor Cd Figure 8 Influence of Input Current 4. About the voltage input outside ratings Please do not input the voltage outside ratings to the input terminal. An internal protection diode becomes order bias, and a large current flows. REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 9 of 11 RNA51958A,B Setting of Delay Capacity Please use capacitor Cd for the delay within the range of 10 µF or less. When a value that is bigger than this is set, the problem such as following (1), (2), and (3) becomes remarkable. t VCC tpd Output tPHL Figure 9 Time Chart at Momentary Voltage-Decrease (1) The difference at delay time becomes remarkable. A long delay setting of tens of seconds is fundamentally possible. However, when set delay time is lengthened, the range of the difference relatively grows, too. When a set value is assumed to be ‘tpd’, the difference occurs in the range from 0.47 × tpd to 2.05 × tpd. For instance, 34 seconds can be calculated at 100 µF. However, it is likely to vary within the ranges of 16-70 seconds. (2) Difficulty to react to a momentary voltage decrease. For example, the reaction time tPHL is 10 µs when delay capacitor Cd = 0.1 µF. The momentary voltage-decrease that is longer than such tPHL are occurs, the detection becomes possible. When the delay capacitance is enlarged, tPHL also becomes long. For instance, it becomes about 100 to 200 µs in case of circuit constant C1 = 100 µF. (Characteristic graph 1 is used and extrapolation in case of Cd = 100 µF.) Therefore, it doesn't react to momentary voltage-decrease that is shorter than this. (3) Original delay time is not obtained. When the momentary voltage-decrease time ‘t’ is equivalent to tPHL, the discharge becomes insufficient and the charge starts at that state. This phenomenon occurs at large capacitance. And, original delay time tpd is not obtained. Please refer to characteristic graph 2. (Delay time versus input pulse width) Characteristic Graph 1 Reaction Time vs. Delay Capacitance (Example data) Characteristic Graph 2 Delay Time vs. Momentary Voltage Decrease Pulse Width (Example data) 10000 Delay Time tpd (ms) Reaction Time tPHL (µs) 1000 200 100 10 1 0.01 0.1 1 10 Delay Capacitance Cd (µF) 100 1000 100 Delay Capacitance 0.01µF 0.033µF 0.1µF 0.33µF 1µF 2.2µF 3.3µF 10 1 1 Figure 10 Characteristic Graph REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 10 of 11 10 1000 100 Pulse Width (µs) 10000 RNA51958A,B Setting of Output Load Resistance (RNA51958B) High level output voltage can be set without depending on the power-supply voltage because the output terminal is an open collector type. However, please guard the following notes. 1. Please set it in value (2 V to 17 V) within the range of the power-supply voltage recommendation. Moreover, please never impress the voltage of maximum ratings 18 V or more even momentarily either. 2. Please set output load resistance (pull-up resistance) RL so that the output current (output inflow current IL) at L level may become 4 mA or less. Moreover, please never exceed absolute maximum rating (6 mA). VCC (2V to 17V) RL 6 IL ≤ 4mA Figure 11 Output Load Resistance RL Others 1. Notes when IC is handled are published in our reliability handbook, and please refer it. The reliability handbook can be downloaded from our homepage (following URL). http://www.renesas.com/fmwk.jsp?cnt=reliability_root.jsp&fp=/products/common_info/reliability 2. Additionally, please inquire of our company when there is an uncertain point on use. Package Dimensions JEITA Package Code P-SOP8-4.4x4.85-1.27 RENESAS Code PRSP0008DE-C *1 Previous Code — MASS[Typ.] 0.1g F D 8 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 5 c *2 E HE bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Z Reference Symbol 4 e *3 bp x M A A2 L1 A1 θ L y Detail F REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 11 of 11 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 4.65 4.85 5.05 4.2 4.4 4.6 1.85 0.00 0.1 0.20 2.03 0.34 0.4 0.46 0.15 0.20 0.25 0° 8° 5.7 6.2 6.5 1.12 1.27 1.42 0.12 0.10 0.75 0.25 0.45 0.65 0.90 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including, but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples. 3. You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document, please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com ) 5. Renesas has used reasonable care in compiling the information included in this document, but Renesas assumes no liability whatsoever for any damages incurred as a result of errors or omissions in the information included in this document. 6. When using or otherwise relying on the information in this document, you should evaluate the information in light of the total system before deciding about the applicability of such information to the intended application. Renesas makes no representations, warranties or guaranties regarding the suitability of its products for any particular application and specifically disclaims any liability arising out of the application and use of the information in this document or Renesas products. 7. With the exception of products specified by Renesas as suitable for automobile applications, Renesas products are not designed, manufactured or tested for applications or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk of human injury or which require especially high quality and reliability such as safety systems, or equipment or systems for transportation and traffic, healthcare, combustion control, aerospace and aeronautics, nuclear power, or undersea communication transmission. If you are considering the use of our products for such purposes, please contact a Renesas sales office beforehand. Renesas shall have no liability for damages arising out of the uses set forth above. 8. Notwithstanding the preceding paragraph, you should not use Renesas products for the purposes listed below: (1) artificial life support devices or systems (2) surgical implantations (3) healthcare intervention (e.g., excision, administration of medication, etc.) (4) any other purposes that pose a direct threat to human life Renesas shall have no liability for damages arising out of the uses set forth in the above and purchasers who elect to use Renesas products in any of the foregoing applications shall indemnify and hold harmless Renesas Technology Corp., its affiliated companies and their officers, directors, and employees against any and all damages arising out of such applications. 9. You should use the products described herein within the range specified by Renesas, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions or damages arising out of the use of Renesas products beyond such specified ranges. 10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. Among others, since the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 11. In case Renesas products listed in this document are detached from the products to which the Renesas products are attached or affixed, the risk of accident such as swallowing by infants and small children is very high. You should implement safety measures so that Renesas products may not be easily detached from your products. Renesas shall have no liability for damages arising out of such detachment. 12. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written approval from Renesas. 13. Please contact a Renesas sales office if you have any questions regarding the information contained in this document, Renesas semiconductor products, or if you have any other inquiries. http://www.renesas.com RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7858/7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2377-3473 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 3518-3399 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145 Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510 © 2009. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .7.2