ED R E S U ATU C FO E FE SU S I Advanced Doherty Architecture © DIGITAL STOCK F or modulated signals with a high peakto-average power ratio (PAPR), the transmitter has to be operated with its average output power backed off for an acceptable linearity at the expense of low efficiency. To achieve high efficiency and high linearity at the same time, both an efficiency enhancement technique and a linearization technique should be utilized. A powerful and reliable linearization technique, digital predistortion (DPD), is currently the most favored method for the linearization of base-station amplifiers [1]–[3]. Possible efficiency enhancement techniques are the hybrid envelope elimination and restoration/envelope tracking technique (H-EER/ET) and the Doherty technique. In the H-EER/ET transmitter, as shown in Figure 1(a), the power amplifier (PA) is driven to the saturated state by the modulated input signal, and the drain bias of the PA is modulated by an optimized envelope signal through an efficient bias modulator. Because the PA operates in saturation at all output power levels, highly efficient operation can be expected. The amplitude is then recovered through bias adaptation, while the phase information of the input signal is left intact under the condition that the saturated PA generates a constant phase delay. Therefore, the H-EER/ET transmitter can, theoretically, have excellent efficiency and linearity along with a high output power capability. But its performance is limited due to the difficulty of building a Bumman Kim, Ildu Kim, and Junghwan Moon Bumman Kim ([email protected]), Ildu Kim, and Junghwan Moon ([email protected]) are with the Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of Korea. Copyright © 2010 IEEE. Reprinted from the IEEE Microwave Magazine, August 2010. 1527/3342 Digital Object Identifier 10.1109/MMM.2010.937098 This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of Cree’s products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be1527-3342/10/$26.00©2010 obtained from the IEEE by IEEE writing to 72 August 2010 [email protected] By choosing to view this document, you agree to all provisions of the copyright laws protecting it. bias modulator with high efficiency and wide bandwidth and due to the nonconstant delay from the PA with drain bias adaptation. The Doherty PA, as shown in Figure 1(b), is also an effective efficiency enhancement technique. It uses separate carrier and peaking PAs. Only the carrier PA is turned on during low-power operation, while the two PAs are turned on at high power, thereby enhancing the efficiency. More detail on the Doherty PA is provided in the following. However, the Doherty technique is not an optimal tool for the efficient amplification of a high PAPR signal because a nonoptimal efficiency region exists due to operation in the unsaturated region of the carrier and peaking PAs [5]–[7], [12]. In spite of this imperfection, the Doherty PA has been reported to deliver considerably high efficiency because of its advanced design with a simple structure. Accordingly, the Doherty PA has experienced widespread acceptance in the marketplace in recent years [13]. Among the various Doherty PAs, the three-stage Doherty PA has superior efficiency characteristics for high PAPR signals because it has three maximum efficiency points as its output power is swept. This article introduces the basic operating principle of the N-way and three-stage Doherty PAs [14], [15] and compares the average efficiency of the various Doherty PAs under modulated signal conditions. To achieve high efficiency at the backed-off output power region while simultaneously maintaining peak power, the gate bias should be adapted with the envelope tracking technique. The operation of these amplifiers is described in the following using Matlab simulations. For verification, two kinds of three-stage Doherty PAs that use envelope tracking techniques are demonstrated under IEEE 802.16e Mobile WiMAX signal excitation [16]. The Doherty PA provides dynamic load modulation and achieves high efficiency at backed-off output power level as well as at the peak power. Doherty Amplifier Operation: Load Modulation The Doherty amplifier was first proposed by W. H. Doherty in 1936 [4]. The original Doherty amplifier consisted of two tube amplifiers and an impedance inverting network. This impedance inverting network is configured using a quarter-wave-length line as shown in Figure 1(b) and modulates the load impedance of the carrier amplifier according to the current level of the peaking PA. This modulation behavior provides the superior performance of the Doherty amplifier [5]–[7]. Most PAs have a constant load impedance and one maximum efficiency point at the peak power because the full output voltage swing is achieved only at the peak output power. On the other hand, the Doherty PA provides dynamic load modulation and achieves high efficiency at backed-off output power level as well as at the peak power. In the Doherty amplifier, the carrier amplifier is biased at Class B or AB mode, and the peaking amplifier is biased at Class C mode. Accordingly, only the carrier amplifier is operational at a low power level. As the power level is increased, like any other PA, the efficiency of the carrier amplifier is increased, and it reaches the first maximum efficiency point. At this power level, the peaking amplifier is turned on. The second maximum efficiency point is reached when the peaking amplifier provides the high efficiency. Therefore, it has two maximum efficiency points, Offset Line Ro HEER RF Input Delay Line Modulation Signal (a) RF PA RF Output Input Input Power Splitter Bias Modulator 0° Carrier Amp. λ /4 (Ro) Ro 90° Output λ /4 (R o /!N ) Peaking Amp. #1 … ET ... ... Envelope Detector Offset Gain EnvelopeShaping Level + X Block Detec + ∑ X -tion Ro 90° Peaking Amp. # (N – 1) (b) Figure 1. Architecture of the (a) hybrid envelope elimination and recovery/envelope tracking transmitter and (b) N-way Doherty power amplifier. August 2010 73 I c′ I p = I p (1) + . . . + I p (N – 1) V0 λ /4, Ro Z p(1) Zp Z′c Zc Ro N Ic N · Ro 1 + Ip / Ic ∴ZC = I p(1) ∴Zp = (1 + Z p (N – 1) ... I p (N – 1) Zpi IC Ro , i = 1 ~ (N – 1) = )· Ip N N–1 (a) 300 1 0.9 250 0.8 200 0.6 RLoad (Ω) IFund (A) 0.7 Carrier 0.5 0.4 0.3 Peaking (Two Way) Peaking (Three Way) 0.2 0 150 Carrier (Two Way) 50 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Normalized Input Voltage 0 1 Peaking (Two Way) Carrier (Three Way) 100 0.1 0 Peaking (Three Way) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Normalized Input Voltage 1 (b) Ids Imax Peak Power Carrier PA (Class B) Imax/2 ηcarrier = = 6 dB Back Off : Two Way Imax/3 9.5 dB Back Off : Three way Vk Vout Vds Vdc Ids Imax Peaking PA (Class B) Vout Vdc π · Vdc – Vk , 4 Vdc V 1 < in ≤ 1 Vmax N We assume that the Vk is inversely proportional to the fundamental current level on Ids axis. (Vout): Fundamental Output Voltage (Vdc – Vk): Maximum Magnitude of Vout Peak Power Vk π · Vout , 0 < Vin < 1 Vmax N 4 Vdc ηpeaking = π · Vout , 0 < Vin < 1 Vmax 4 Vdc = π · Vdc – Vk , Vin = 1 Vmax 4 Vdc Vds (c) Figure 2. N-way Doherty power amplifier’s operation. (a) Ideal current source representing a unit cell. (b) Fundamental current and load impedance of each unit cell. (c) Load-lines of carrier and peaking unit cells. 74 August 2010 enhancing the efficiency at the backed-off output power level. If the number of unit PAs is N with (N–1) unit cells for the peaking PA, then it is called an N-way Doherty PA. The peaking PA’s size (1 to N–1) compared to the carrier PA size determines the Doherty PA’s backedoff output power level for the first maximum efficiency point. Figure 2(a) shows the equivalent circuit for the N-way Doherty PA’s ideal current source. Load modulation is conducted by the fundamental current ratio between the carrier and peaking PAs. Because the output voltage is determined by summation of the load current multiplied by load impedance, the output impedance of the carrier PA is varied by the load current delivered by the peaking PAs. The current ratio and impedance variation of the Doherty PAs are shown in Figure 2(b). From (1), we can calculate the load impedance of each PA determined by the load modulation behavior. If input voltage is smaller than 1/N, the load impedance of carrier PA is N # Ro due to the quarter-wave-length impedance inverter and the load impedance of peaking PA is infinity because of zero load current. After the peaking PA is turned on, the load impedance of each amplifier can be derived by the active load-pull principle [12]. 5 N # Ro, IP 11 IC IC R o b# , IP N Vin 1 , Vin,max N Vin 1 , #1 N Vin,max 0, ZP 5 `, 5 a1 1 0, Vin 1 , Vin,max N Vin 1 , # 1, N Vin,max (1) where Vin is the input voltage, Vin,max is the maximum input voltage, and 1/N is the input voltage of turning peaking PA on (N–way Doherty). In (1), ZC and ZP are the load impedances of the carrier and peaking PAs, respectively. IC and IP represent the total drain current of the carrier and peaking PAs. For simple comparison, the two-way and three-way Doherty PA’s operations are depicted in the left graph in Figure 2(b) and (c). The current levels for the unit cells of the carrier and peaking PAs are depicted in Figure 2(b). The peaking PAs of the two-way and three-way Doherty PA are turned on at one-half and one-third of the input voltage, respectively, and the modulated load impedances of the unit cells for two-way and three-way Doherty PAs are described in Figure 2(b). For the conventional two-way Doherty PA, the carrier PA maintains a load impedance of 2 # R o while the peaking PA is turned off, and the carrier PA delivers the first maximum efficiency at one-half of August 2010 0.8 0.7 0.6 Efficiency (%) ZC 5 N # Ro, its peak output power. When considering the overall output power of a Doherty PA, one-half of the carrier PA’s peak output power means one-fourth of the Doherty PA’s peak output power. Accordingly, maximum efficiency is achieved at 6 dB backed-off output power from the Doherty PA’s peak power. After the peaking PA is turned on, the carrier PA always maintains the maximum efficiency because the load-line always reaches to the knee region in the I-V curve, indicating that the carrier amplifier’s fundamental output voltage always maintains the maximum magnitude and so the maximum efficiency [see Figure 2(c)]. For the three-way Doherty PA, the carrier PA maintains a 3 # R o load impedance while the peaking PAs are turned off. The back-off level for the first maximum efficiency is 29.54 dB from the Doherty PA’s peak power, the 20 # log 1 N 2 3 dB 4 backed-off output power level. Above the 29.54 dB backed-off output power, the two peaking PAs are turned on simultaneously, and the carrier PA maintains a highly efficient state due to operation in the knee region. The load impedance of the unit peaking PA [ZP in Figure 2(b)] of the N-way Doherty PA is changed from very large value to Ro. At the power, when the peaking PA is off, the impedance is an open due to zero load current. At the peak output power, all of the unit PAs’ load impedances converge to Ro because of the same load current from each PA and all of the unit PAs reach the other maximum efficiency point. The load impedance derived in (1) is depicted in Figure 2(c), and the dynamic load-lines of each unit cell are visualized in Figure (3). Consequently, the N-way Class B Two Way Three Way Three Stage* 0.5 0.4 0.3 0.2 0.1 0 Important Operation Region PGD of 802.16e Mobile WiMAX 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Output Back Off (W) 1 Three Stage* : Three Stage I Doherty PA with 1:2:3 Size Ratio, Three Stage II Doherty PA with 1:1:1 Size Ratio Figure 3. Efficiency characteristics of various Doherty power amplifiers and class B power amplifiers versus the normalized output power. The power generation distribution for a Mobile WiMAX signal is also shown. 75 The efficiency of the Doherty amplifier is its most important characteristic. Doherty PA maintains a superior efficiency compared to the class B PA over the whole output power region by employing load modulation. Accordingly, improved average efficiency can be expected for amplification of modulated signals with high PAPRs. The efficiency profile is shown in the next section together with those of the class B PA and three-stage Doherty PA (see Figure 3). Linearity of the Doherty Amplifier For the ideal Doherty operation, the Doherty PA maintains a linear gain response for all output power levels through proper load modulation. At low input powers, when only the carrier amplifier is turned on, the carrier amplifier of the N-way Doherty PA has an N # Ro load impedance, and the gain is increased N times. However, the input power of the carrier amplifier is 1/N times the total input power because of the inputpower divider. This input power loss is compensated by the high gain. Accordingly, the Doherty PA maintains the same gain as a normal PA (PA under Ro load impedance with the full input power) when the peaking PAs are turned off. The carrier amplifier reaches its maximum efficiency at the backed-off output power of 20 # log 1 N 2 3 dB 4 from the peak power of the Doherty amplifier [14]. After the peaking PAs are turned on, the gain of the carrier PA is reduced due to the lower load impedance gm3 Peaking Bias of Two Way Peaking Biases of Three Way Vgs Carrier Bias (a) gm5 Carrier Bias Peaking Bias of Two Way Vgs Peaking Biases of Three Way (b) Figure 4. Normalized harmonic generation coefficient curves of the FETs versus biases. (a) Normalized gm3 and (b) gm5 curves. 76 (load modulation), but the gain is compensated by the peaking PAs, and the overall gain of the Doherty PA is constant. Thus, a linear amplitude modulation to amplitude modulation (AM-AM) response, that is, the flat gain response as a function of output power, can be achieved. For the real case, the carrier and peaking amplifiers have nonlinear characteristics like any PAs. However, the Doherty amplifier can be linearized by using different gate bias points for each PA to cancel their harmonics. The nonlinear output current of an active device can be approximated using a Taylor series expansion [12], [14] by 6 Iout 5 gm1 # vi 1 gm2 # v2i 1 gm3 # v3i 1gm4 # v4i 1gm5 # v5i 1 # # # , (2) where vi is an input voltage and the gmxs are the xthorder expansion coefficients of the nonlinear transconductance. The PA’s dominant harmonic currents near the fundamental currents are the third-order intermodulation distortion (IMD3) current and fifth-order intermodulation distortion (IMD5) current, and they are mainly generated by the gm3 # vi3 and gm5 # vi5 terms of (2), respectively. The transconductances of the carrier and peaking PAs are dependent on the quiescent gate bias point. Figure 4 shows the third and fifth harmonic generation coefficients of an laterally diffused MOSFET (LDMOSFET) as a function of the gate bias voltage. Generally, the carrier PA is biased in a class AB mode, and the peaking PAs are biased in a class C mode to turn off at low power so that only the carrier PA is operating in the linear class AB mode. For higher input power levels, the peaking PA is turned on, and the carrier PA generates harmonic current due to operation in the saturated region. The coefficients of the harmonics generated are dependent on the gate bias as shown in Figure 4. For the class AB biased carrier amplifier and class C biased peaking amplifier, the generated third harmonics have opposite polarities and the third harmonic nonlinearity are cancelled. Therefore, adjusting the gate biases of the carrier and peaking PAs properly, a large portion of the harmonics from each PA can be cancelled out and linear operation is obtained across a broad output power range levels. As shown in Figure 4, the two-way Doherty PA can cancel out an IMD3 component by adjusting the gm3. On the other hand, the three-way Doherty PA can obtain not only gm3 but also gm5 cancellation using the two peaking PAs with different quiescent bias points [14]. We can explain this behavior in another way: The peaking PA is operated at a positive gm3, creating a gain expansion, and the carrier PA is operated at a negative gm3, creating gain compression. The gain compression August 2010 Figure 5(a) is a widely known structure [17] (here we call it three-stage I). The topology is a parallel combination of one Doherty PA used as a carrier PA with an additional peaking PA. The first peaking PA modulates the load of the carrier PA initially and the second peaking PA modulates the load of the previous Doherty stage at a higher power. The topology in Figure 5(b) has recently been reported by NXP [18] (here we call it a three-stage II). This topology is a parallel combination of one carrier PA and one Doherty PA used as a peaking PA. Both the threestage and the three-way architectures use three PA of the carrier PA is compensated by the gain expansion of the peaking PA. However, the efficiency of the Doherty amplifier is its most important characteristic. Currently, the most popular design approach to design these amplifiers is to adjust the biases for maximum efficiency and recover the linearity using a digital predisortion algorithm. Architecture of the Three-Stage Doherty Power Amplifier There are two kinds of three-stage Doherty PA architectures as shown in Figure 5(a) and (b). Offset Line Carrier PA Output Combiner Ro∠θc Offset Compensation λ /4 (Zo3) Peaking PA 1 Ro∠θp1 λ /4 (Zo2) Ro ∠(90° + θc – θp1) Peaking PA 2 Ro∠θp2 λ/4 (Zo1) Ro ∠(180° + θc – θp2) Ro (a) Offset Compensation Carrier PA λ /4 (Zo1) Offset Line Ro ∠θc Ro ∠(90° + θp1 – θc) λ/4 (Zo3) Peaking PA 1 λ/4 (Zo2) λ /4 (Zo4) Ro ∠θp1 Ro Ro Y Peaking PA 2 Ro ∠θp2 Ro ∠(90° + θp1 – θp2) Output Combiner (b) Figure 5. Schematics of the three-stage Doherty power amplifiers. (a) Previously reported three-stage Doherty power amplifier and (b) new three-stage Doherty power amplifier. August 2010 77 Ids ImaxP ∗ ImaxC : ImaxP1 : ImaxP2 = 1 : 2 : 2 IC IP1 IP2 ImaxC Vin 0 0.33 0.6 (a) 1 Vmax 1 Vmax Ids Imax IC IP1 IP2 Vin 0 0.33 0.6 (b) Figure 6. Fundamental current profiles of each power amplifier. (a) Three-stage I Doherty power amplifier (1:2:2) and (b) three-stage II Doherty power amplifier (1:1:1). units, but the two peaking PAs are turned on sequentially in the three-stage Doherty PA instead of simultaneously like a multistage amplifier. Thus, three peak efficiency points are formed: at the two turn-on points and at the peak power. In the three-way structure, the peaking PAs are turned on simultaneously, similarly to N-way power combining. To achieve proper load modulation, the three-way Doherty PA requires two quarter-wavelength transmission lines, TABLE 1. The design formula for the three-stage I and II Doherty power amplifier. Characteristic Impedance Z01 Z02 Z03 Z04 * Three-Stage I Using Different Size R0 # R0 # m2 Å 1 1 m1 1 m2 m1 # m2 Å 1 1 1 m1 2 2 R0 # "m1 – Three-Stage II Using Identical Size 3 # R0 ÅY 3 # R0 Å4 # Y R0 1 # R0 ÅY (Three-stage I) Carrier PA : First Peaking PA : Second Peaking PA = 1 : m1 : m2 (Three-stage II) Carrier PA : First Peaking PA : Second Peaking PA = 1 : 1 : 1 Y is the impedance transforming ratio of the quarter-wavelength transmission line (Z04) and can be chosen for design convenience. * 78 but the three-stage I and three-stage II Doherty PAs require three and four quarter-wavelength transmission lines, respectively. There is no known circuit solution to implement the three-stage I shown in Figure 5(a) with a uniform gain and proper uneven power combining simultaneously. To maintain a flat gain profile versus power level, as mentioned earlier, the input dividing loss of the carrier PA should be compensated by the high gain arising from load modulation. But the three-stage I Doherty PA cannot provide enough load modulation for the carrier PA to compensate for the loss. Accordingly, gain at the low output power region, where only the carrier PA is operating, is lower than that of the Doherty PA at the peak output power. This gain fluctuation, indicating a nonlinear AM-AM characteristic, is a big problem of the threestage I Doherty PA. However the three-stage I Doherty amplifier can be designed, with proper output power combining, using different unit cell sizes. This is done by shaping the input power dividing ratio for each PA according to power level [15] or by controlling the gate biases of the PAs according to the input power level to generate the proper current from the PAs. We will revisit this issue later. Here, it is assumed that suitable PA currents are generated for the output powers to be combined, achieving the three maximum efficiency points with maximum peak power. The three-stage II can be designed using identical PAs having the same peak envelope power. The carrier PA’s load impedance for this case is changed from 3 # Ro to Ro , which is similar to the three-way Doherty PA. Thus, this amplifier theoretically provides a uniform gain across input power level. Figure 6 shows the ideal current profiles of each PA when the PAs in a three-stage I Doherty PA have the proper load modulation. For the three-stage I, saturated operation of the carrier PA with constant current is required to get proper output power combining as shown in Figure 6(a). This highly saturated operation causes gate current flow for GaN HEMT. This is another problem of the three-stage I Doherty PA. Since the GaN HEMTs power devices are favored because of their high efficiency and power density, this is a serious limitation of the three-stage I when taken together with the issue of nonuniform gain. By contrast, the three-stage II does not have those problems and is currently the favored choice. Design Considerations for Three-Stage Doherty Power Amplifiers Choosing the Proper Impedance Transformation Ratio Y The design formulae for the three-stage I and II are summarized in Table 1. The size ratio between the carrier and peaking PAs of the three-stage I Doherty August 2010 PA is defined as 1:m1:m2, where m1 and m2 are the optimum sizes of the first peaking PA and second peaking PA relative to the carrier PA, respectively, and m1 and m2 are larger than one. The Y in the three-stage II design is the impedance transforming ratio from output load Ro to the power combining point through the quarter-wave-length transmission line, Z04 [see Figure 5(b)]. The selection of Y is important in the design of the Doherty PA because it determines the peaking PAs’ output impedance (R out) and the characteristic impedances of the other quarter-wave-length transmission lines simultaneously. The high output impedance of the peaking PA in the off state is essential, otherwise the carrier PA’s output power leaks through, reducing the output power and efficiency. For the three-stage II, the peaking PAs are connected to the output power combining node (Vo) through two quarter-wave-length transmission lines as shown in Figure 7(a). As shown in the figure, the variables M, P, Q, and Z are defined as the characteristic impedance ratios of the quarter-wavelength transmission lines. The final out put impedance (Rout) of the peaking PA is determined by the values of P # Ro and Q # Ro as follows: Load modulation suitable for Doherty operation can be achieved from the three-stage II topology. Therefore, a large reduction of s is not recommended. In this article, we assume that the s value is 0.8–1, which does not affect the output impedance of the peaking PA (R′out). The Rout expansion from R′out is shown in Figure 7(b) [14]. As shown in the figure, if all of the unit PAs are matched to Ro V, a Y parameter above 0.75 makes the Rout decrease and can disturb the proper load modulation. On the other hand, the selection of a small Y value can cause the line-width problems for the quarter-wave transformer (M) for the carrier amplifier due to the resulting high characteristic impedance. Therefore, the Y values have to be selected considering the peaking PA’s output impedance and the line-width of the quarter-wave-length transmission line on a given substrate. In the following examples, we use a Y value of 0.75, s of 1, and TACONIC’s TLY-5 substrate (er 5 2.2) for a real implementation. (Zo1) M · Ro ∠90° λ /4 Offset Thus, as the parameter Y becomes smaller, Rout becomes higher, and the leakage through the peaking PA can be minimized. If the matching impedance of the peaking PA at the maximum output power is not matched to Ro V but rather to s # Ro V, an arbitrarily chosen impedance, Rout becomes: 6 Rout 5 3 r # Rout . (4) 4#s#Y Consequently, Rout at the output node (Vo) is inversely proportional to the two parameters Y and s However, if the matching impedance of the peaking PA is decreased, the output impedance of the peaking PA (R′out) is also reduced because the characteristic impedance of the offset-line is also decreased. August 2010 Carrier Offset Peaking 1 (Zo2) Q · Ro ∠90° λ /4 (Zo3) P · Ro ∠90° λ /4 ′ Rout Vo (Zo4) Z · Ro ∠90° λ /4 Ro /Y Rout Ro Offset Peaking 2 (a) (Q/P)2 1.5 1.3 1.4 1.2 1.3 1.1 1.2 Y Q 2 r 3 r 6 Rout a b # Rout 5 # # Rout . P 4 Y (3) 1.1 1 1 0.9 Output Impedance (Rout) Expansion Region 0.8 0.9 0.7 0.8 0.6 0.7 0.8 0.85 0.9 σ (b) 0.95 1 Figure 7. (a) Output circuit topology of the three-stage II Doherty power amplifier and (b) output impedance (Rout) at the output combining node (Vo) versus Y and s. 79 The three-stage Doherty PA has about 10% improved efficiency compared to the two-way and three-way Doherty PA. Ids Imax 0–0.33 0.33–0.5 0.5– 1 Ro 2Ro Imax/2 3Ro Imax/3 Vdc (a) Vds Ids Imax Ro 4Ro Efficiency Comparison of N-way and Three-Stage Doherty Power Amplifiers Imax/4 Vdc (b) Vds Vdc (c) Vds Ids Imax Ro Imax/4 Figure 8. Load lines of three-stage II power amplifier with 1:1:1 ratio. (a) Carrier power amplifier, (b) first peaking power amplifier, and (c) second peaking power amplifier. Load Modulation of the Three-Stage II Doherty Power Amplifier Load modulation suitable for Doherty operation can be achieved from the three-stage II topology, and Figure 8 illustrates its dynamic load lines with identical unit PAs. In the region of 0–0.33 of Vin /Vmax, only the carrier PA operates, and in the region of 0.33–0.5, the carrier and one peaking PA operate. All of the PAs are turned on in the region of 0.5–1. The carrier 80 PA maintains a 3 # Ro load impedance when the peaking PAs are turned off. Thus, at the 29.54 dB backedoff output power, the carrier PA’s load-line reaches the knee region and operates at maximum efficiency since full power is generated from the carrier amplifier for this bias condition. In this region, the first peaking PA is turned on. The load impedance of this PA is converted from open to 4 # Ro. The second maximum efficiency point is achieved when the output power is backed off 6 dB from the peak power. In this case, the load impedances of the carrier and first peaking PAs are modulated to 2 # Ro and 4 # Ro , respectively. Above 26 dB backed-off output power, the first peaking PA also maintains maximum efficiency due to output impedance of 4 # Ro. As the input power increases, the second peaking PA is turned on, and at the peak power, the load impedances of all PAs are converted to Ro , forming the third maximum efficiency point. Since each PA has a maximum efficiency before the other PAs are turned on, the three-stage II Doherty PA has three maximum efficiency points as a function of input power level. The three-stage I PA has a similar output-combining characteristic under the condition of proper current generation, depicted in Figure 6(a). As described earlier, the N-way Doherty PA has two maximum efficiency points, and the three-stage Doherty PAs have three maximum efficiency points as a function of output power level [5]–[7], [12]. The back-off levels with the maximum efficiencies are determined by the size ratios of the peaking PAs to the carrier PA [15], [18]. In Table 2, the back-off levels for maximum efficiency of the various Doherty PAs are summarized. In Figure 3, the efficiency characteristics of the three kinds of Doherty PAs are illustrated when all of the PAs are biased in class B mode under ideal conditions. Among the several three-stage Doherty PAs, the threestage Doherty PA I and II that have maximum efficiencies at 26 dB and 29.54 dB backed-off output power are plotted to simplify comparison to the two-way and three-way Doherty PA. The three-stage Doherty PA maintains relatively flat and high efficiency as a function of output power level due to the three maximum points, compared to those of the two-way and threeway Doherty PAs. For a modulated signal excitation, the average drain efficiency (DE) can be calculated as follows [19]: 6 DE 5 e prob # 1 Vin 2 # Pout 1 Vin 2 dvin , e prob # 1 Vin 2 # Pdc 1 Vin 2 dvin (5) where prob·(Vin) is the probability of the occurrence of a voltage value of Vin for the modulated input signal, August 2010 and it is based on the Rayleigh distriTABLE 2. The back-off levels for peak efficiency bution. The overall DE is determined and average drain efficiency of the N-way and three-stage by the ratio of the multiplication of the Doherty power amplifiers using an 802.16e Mobile WiMAX signal probability distribution and the power with 8.5 dB peak-to-average power ratio. generation term (Pout) over the multiN-way Back-off DEAvg plication of the distribution and the dc power (Pdc). The numerator of the above Two-way 59% 26 dB function is defined as the power generaThree-way 61.2% 29.54 dB tion distribution (PGD) of the Doherty PA [7], [11]. In Figure 3, the PGD is shown Three-Stage I Cell Size Ratio Back-off DEAvg for several kinds of Doherty Amplifier (Carrier : Peaking 1 : Peaking 2) for an 802.16e mobile WiMAX signal 1:2:2 69.8% 24.44/29.54 dB with 8.5 dB PAPR. 1:2:3 69.4% 26/29.54 dB The distribution shown in Figure 3 indicates the dominant region of oper1:3:3 70.5% 24.87/212 dB ation (0.03 ' 0.37) for amplification of 1:3:4 71% 26/212 dB the modulated signal, and the instantaneous efficiency in this region signifiThree-Stage II Cell Size Ratio Back-off DEAvg cantly affects the PA’s overall efficiency (Carrier : Peaking 1 : Peaking 2) for amplification of a modulated signal. 1:1:1 69.4% 26/29.54 dB Accordingly, in this important region of operation (which is highlighted in 1:2:2 70.1% 26/213.98 dB Figure 3), the three-stage Doherty PA 2:3:3 71% 26/212 dB delivers high efficiency while the twoway and three-way Doherty PAs do not. In Table 2, the calculated average TABLE 3. Measured average performance of the two three-stage efficiencies of the various Doherty PAs Doherty power amplifiers with gate bias control after linearization for WiMAX signal excitation are preusing an 802.16e Mobile WiMAX signal. sented. The three-stage Doherty PA has After about 10% improved efficiency comDE Avg RCE Linearization Signal Pout Avg pared to the two-way and three-way Three-stage I WiMAX @ 8.5 dB PAPR 36.85 dBm 55.46% 237.23 dB Doherty PA. In Table 3, the measured performance of three-stage Doherty Three-stage II WiMAX @ 7.8 dB PAPR 42.54 dBm 55.4% 233.15 dB amplifier for WiMAX signal excitation are presented. It is clearly shown that the three-stage Doherty PA is the most efficient strucpower from the class-C-biased peaking PA, the input ture for amplification of the WiMAX signal with high power should be large, resulting in over-driving the PAPR signals. carrier PA. PAs of the three-stage Doherty architecture are turned sequentially as the input power increases. Thus, the three-stage PAs’ gate biases are much lower Behavior of Real Doherty Amplifiers than that of the N-way Doherty case, and the load cannot be modulated completely in the peak-power Effects of Unequal PA Currents region, even worse than in the N-way Doherty PA. and Constant Transconductance Due to the incomplete load modulation, we cannot The behavior of the Doherty amplifiers we have simultaneously achieve both high efficiency and high described so far assumes that all of the PAs based on peak power as we have described so far. the same size device reach the same current level at the One method to overcome the problem of incomplete same maximum input power even though their biases load modulation due to unequal currents is to employ are different. Because each PA is turned on one-by-one an uneven input power drive technique [20]. The as the input power level increases (with the peaking peaking PA with a low gate bias gets more input power PAs turned on at higher input powers than the carrier than the carrier PA. In this way, the current from the PA), the current levels of each PA are different: lower peaking PA increases faster after it is turned on, genfor the cells that turn on later. As well, it should not be erating the current shown by Figure 8(b)(c). But this assumed that the currents of each device are the same reduces the linear gain because of the low input to the even though the sizes of the PAs are the same. Specarrier PA, and the load modulation is not sufficient cifically, the peaking PAs of the N-way Doherty PA are to achieve high efficiency at both the backed-off outbiased in a class C mode for turn-on operation at the put power level and at peak power. Another method to required input power level. Therefore, to get the full August 2010 81 Because each PA is turned on one-by-one as the input power level increases the current levels of each PA are different. Quiescent Bias Point Class B compensate for unequal values is to input a different modulated signal for each PA such that the combined output recovers the original signal [15]. In this case, we need to generate a new input signal appropriate for Doherty operation. Gate Bias Adaptation of the Peaking Power Amplifiers in Three-Stage II Circuit 180˚ A simple alternative method is to control the gate bias of the peaking PAs [21]. Generally, gate bias control of the Doherty PA is employed for accurate intermodulation cancellation. But we may also use gate bias control of the peaking PA for performance optimization, that is, to simultaneously achieve high efficiency at the backed-off input power and at high peak powers [17]. To illustrate the effects of gate-bias adaptation, operation of a three-stage II Doherty PA with gate bias adaptation was investigated through the Matlab simulations. Identical-size unit PAs were in a three-stage II Doherty PA design, and we assumed that all of the PAs had constant gm characteristics for simplicity. If the carrier PA is biased for class B mode, the current conduction angle, Peaking PA 1 151.05˚ Class C 141.06˚ Peaking PA 2 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Normalized Input Voltage 1.2 Fundamental Drain Voltage (V) Fundamental Drain Current (A) Figure 9. Optimum gate bias shapes for the peaking power amplifiers versus the normalized input voltage for threestage II power amplifier with 1:1:1 ratio. *Maximum Fundamental Current Magnitude 1 0.8 0.6 0.4 0.2 0 –0.2 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Normalized Input Voltage (a) 1 Fundamental Current (A) 300 Load Impedance (Ω) 250 200 150 100 50 0 *Ro 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Normalized Input Voltage (c) 1 Carrier PA Peaking PA 1 Peaking PA 2 35 30 *dc Drain Bias 25 20 15 10 5 0 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Normalized Input Voltage (b) 5 10 15 20 Fundamental Voltage (V) (d) 25 1 30 Thin : Without GA Thick : With GA Figure 10. Simulation result of the three-stage II Doherty power amplifier with and without the gate bias adaptation (GA). (a) Fundamental drain currents, (b) fundamental drain voltages, (c) fundamental load impedance, and (d) fundamental load lines of each power amplifier. 82 August 2010 August 2010 3.54 dB. Since the load lines of the two peaking PAs do not reach the knee region due to the low quiescent bias point, the two peaking PAs have low efficiencies at 80 Efficiency (%) 70 60 Thin : Without GA Thick : With GA DETotal 40 20 30 34 (With) With 3.54 dB Carrier PA Peaking PA 1 Peaking PA 2 32 DETotal (Without) 50 30 Gain (dB) over one period of 360° would be constant: 180° for all input voltage magnitudes. In this case, the fundamental current of the PA would be linearly proportional to the input voltage level. However, the conduction angles of the peaking PAs will be changed because of the class C mode with smaller conduction angle than 180°. Therefore, the fundamental current and dc current of the peaking PAs should be determined according to the conduction angle. Using this information, we can explain the behavior of the Doherty PA. For the simulation, the conduction angle of the carrier PA at the full-power state was set to 180° (class B), and those of the peaking PAs to 151° (class C) and 141° (class C) to turn on the PAs sequentially. The applied dc drain bias (Vdc) was 30 V. The gate bias control voltage versus the normalized input voltage magnitude is illustrated in Figure 9. The bias on each peaking PA was increased from a class C mode toward class B to generate the maximum output from each at the maximum input power. Figure 10 illustrates simulation results of the three-stage II with and without gate bias adaptation of the peaking PAs. Figure 10(a) shows the simulated fundamental drain current of each PA. Without gate bias adaptation, the fundamental drain current of the first and second peaking PAs did not reach 1 A (which is the maximum drain current for each PA) due to the low gate bias. Figure 10(b) shows the fundamental drain voltage variation versus normalized input voltage. As expected from Figure 10(a), the two peaking PAs’ drain voltages were lower than the maximum applied voltage of 30 V. In particular, the fundamental current and voltage of the second peaking PA were significantly lower due to insufficient load modulation. The load impedance variation of each current source is presented in Figure 10(c). None of the PAs reached the required load impedance above 0.33 of the normalized input power level. Specifically, the load impedance of the peaking PAs did not converge to Ro , and a serious degradation of the peak power was experienced. However, after applying gate bias adaptation, the fundamental drain current and voltage of each PA properly increased, indicating proper Doherty operation. In Figure 10(d), the simulated load lines of each PA are illustrated, based on the data in Figure 10(a) and (b), showing only the lower than 30 V for simplicity. As shown in Figure 10(d), without gate bias adaptation, the peaking PAs did not reach the knee region due to improper load modulation. After applying the gate adaptation, the carrier and peaking PAs operated properly, following the knee region, and all of the PAs reached the 1 A maximum current level. Figure 11(a) presents the simulated efficiency characteristics of each PA versus output power. Improper load modulation reduces the peak power by about Without 36 38 40 42 44 Output Power (dBm) (a) 46 48 16 15 14 With GA 13 12 11 10 Without GA 9 8 7 28 30 32 34 36 38 40 42 44 46 48 Output Power (dBm) (b) Figure 11. Simulated (a) efficiency and (b) gain characteristics of the three-stage II Doherty power amplifier with and without the gate bias control. DE: drain efficiency. Input Dividing Circuit Gate Drain Carrier PA First Peaking PA Gate Bias Drain Adaptation Output Combining Circuit Second Peaking PA Gate Bias Adaptation Drain Figure 12. Photograph of a three-stage I Doherty power amplifier. 83 the backed-off output power. Simulated gain versus output DE power level is depicted in FigPAE 60 20 Gain ure 11(b). The calculated gain flatness is improved from 55 55.4% 18 3.8 dB to 1 dB after applying 50 16 the gate bias control tech46.9% nique, indicating much more 45 14 linear AM-AM characterisFirst Back Off 40 12 tics. These simulation results ±3 dB clearly show that the load 35 10 modulation behavior of the 30 normal three-stage II Doherty 8 44.4 dBm Second Back Off PA is limited, but that the lim25 6 itation can be removed by the 28 30 32 34 36 38 40 42 44 46 gate bias control technique. Output Power (dBm) (a) Improper load modula65 22 tion due to the low quiesDE cent bias point is common 20 60 PAE Gain to both three-stage Doherty 57% 18 55 PAs, but the problem can 53% be solved by adaptation. To 16 50 demonstrate this, the two kinds of three-stage Doherty 45 14 PAs were implemented for 40 12 gate bias verification. ±1 dB The three-stage I Doherty 35 10 PAs, which have different 30 8 sizes of unit PAs, were impleSecond Back Off First Back Off 44.54 dBm mented using Freescale’s 4 25 6 W and 10 W PEP LDMOS28 30 32 34 36 38 40 42 44 46 FETs for the 1:2:2 Doherty Output Power (dBm) PA which is shown in Fig(b) ure 12. Measured results versus output power level Figure 13. Measured results of a 1:2:2 three-stage I Doherty power amplifier. Drain for a one-tone signal are efficiency (DE), power added efficiency (PAE) and gain performance (a) without and summarized in Figure 13(a) (b) with gate bias control for one-tone signal. without bias adaptation and (b) with the gate bias control. The PA without adaptation has serious gain –20 degradation due to the improper load modulation, resulting in PAE degradation. Above the second backed-off output power region, the three-stage I –30 –17.7 dBc Doherty PA without gate control has a 46.9% PAE and 63 dB gain flatness. To achieve the same peak –40 power from the three-stage I Doherty PA without –39.8 dBc gate bias control, 5.3 dB or more input of power is –50 Before needed and the carrier PA is seriously saturated. Linearization On the other hand, the PA with the adaptation has a –60 significantly improved PAE and gain flatness, 53% After Linearization and 61 dB, respectively, without the hard saturated –70 operation of the carrier PA. 0.990 0.995 1.000 1.005 1.010 Figure 14 shows the output spectra of the threeFrequency (GHz) stage I Doherty PA before and after linearization. The input signal is an 802.16e Mobile WiMAX signal with Figure 14. Measured output spectra of a three-stage I 8.5 dB PAPR. In this work, employing the digital feedDoherty power amplifier with gate bias adaptation before and back predistortion (DFBPD) algorithm [3], the adjacent after the linearization at an average output power of 37 dBm. Gain (dB) Gain (dB) PSD (100 kHz RBW, 10 dB/div.) DE, PAE (%) 22 DE, PAE (%) 65 84 August 2010 16 45 14 40 12 35 10 30 8 25 20 38 With GA (Gain) Without GA (Gain) 39 6 40 41 42 Output Power (dBm) With GA (DE) Without GA (DE) 43 4 44 With GA (PAE) Without GA (PAE) (b) Figure 16. Measured (a) drain efficiency (DE), gain, and power added efficiency (PAE) characteristics of a three-stage II Doherty power amplifier with gate bias adaptation, and (b) performance comparison of the power amplifier with and without gate bias adaptation for an 802.16e Mobile WiMAX signal. August 2010 PSD (100 kHz RBW, 10 dB/div.) Gain (dB) 50 Gain (dB) DE, PAE (%) DE, PAE (%) channel leakage ratio at a 3.572-MHz offset is linearized Gate Bias to 239.8 dBc. Comparing the Adaptation Drain PAs with and without the gate bias control, the PAE characteristic of the proposed First Peaking PA three-stage I Doherty PA is improved by about 2.7% with Gate Bias a 2.5 dB enhanced gain at the Adaptation Output Drain same average output power Combiner of 37 dBm. After linearization, the proposed PA has a 52.14% PAE and 55.46% DE at an Second Peaking PA average output power of 36.85 dBm, which is 7.7 dB backed Drain Gate off from the peak power. The relative constellation error is also enhanced to 237.23 dB, successfully satisfying the Carrier PA system specification. To implement the threestage II Doherty PA, a class Figure 15. Photograph of a three-stage II Doherty power amplifier. AB mode PA was designed at 2.655 GHz using Cree’s CGH40045 GaN HEMT 24 65 device. The quiescent bias current of the carrier PA is DE 59.1% 22 60 55 mA, and the PA delivers a 64.6% DE at an output PAE 20 Gain 55 power of 46.4 dBm. The implemented PA with 1:1:1 54.6% 18 16 50 ratio is shown in Figure 15. The measured performance 14 efficiency is illustrated in Figure 16(a). This amplifier 45 12 was employed for amplification of an 802.16e Mobile 40 10 WiMAX signal with 7.8 dB PAPR. Figure 16(b) shows 8 35 6 the measured efficiency of the envelope tracking three30 4 Second Back Off 50.5 dBm stage II Doherty PA with and without gate bias adapta25 2 (PEP) First Back Off tion. As expected from the Matlab simulation, efficiency 0 20 and gain of the three-stage Doherty PA with the gate 34 36 38 40 42 44 46 48 50 52 Output Power (dBm) bias adaptation are significantly improved along the (a) backed-off average output power level. The measured 20 60 output spectra before and after linearization are pre18 55 sented in Figure 17. Employing the DFBPD algorithm, –30 –40 –17.7 dBc –50 –60 –40 dBc Before Linearization –70 After Linearization –80 2.63 2.64 2.65 2.66 2.67 Frequency (GHz) 2.68 Figure 17. Measured output spectra of a three-stage II Doherty PA before and after linearization at an average output power of 42.54 dBm. 85 the adjacent channel leakage ratio at a 6.05-MHz offset is linearized to 240 dBc while maintaining the efficiency of 55.45% at an average output power of 42.54 dBm, 8 dB backed off from the peak power level. The relative constellation error is also enhanced to 233.15 dB, successfully satisfying the system specification. These experimental results clearly show that a threestage Doherty PA with the gate bias adaptation technique has superior efficiency with a high peak power. It can be considered a promising candidate for a highly efficient transmitter. Conclusions This article briefly introduced design approaches and issues for the N-way and three-stage Doherty PAs. Two kinds of three-stage Doherty PA were introduced, and the principles of operation and advantages of the three-stage Doherty PAs were explained. For proper load modulation, gate bias adaptation was described and its operation investigated by Matlab simulation. We compared the average efficiencies of various Doherty PAs under excitation by an the 802.16e Mobile WiMAX signal. Simulations verified that three-stage Doherty PAs have a high efficiency over a broad output power level. For verification, the two kinds of three-stage Doherty PAs were implemented using Freescale’s LDMOSFETs and Cree’s GaN HEMT devices, and gate bias adaptation was implemented using the envelope tracking technique for efficient operation at a backedoff output power region while maintaining the peak power. These experimental results clearly show that the three-stage Doherty with envelope tracking technique has superior efficiency with a high peak power. The linearity of these Doherty PAs are not good but can be improved by DPD. Therefore, the three-stage Doherty PA with gate bias adaptation could a very good candidate for highly efficient transmitters for base-station applications. Acknowledgment This research was supported by the The Ministry of Knowledge Economy, Korea, under the Information Technology Research Center support program supervised by the National IT Industry Promotion Agency (NIPA2009-C1090-0902-0037) and WCU (World Class University) program through the Korea Science and Engineering Foundation, funded by the Ministry of Education, Science and Technology (Project No. R312008-000-10100-0). References [1] J. Kim and K. Konstantinou, “Digital predistortion of wideband signals based on power amplifier model with memory,” IEE Electron. Lett., vol. 37, no. 23, pp. 1417–1418, Nov. 2001. [2] K. J. Muhonen, M. Kavehrad, and R. Krishnamoorthy, “Look-up table techniques for adaptive digital predistortion: A development 86 and comparison,” IEEE Trans. Veh. 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