ADSD-1402S

®
ADSD-1402S
®
Dual, 14-Bit, 2MSPS Sampling A/D Converter
PRODUCT OVERVIEW
DATEL's ADSD-1402S is a functionally complete, dual
14- bit, 2MSPS, sampling A/D converter. Its standard,
40-pin, triple-wide SMT DIP contains two fast-settling
sample/hold amplifiers, two 14-bit A/D converters,
multiplexed output buffers, a precision reference, and all
the timing and control logic necessary to operate from
either two or a single start convert pulse.
The ADSD-1402S is optimized for wideband
frequencydomain applications and is fully FFT tested. The
ADSD-1402S requires only ±5V supplies and typically
consumes 0.6 Watts. Models are available in either
commercial 0 to +70°C or military -55 to +125°C (-EX
suffix model) operating temperature ranges.
FEATURES

14-bit resolution; 2MSPS sampling rate

Functionally complete; ±5V input range

No missing codes over full temperature range

Edge-triggered; No pipeline delays

±5V supplies, 0.6 Watts

Small, 40-pin, low-cost surface-mount TDIP

79dB SNR, –80dB THD

Ideal for both time and frequency domain
applications

Out-of-range indicator
PIN
INPUT/OUTPUT CONNECTIONS
FUNCTION
PIN FUNCTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
INPUT A
+5VA
ANALOG GROUND
GAIN A
OFFSET A
RANGE
2.5V REF
ANALOG GROUND
–5V
ENABLE A
START A
+5VD
BIT 14 (LSB)
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
DGND
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
INPUT B
+5VA
ANALOG GROUND
GAIN B
OFFSET B
N/C
N/C
ANALOG GROUND
–5V
ENABLE B
START B
EOC
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
DGND
BLOCK DIAGRAM
Figure 1. ADSD-1402S Functional Block Diagram
DATEL
•
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
•
Tel: (508) 339-3000
•
www.datel.com
14 Jan 2013
•
e-mail: help@datel.com
MDA_ADSD-1402S.B01 Page 1 of 5
®
ADSD-1402S
®
Dual, 14-Bit, 2MSPS Sampling A/D Converter
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
LIMITS
+5V Supply (Pins 2, 12, 39)
0 to +6
–5V Supply (Pins 9, 32)
0 to –6
Digital Inputs (Pins 3, 10, 11, 31)
–0.3 to +VDD +0.3
Analog Input (Pins 1, 40)
±5
Lead Temp. (10 seconds)
+300
UNITS
Volts
Volts
Volts
Volts
°C
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, +VDD = +5V, Vee = –5V, 2MSPS sampling rate,Vin = ±5V and a minimum
7 minute warmup unless otherwise specified.)
ANALOG INPUTS
Input Voltage Range
Input Impedence
Input Capacitance
DIGITAL INPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
PERFORMANCE
Integral Non-Linearity (fin = 10KHz)
+25°C
0 to +70°C
–55 to +125°C
Differential Non-Linearity (fin = 10KHz)
+25°C
0 to +70°C
–55 to +125°C
Offset Error
+25°C (see Figure 3)
0 to +70°C
–55 to +125°C
Gain Error
+25°C (see Figure 3)
0 to +70°C
–55 to +125°C
No Missing Codes (fin = 975kHz)
14 Bits
Resolution
OUTPUTS
MIN.
—
—
—
TYP.
±5V
400
7
DATEL
UNITS
Volts
Ω
pF
+2.0
—
—
—
—
—
—
—
—
+0.8
+20
–20
Volts
Volts
μA
μA
—
—
—
±1
±1
±2
—
—
—
LSB
LSB
LSB
–0.99
–0.99
–0.99
±0.5
±0.5
±0.75
+1.75
+2.5
+2.5
LSB
LSB
LSB
—
—
—
±0.25
±0.25
±0.5
±0.5
±0.5
±0.8
%FSR
%FSR
%FSR
—
—
—
±0.3
±0.3
±0.6
±0.6
±0.6
±0.8
%FSR
%FSR
%FSR
–55 to +125°C
14 Bits
TYP.
MAX.
UNITS
MIN.
Output Coding
Logic Level
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Internal Reference
Voltage, +25°C
0 to +70°C
External Current
MAX.
—
—
15
DYNAMIC PERFORMANCE
Total Harm. Distort. (–0.5dB)
dc to 500kHz
500kHz to 1MHz
Signal-to-Noise Ratio (w/o distortion, –0.5dB )
dc to 500kHz
500kHz to 1MHz
Signal-to-Noise Ratio (and distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
Spurious Free Dyn. Range 
dc to 500kHz
500kHz to 1MHz
Two-tone IMD Distortion (fin = 975kHz,
fs = 2.0Mhz, –0.5dB)
Input Bandwidth (–3dB)
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Slew Rate
Aperture Delay Time
Aperature Uncertainty
S/HAquisition Time (to ±0.003%FSR),step input
Conversion Rate
Feedthrough Rejection (fin = 1MHz)
Noise
POWER REQUIREMENTS
Power Supply Ranges
–5V Supply
+5V Supply
Power Supply Currents
–5V Supply
+5V Supply
Power Dissipation
Power Supply Rejection
PHYSICAL/ENVIRONMENTAL
Operating Temp. Range, Case
ADSD-1402SMC
ADSD-1402SMM
Storage Temperature Range
Weight
Package Type
MIN.
TYP.
MAX.
UNITS
—
—
–79
–73
–72
–70
dB
dB
76
76
80
80
—
—
dB
dB
70
69
74
73
—
—
dB
dB
—
—
–85
–74
–74
–70
dB
dB
—
–76
—
dB
—
—
—
—
—
—
2
—
—
16
12
±250
—
—
100
—
85
250
—
—
—
±10
5
150
—
—
—
MHz
MHz
V/μs
ns
ps
ns
MHz
dB
μVrms
–5.25
+4.75
–5
+5.0
–4.75
+5.25
Volts
Volts
–80
—
—
—
–70
+50
0.6
—
—
+70
0.75
±0.01
mA
mA
Watts
%FSR%V
—
+70
—
+125
—
+150
16.1/0.6
0-pin, SMT TDIP
°C
°C
°C
grams/oz
0
–55
–65
Footnote:
 Same specification as In-Band Harmonics and Peak Harmonics.
Offset Bin.
+2.4
—
—
—
—
—
—
—
—
+0.4
4
4
Volts
Volts
μA
mA
+2.45
+2.45
—
+2.5
+2.5
—
+2.55
+2.55
5
Volts
Volts
mA
•
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
•
Tel: (508) 339-3000
•
www.datel.com
14 Jan 2013
•
e-mail: help@datel.com
MDA_ADSD-1402S.B01 Page 2 of 5
®
ADSD-1402S
®
Dual, 14-Bit, 2MSPS Sampling A/D Converter
TECHNICAL NOTES
1. Rated performance requires using good high-frequency circuit board layout
techniques. Connect the digital and analog grounds to one point, the analog
ground plane beneath the converter. Due to the inductance and resistance
of the power supply return paths, return the analog and digital ground
separately to the power supplies.
CALIBRATION PROCEDURE
1. Connect the converter per Figure 3. Apply a pulse of 100 nanoseconds
minimum to START CONVERT (pin 11) at a rate of 200kHz. This rate is
chosen to reduce flicker if LED's are used on the outputs for calibration
purposes.
2. Zero (Offset) Adjustments
INPUT
RANGE
OFFSET ADJUST
+1/2 LSB
GAIN ADJUST
FS – 1½ LSB
±5V
+0.000305V
+4.999085V
Table 2. Offset and Gain Adjustments
Adjust the gain trimpot R1 until the output code flickers equally between
11 1111 1111 1110 and 11 1111 1111 1111.
4. Repeat above steps for Analog Input B (Pin 40). Use trimpot R3 for the zero
(Offset) adjustment and trimpot R4 for the Full-Scale (Gain) adjustment.
5. To confirm proper operation of the device, vary the precision reference voltage source to obtain the output coding listed in Table 3.
Apply a precision voltage reference source between ANALOG INPUT A (pin
1) and SIGNAL GROUND (pin 3), then adjust the reference source output per
Table 2. Adjust trimpot R2 until the code flickers equally between 10 0000
0000 0000 and 10 0000 0000 0001.
3. Full-Scale (Gain) Adjustments
Set the output of the voltage reference used in step 2 to the value shown in
Table 2.
25 nSec. per division
N
N+1
START
CONVERT
400 nSec.
100 nSec.
325 nSec.
EOC
175 nSec.
DATA OUT
DATA N VALID
ENABLE A
75 nSec.
ENABLE B
75 nSec.
Data N B
Data N A
DATA
A or B OUT
HIGH Z
HIGH Z
HIGH Z
Figure 2. ADSD-1402S Timing Diagram
OUTPUT CODING
INPUT RANGE
MSB
LSB
±5V
11 1111 1111 1111 +4.999390
11 1000 0000 0000 +4.250000
11 0000 0000 0000 +2.500000
10 0000 0000 0000 ±0.000000
01 0000 0000 0000 –2.500000
00 1000 0000 0000 –4.250000
00 0000 0000 0001 –4.999390
00 0000 0000 0000 –5.000000
BIPOLAR
SCALE
+FS – 1LSB
+3/4FS
+1/2FS
0
–1/2FS
–3/4FS
–FS+1LSB
–FS
Table 3. Output Coding
DATEL
•
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
•
Tel: (508) 339-3000
•
www.datel.com
14 Jan 2013
•
e-mail: help@datel.com
MDA_ADSD-1402S.B01 Page 3 of 5
®
ADSD-1402S
®
Dual, 14-Bit, 2MSPS Sampling A/D Converter
S
See timing diagram for details.
Notes:
~ Recommended to use same supply source for +5 Analog and +5 Digital. Try using as clean of a supply as possible (Bypass caps., 10uF and .1uF).
 Outputs are enabled by either turning ENABLE A (Pin 10) or ENABLE B
(Pin 31) low for prespective analog inputs A or B. A high on ENABLE A or ENABLE B results in disabling the output bus (High Z).
Figure 3. ADSD-1402S Connection Diagram
THERMAL REQUIREMENTS
The ADSD-1402S sampling A/D converter is fully characterized and specified
over the commercial operating temperature (ambient) range of 0 to +70°C and
military temperature range of –55 to +125°C (EX suffix). All room-temperature
(TA = +25°C) production testing is performed without the use of heat sinks
or forced-air cooling. Thermal impedance figures for each device are listed
in their respective specification tables. These devices do not normally require
heat sinks, however, standard precautionary design and layout procedures
DATEL
•
should be used to ensure devices do not overheat. The ground and power
planes beneath the package, as well as all pcb signal runs to and from the
device, should be as heavy as possible to help conduct heat away from the
package. Devices should be soldered to boards rather than "socketed", and of
course, minimal air flow over the surface can greatly help reduce the package
temperature.
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
•
Tel: (508) 339-3000
•
www.datel.com
14 Jan 2013
•
e-mail: help@datel.com
MDA_ADSD-1402S.B01 Page 4 of 5
®
ADSD-1402S
®
Dual, 14-Bit, 2MSPS Sampling A/D Converter
MECHANICAL DIMENSIONS - INCHES (mm)
®
®
ADSD-1402S
1.109 (28.17)
Dual 14-Bit, 2MSPS
Sampling A/D Converter
Made in USA
2.10 (53.34)
0.262 (6.65)
0.015 thick
copper leads
0.025 (0.635) typ
0.06 (15.24)
Bottom of
leads are
coplanar to
0.005
0.100 (2.54) typ
1.109
(28.17)
0.10 (2.54)
1.900 (48.26)
ORDERING INFORMATION
MODEL NUMBER
ADSD-1402S
ADSD-1402S-EX
ADSD-1402S-C
ADSD-1402S-EX-C
OPERATING
TEMP. RANGE
PACKAGE
ROHS
0 to +70°C
SMT-TDIP
No
-55to +125°C
SMT-TDIP
No
0 to +70°C
SMT-TDIP
Yes
-55to +125°C
SMT-TDIP
Yes
DATEL
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
ITAR and ISO 9001/14001 REGISTERED
ACCESSORIES
HS-40
Heat Sink for all ADSD-1402S models
. makes no representation that the use of its products in the circuits described herein, or the use of other
technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not
imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change
without notice.
© 2013
www.datel.com • e-mail: help@datel.com
14 Jan 2013
MDA_ADSD-1402S.B01 Page 5 of 5