Preliminary Data Sheet μPA2825T1S R07DS0755EJ0100 Rev.1.00 May 25, 2012 MOS FIELD EFFECT TRANSISTOR Description The μPA2825T1S is N-channel MOS Field Effect Transistor designed for power management applications of a notebook computer and Lithium-Ion battery protection circuit. Features • VDSS = 30 V (TA = 25°C) • Low on-state resistance ⎯ RDS(on) = 4.6 mΩ MAX. (VGS = 10 V, ID = 24 A) • 4.5 V Gate-drive available • Small & thin type surface mount package with heat spreader (HWSON-8) • Pb-free, Halogen Free Ordering Information Part No. Lead Plating μPA2825T1S-E2-AT ∗1 Pure Sn (Tin) Packing Package Tape 5000 p/reel HWSON-8 typ. 0.022 g Note: ∗1. Pb-free (This product does not contain Pb in external electrode and other parts.) Absolute Maximum Ratings (TA = 25°C) Item Drain to Source Voltage (VGS = 0 V) VDSS Symbol Ratings 30 Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) (TC = 25°C) Drain Current (pulse) ∗1 ID(DC) ID(pulse) ±24 ±96 A A PT1 1.5 W Total Power Dissipation ∗2 Total Power Dissipation (PW = 10 sec) ∗2 Unit V PT2 3.8 W Total Power Dissipation (TC = 25°C) Channel Temperature PT3 Tch 16.5 150 W °C Storage Temperature Tstg −55 to +150 °C Single Avalanche Current ∗3 Single Avalanche Energy ∗3 IAS EAS 18 32.4 A mJ Thermal Resistance Channel to Ambient Thermal Resistance ∗2 Channel to Case (Drain) Thermal Resistance Rth(ch-A) Rth(ch-C) 83.3 7.6 °C/W °C/W Notes: ∗1. PW ≤ 10 μs, Duty Cycle ≤ 1% ∗ 2. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt ∗ 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH R07DS0755EJ0100 Rev.1.00 May 25, 2012 Page 1 of 6 μPA2825T1S Chapter Title Electrical Characteristics (TA = 25°C) Item Zero Gate Voltage Drain Current Symbol IDSS MIN. TYP. MAX. 1 Unit μA Test Conditions VDS = 30 V, VGS = 0 V ±10 μA VGS = ±16 V, VDS = 0 V 2.5 V S VDS = 10 V, ID = 1 mA VDS = 10 V, ID = 6 A Gate Leakage Current IGSS Gate Cut-off Voltage Forward Transfer Admittance ∗1 VGS(off) | yfs | Drain to Source On-state Resistance ∗1 RDS(on)1 3.7 4.6 mΩ VGS = 10 V, ID =24 A RDS(on)2 Ciss 7.0 2600 12 mΩ pF VGS = 4.5 V, ID = 6 A VDS = 10 V, Input Capacitance 1.0 16 Output Capacitance Coss 850 pF VGS = 0 V, Reverse Transfer Capacitance Turn-on Delay Time Crss td(on) 800 17 pF ns f = 1 MHz VDD = 15 V, ID =12 A, Rise Time tr 86 ns VGS = 10 V, Turn-off Delay Time Fall Time td(off) tf 100 58 ns ns RG = 10 Ω Total Gate Charge QG 57 nC VGS = 10 V, 35 nC VGS = 5 V nC nC VDD = 15 V, ID =24 A Gate to Source Charge Gate to Drain Charge QGS QGD 7.5 22 Body Diode Forward Voltage ∗1 VF(S-D) 0.9 V IF = 24 A, VGS = 0 V Reverse Recovery Time Reverse Recovery Charge trr Qrr 42 37 ns nC IF = 24 A, VGS = 0 V, di/dt = 100 A/μs Note: ∗1. Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω D.U.T. L 50 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME RL RG PG. VDD VGS VGS Wave Form 0 VGS 10% 90% VDD VDS 90% BVDSS IAS VDS ID VDS 0 10% 10% tr td(off) Wave Form τ VDD Starting Tch 90% VDS VGS 0 τ = 1 μs Duty Cycle ≤ 1% td(on) ton tf toff TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω R07DS0755EJ0100 Rev.1.00 May 25, 2012 RL VDD Page 2 of 6 μPA2825T1S Chapter Title Typical Characteristics (TA = 25°C) FORWARD BIAS SAFE OPERATING AREA DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 1000 10 ms 120 ID(pulse) 100 ID - Drain Current - A dT - Percentage of Rated Power - % 140 100 80 60 40 1 ms 500 μ s PW = 100 μ s 200 μ s ID(DC) 10 RDS(on)Limited (VGS = 10 V) DC Power Dissipation Limited 1 0.1 20 TC = 25ºC Single Pulse 0.01 0.01 0 0 25 50 75 100 125 150 175 TC - Case Temperature - °C 0.1 1 10 100 VDS - Drain to Source Voltage - V rth(t) - Transient Thermal Resistance - °C/W TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 Rth(ch-A) = 83.3ºC/W 100 10 Rth(ch-C) = 7.6ºC/W 1 0.1 Single pulse Rth(ch-A): Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt 0.01 100 μ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s DRAIN CURRENT vs. FORWARD TRANSFER CHARACTERISTICS DRAIN TO SOURCE VOLTAGE 100 120 VGS = 10 V 10 ID - Drain Current - A ID - Drain Current - A 100 80 4.5 V 60 40 20 Tch = 150°C 75°C 25°C –55°C 1 0.1 0.01 VDS = 10 V Pulsed Pulsed 0 0.001 0 0.2 0.4 0.6 0.8 VDS - Drain to Source Voltage - V R07DS0755EJ0100 Rev.1.00 May 25, 2012 1 0 1 2 3 4 5 VGS - Gate to Source Voltage - V Page 3 of 6 Chapter Title GATE TO SOURCE CUT-OFF VOLTAGE vs. FORWARD TRANSFER ADMITTANCE vs. CHANNEL TEMPERATURE DRAIN CURRENT | yfs | - Forward Transfer Admittance - S 3 2 1 VDS = 10 V, ID = 1.0 mA 0 RDS(on) - Drain to Source On-state Resistance - mΩ -50 0 50 100 150 100 10 Tch = 150°C 75°C 25°C –55°C 1 0.1 Pulsed VDS = 10 V 0.01 0.01 0.1 1 10 100 Tch - Channel Temperature - °C ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE TO SOURCE VOLTAGE 20 10 Pulsed 8 VGS = 4.5 V 6 4 10 V 2 0 1 10 100 ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ VGS(off) – Gate to Source Cut-off Voltage μPA2825T1S Pulsed 15 10 ID = 24 A 5 0 0 5 10 15 20 VGS - Gate to Source Voltage - V CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE DRAIN TO SOURCE ON-STATE RESISTANCE vs. 10000 12 Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ CHANNEL TEMPERATURE VGS = 4.5 V ID = 6 A 10 8 6 4 VGS = 10 V ID = 24 A 2 Pulsed Ciss Coss 1000 Crss VGS = 0 V f = 1.0 MHz 100 0 -50 0 50 100 Tch - Channel Temperature - °C R07DS0755EJ0100 Rev.1.00 May 25, 2012 150 0.1 1 10 100 VDS - Drain to Source Voltage - V Page 4 of 6 μPA2825T1S Chapter Title DYNAMIC INPUT/OUTPUT CHARACTERISTICS 12 20 VDD = 24 V 15 V 6V 10 VGS 8 6 10 4 2 ID = 24 A 0 0 0 20 40 QG - Gate Charge - nC R07DS0755EJ0100 Rev.1.00 May 25, 2012 60 IF - Diode Forward Current - A VDS 1000 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V 30 SOURCE TO DRAIN DIODE FORWARD VOLTAGE VGS = 10 V 100 4.5 V 10 0V 1 0.1 Pulsed 0.01 0 0.4 0.8 1.2 VF(S-D) - Source to Drain Voltage - V Page 5 of 6 μPA2825T1S Chapter Title Package Drawings (Unit: mm) HWSON-8 1, 2, 3 : Source 4 : Gate 5, 6, 7, 8 : Drain Equivalent Circuit Drain Body Diode Gate Gate Protection Diode Remark Source The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. R07DS0755EJ0100 Rev.1.00 May 25, 2012 Page 6 of 6 μ PA2825T1S Data Sheet Revision History Description Rev. Date 1.00 May 25, 2012 Page − Summary First Edition Issued All trademarks and registered trademarks are the property of their respective owners. C-1 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2. 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