DESIGN APPLICATION NOTE --- AN010 SGA-2486 Gain Flatness Compensation Circuit Abstract New SiGe amplifier gain blocks exhibit a combination of wide bandwidth, high gain and IP3 with a low noise figure. This application note describes circuits that have been developed to improve gain flatness over a wide frequency range. Introduction The SGA-2486 (datasheet # EDS-100629) is a high gain, wideband cascadable SiGe gain block. It exhibits a combination of low power, high IP3 and low noise figure. It does however show an expected gain roll-off versus frequency characteristic of about 3 dB between 50 and 2150 MHz. This is easily corrected using the application circuit topology shown in Figure 1 below. Circuit components Lcomp1, Rcomp1, Lcomp2, Rcomp2 determine gain flatness and must also be selected to preserve input/output return loss. The value of Rcomp2 is further constrained by biasing requirements. The circuit below operates with a 5 volt supply and draws 20 mA. It is characterized for the 50 - 2150 MHz frequency range. Design / Performance Summary The circuit layout and performance data are shown on pages 2 and 3. The circuit was constructed on our standard 86 package evaluation board according to the schematic shown in Figure 1. The performance highlights to be noted are : • 16 dB of gain and 1 dB total gain Preliminary variation over the 50-2150 MHz frequency range. • Greater than 17dB input / 20 dB output return loss over the 50-2150 MHz frequency range. • Flat Group Delay characteristic-only about 150 picoseconds added group delay over the 502150 MHz frequency range. • Unconditionally stable over operating range. • Pages 3 & 4 show how to use the circuit below with an output RC network to achieve less than 0.1 dB flatness from 20-1000 MHz or 0.3 dB flatness from 20-2150 MHz. SGA-2486 @ 50-2150 MHz Application Circuit +5V Zc Length (Degrees @ 1000 MHz) 12.3 + Z1 50 - Cd6 0.1 uF Ref. Des. Z2 50 3.3 Z3 50 12.9 Z4 50 13.5 Z5 50 3.3 Z6 50 12.0 Cd5 Cd4 .01uF 1000pF Rcomp2 120W Lcomp2 15nH SGA-2486 CC1 CC2 .01uF .01uF RF input Z3 Z2 Z1 Z4 Z5 Z6 RF Output Lcomp1 15nH Notes: 1.0 See Parts List and layout on page 2. 2.0 All 0603 capacitors have an implied series inductance of approx. 0.75 nanohenries. 3.0 Phase shift functional block elements between components are calculated based on wavelength of 1000 MHz signal on FR4 board material with dielectric constant of 4.1 and microstrip width and height dimensions of W=.061 inch and h=.030 inch. Rcomp1 120W + Cd1 1000 pF - Cd3 0.1 uF Cd2 .01 uF Figure 1 The information provided herein is believed to be reliable at press time. 5)0' assumes no responsibility for inaccuracies or omissions. 5)0' assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. 5)0' does not authorize or warrant any 5)0' product for use in life-support devices and/or systems. Copyright 2002 5)0'. All worldwide rights reserved. 522 Almanor Ave., Sunnyvale, CA 94085 Phone: (800) SMI-MMIC 1 http://www.5)0'.com EAN-101374 Rev B DESIGN APPLICATION NOTE --- AN010 SGA-2486 Gain Flatness Compensation Circuit Application Circuit Board Layout, for 50-2150 Mhz (Reference Figure 1 Schematic.) Cd3 Parts List REF. DESIG. DESCRIPTION CC1,2 CD1,4 VALUE PART NUMBER / STYLE CAP. .01 uF 0603 package (ROHM MCH 18) CAP. 1000 pF 0603 package (ROHM MCH 18) CD2,5 CAP. .01 uF 0603 package (ROHM MCH 18) CD3,6 CAP. (POLAR) 0.1 uF "A" size package, 35V Tantulum RCOMP1,2 RES. 120 Ohms 0603 package LCOMP1,2 IND. 15 nH TOKO LL1608-FH15NJ (0603) +Vs Cd6 Cd2 Cd5 Cd1 Cd4 Rcomp2 Rcomp1 SGA2486 Lcomp1 CC1 Lcomp2 CC2 Plot of P1dB, IP3 , Noise Figure and IP2 vs. Frequency 50 ECB-100330 86 Eval Board NF (dB) Level (dBm) 40 Notes: Board Material: FR4, e=4.1 Dielectric Thickness = 30 mils Metal Thickness: 1Oz. (1.4 mil) Backside fully plated IP2 (high tone) IP3 2 10 P1dB 1 0 500 S21 vs. Freq - Compensated vs. Uncompensated Return Loss (dB) Gain (dB) 19 18 Compensated 16 15 2050 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 2000 0 2500 Uncompensated Compensated 50 2550 550 1050 1550 2050 2550 Frequency (MHz) S22 vs. Freq - Compensated vs. Uncompensated Group Delay vs. Frequency of Compensated Circuit 0 700 -5 600 Return Loss (dB) Group Delay (psec) 1500 S11 vs. Freq - Compensated vs. Uncompensated Uncompensated 1050 1550 Frequency (MHz) 1000 Frequency (MHz) 21 550 3 20 Figure 2 50 4 30 0 17 5 Noise Figure (dB) OUT IN 20 Preliminary 500 Group Delay of Compensated SGA2486 400 300 200 Delay of Microstrip length equivalent to Apps. Board length 100 -10 Uncompensated -15 -20 -25 -30 Compensated -35 0 -40 50 550 1050 1550 Frequency (MHz) 522 Almanor Ave., Sunnyvale, CA 94085 2050 2550 50 Phone: (800) SMI-MMIC 2 550 1050 1550 Frequency (MHz) 2050 2550 http://www.5)0'.com EAN-101374 Rev B DESIGN APPLICATION NOTE --- AN010 SGA-2486 Gain Flatness Compensation Circuit Gain Dev. (Uncompensated) 1.5 Gain Deviation from Average (dB) Fine Tuning of Gain Flatness Figure 3 shows how to add a pi-pad to the output of the previously shown SGA2486 application circuit to obtain finer gain flatness. The resistor values of the pad are selected for a 50 Ohm match in either direction with a shunt capacitor across the bridging resistor. The d.c. attenuation value should be initially selected to be slightly larger than the gain difference between the frequency range endpoints. It is then iterated as necessary. The value of the shunt capacitor is then adjusted in a simulator to obtain maximum flatness over the frequency range. In the case of the 20-1000 MHz frequency range, a flatness of less than 0.1 dB was obtained. Over the 20-2150 MHz band, the flatness was reduced only to slightly less than 0.3 dB, mainly because the slope of the gain/ frequency response lessened between about 1000 and 1700 MHz, causing a response peak. Gain Deviation (from Average Value) from 20 - 2450 Mhz 2 1 0.5 0 Preliminary Gain Dev. (Compensated) -0.5 -1 -1.5 -2 0 500 1000 1500 Frequency (MHz) 2000 2500 Gain Deviation (from Average Value) from 20-1000 MHz 2 Gain Deviation from Average (dB) Gain Flatness Performance (Circuit in Figure 1.) The three graphs in the right hand column show gain deviation with frequency derived by taking the difference between the gain at a particular frequency and the average gain calculated over the indicated frequency ranges. 1.5 1 Gain Dev. (Uncompensated) 0.5 0 Gain Dev. (Compensated) -0.5 -1 -1.5 -2 0 Plot of Stability Parameters ( K & Delta) vs. Frequency for Compensated SGA2486 2 1 200 400 600 Frequency (MHz) 800 1000 Gain Deviation (from Average Value) from 950-2150 Mhz 0.8 1.6 0.6 Delta 1.4 0.4 K 1.2 Delta Value K value 1.8 0.2 1 0 0.0 0.8 1.6 2.4 3.2 Frequency (GHz) 4.0 Gain Deviation from Average (dB) 2 1.5 1 Gain Dev. (Uncompensated) 0.5 0 Gain Dev. (Compensated) -0.5 -1 -1.5 -2 4.8 950 1150 1350 1550 1750 1950 2150 Frequency (MHz) (Note: For unconditional stability K>1, Delta<1) 522 Almanor Ave., Sunnyvale, CA 94085 Phone: (800) SMI-MMIC 3 http://www.5)0'.com EAN-101374 Rev B DESIGN APPLICATION NOTE --- AN010 SGA-2486 Gain Flatness Compensation Circuit Schematic Diagram of SGA2486 Applications Circuit from Figure 1 combined with pi-pad R/C network at output.Tables of component values for pi-pad at two frequency ranges are included below, along with expected performance data for each configuration. Ref. Des. Zc Length (Degrees @ 1000 MHz) Z1 50 12.3 Z2 50 3.3 Z3 50 12.9 Z4 50 13.5 Z5 50 3.3 Z6 50 12.0 Output pi-pad network enlarged for clarity. See corresponding tables of component values below. Preliminary +5V + - Cd6 0.1 uF CA1 Rcomp2 Cd5 Cd4 .01uF 1000pF 120W Lcomp2 15nH SGA-2486 CC1 CC2 .01uF RF input .01uF Z1 Z3 Z2 Z6 Z5 Z4 RF output RA2 Lcomp1 RA1 15nH RA3 Rcomp1 120W + Cd1 1000 pF - Cd3 0.1 uF Cd2 .01 uF Figure 3 Table of Component Values for f = 20-2150 MHz (Use 0603 style resistors and capacitors) (Use 0603 style resistors and capacitors) 6.8 Freq Range (MHz) Gain (dB) 39 -1.2 20-1000 15.7 Plot of Gain & Input / Output Return Loss vs. Frequency (using pi-pad components above) 16 15.8 Gain (dB) 750 Low Freq. Attenuation (dB) S 21(dB) 14.5 -10 14.1 S22(dB) 15.4 -30 S11(dB) 15.2 -40 15 -50 20 220 420 620 820 Frequency (MHz) 522 Almanor Ave., Sunnyvale, CA 94085 1020 330 0 -20 15.6 RA1 (Ohms) RA2 (Ohms) RA3 (Ohms) 1220 Gain (dB) 750 CA1 (pF) Return Loss (dB) RA1 (Ohms) RA2 (Ohms) RA3 (Ohms) 15 330 CA1 (pF) Low Freq. Attenuation (dB) Freq Range (MHz) Gain (dB) 8.2 -2.6 20-2150 14.2 Plot of Gain & Input / Output Return Loss vs. Frequency (using pi-pad components above) S21(dB) 0 -10 13.7 S22(dB) S11(dB) 13.3 12.9 -20 -30 -40 12.5 Return Loss (dB) Table of Component Values for f =20-1000 MHz. -50 20 Phone: (800) SMI-MMIC 4 260 500 740 980 1220 1460 1700 1940 2180 Frequency (MHz) http://www.sirenza.com EAN-101374 Rev B DESIGN APPLICATION NOTE --- AN010 SGA-2486 Gain Flatness Compensation Circuit Conclusion This application note has shown a simple solution using passive components to improve the gain flatness of the SGA-2486 SiGe cascadable gain block. This device, with low cost, wideband performance, low power dissipation and high gain is an excellent choice for use in many applications. For applications requiring flat gain over a specified frequency range the circuit shown in Figure 1 improves gain flatness significantly. The addition of the simple inductor/resistor matchingPreliminary networks to the normal device biasing topolology allows the gain flatness to be held to 1dB over a broad frequency range (20 MHz to 2150 MHz). Adding an optional pi-pad to the output ( shown in Figure 3) improves gain flatness to +/- 0.2 dB. Systems that require very flat gain from DC to 1000 MHz (such as CATV), can achieve +/- 0.1 dB gain flatness using this circuit. We hope that this application note and the products offered by 5)0' will assist you in achieving your design goals. 522 Almanor Ave., Sunnyvale, CA 94085 Phone: (800) SMI-MMIC 5 http://www.5)0'.com EAN-101374 Rev B