BH3868BFS Audio ICs Audio sound processor with ∗ R BH3868BFS BH3868BFS is a Audio sound processor IC developed for TV. This IC is built-in volume, balance, tone, surround, BBE 2 processor and AGC. This IC can be easily controlled by tow-wire serial control (I C BUS). ∗ BBE is a registered trade mark of BBE Sound Inc. Note : I2C BUS is a registered trade mark of Philips. !Applications Suitable for TV, TV-radio, PC-TV, mini-component and car audio system, etc. !Features 1) Volume (main volume), balance (right/left), tone (bass and treble), surround (mode and effect), BBE processor (effect) 2 can be controlled by I C-BUS. 2) Volume is VCA with low distortion rate and low noise and can restrain the step noise. 3) The reference voltage source is stable, only a few external devices are required because I/O buffer is contained, and the package is suitable for space-saving design for SSOP-A32. 4) Sound spread can be controlled by the matrix surround and effect adjustment. 5) The built-in AGC circuit can absorb the volume difference between input sources. 6) The contained BBE processor, which reproduce an original sound, controls the effect. !Absolute maximum ratings (Ta=25°C) Parameter Symbol Limits Unit VCC 10.0 V Impressed voltage Power dissipation 850∗ Pd mW Operating temperature range Topr −40 to +85 °C Storage temperature range Tstg −55 to +150 °C ∗ When mounted on a glass epoxy board 70mm × 70mm × 1.6mm. Reduced by 6.8mW for each increase in Ta of 1°C over 25°C. !Recommended operating conditions (Ta=25°C) Parameter Power supply voltage Symbol Min. Typ. Max. Unit VCC 7.0 − 9.5 V 1/27 BH3868BFS Audio ICs OUT1 21 TRE1 22 BAS1 23 BTREB1 24 BTREA1 25 BBASB1 26 BBASA1 27 IN1 28 PS2 29 PS1 30 AGCADJ 31 FILTER 32 VOL 20 TONE VC1 16 CHIP 15 VCC 14 TC 13 VC2 12 OUT2 11 TRE2 10 BAS2 9 BTREB2 8 BTREA2 7 BBASB2 6 BBASA2 5 IN2 4 SOUT 3 LS2 2 LS1 1 GND R−S 19 LOGIC CONTROL BC Vref 18 VOL SDA TONE 17 BBE VOL BIAS AGC VOL L−R L+R BBE PHASE SHIFT LPF AMP L+S SCL VCC !Block diagram 2/27 BH3868BFS Audio ICs !Pin descriptions Pin No. Pin name Function 1 GND Ground terminal 2 LS1 ALC detector terminal at suppression side 3 LS2 ALC detector terminal at amplification side 4 SOUT Surround signal output terminal 5 IN2 2ch sound signal input terminal 6 BBASA2 2chBBE contour frequency setting terminal 7 BBASB2 2chBBE contour frequency setting terminal 8 BTREA2 2chBBE process frequency setting terminal 9 BTREB2 2chBBE process frequency setting terminal 10 BAS2 2ch bass fc setting terminal 11 TRE2 2ch treble fc setting terminal 12 OUT2 2ch sound signal output terminal 13 VC2 2ch volume control terminal 14 TC Treble control terminal 15 VCC Power supply terminal 16 CHIP Chip select terminal 17 SCL I2C clock input terminal 18 SDA I2C data input terminal 19 BC Bass control terminal 20 VC1 1ch volume control terminal 21 OUT1 1ch sound signal output terminal 22 TRE1 1ch treble fc setting terminal 23 BAS1 1ch bass fc setting terminal 24 BTREB1 1chBBE process frequency setting terminal 25 BTREA1 1chBBE process frequency setting terminal 26 BBASB1 1chBBE contour frequency setting terminal 27 BBASA1 1chBBE contour frequency setting terminal 28 IN1 1ch sound signal input terminal 29 PS1 1st phase shift setting terminal 30 PS2 2nd phase shift setting terminal 31 AGCADJ 32 FILTER AGC suppression level setting terminal Filter terminal 3/27 BH3868BFS Audio ICs !Input output circuits The terminal voltage shall be on when the data 0V volume=minimum, tone=flat, BBE=OFF, surround=OFF and AGC=OFF after the power supply Vcc=9.0(V) has been turned on, and any external devices shall comply with the measurement circuit diagram. Pin. No Pin name Terminal voltage Equivalent circuit Description VCC 2 LS1 0V 430 Terminal to set a time constant at a side for suppressing a signal level of AGC. 20k Terminal to set a time constant at a side for amplifying a signal level of AGC. 2pin GND VCC 3 LS2 0V 3pin GND VCC 4 SOUT 4.5V Terminal for output of surround and pseudo stereo and to set a frequency characteristic. 4pin 10k GND VCC 5 28 IN2 IN1 4.5V Terminal for sound signal input. 5pin 28pin 30k GND 4/27 BH3868BFS Audio ICs Pin. No Pin name Terminal voltage Equivalent circuit Description VCC 6 27 BBASA2 BBASA1 4.5V Terminal to set a contour frequency of BBE. 6pin 27pin 21.5k GND VCC 200 7 26 BBASB2 BBASB1 4.5V Terminal to set a contour frequency of BBE. 7pin 26pin 200 GND VCC 8 25 BTREA2 BTREA1 4.5V Terminal to set a process frequency of BBE. 8pin 25pin 21.5k GND VCC 200 9 24 BTREB2 BTREB1 4.5V Terminal to set a process frequency of BBE. 9pin 24pin 200 GND 5/27 BH3868BFS Audio ICs Pin. No Pin name Terminal voltage Equivalent circuit Description VCC 10 23 BAS2 BAS1 4.5V Terminal to the cutoff frequency of bass tone control. 10pin 23pin GND VCC 11 22 TRE2 TRE1 4.5V 11pin 22pin 30k Terminal to the cutoff frequency of treble tone control. GND VCC 200 12 21 OUT2 OUT1 4.5V Terminal for sound signal output. 12pin 21pin 200 GND VCC 13 20 VC2 VC1 0V Terminal equipped with an external circuit to prevent a shock sound upon volume switching. 13pin 20pin 30kΩ D/A GND 6/27 BH3868BFS Audio ICs Pin. No Pin name Terminal voltage Equivalent circuit Description VCC 14 19 TC BC 1.94V Terminal equipped with an external circuit to prevent a shock sound upon tone switching. 14pin 19pin 30kΩ D/A GND VCC 250k 16 CHIP − Chip select terminal. 16pin GND VCC 17 SCL − Clock input terminal for I2C BUS controller. 17pin GND VCC 18 SDA − Data input terminal for I2C BUS controller. 18pin 50 GND 7/27 BH3868BFS Audio ICs Pin. No Pin name Terminal voltage Equivalent circuit Description VCC 29 PS1 4.5V Terminal to set the 1st phase shift. 29pin 18k 18k 10k GND VCC 30 PS2 4.5V Terminal to set the 2nd phase shift. 30pin 18k 18k GND VCC 20k 31 AGCADJ − 20k Terminal to set the cut levle of AGC. 31pin GND VCC 50k 32 FILTER 4.5V Filter terminal. 32pin 50k GND 8/27 BH3868BFS Audio ICs !Electrical characteristics (unless otherwise noted, Ta=25°C, VCC=9V, f=1kHz, BW=20kHz, VOL=MAX, surround = OFF, TONE=FLAT, AGC=OFF, BBE=OFF, AGCADJ=3.45V, RR=600Ω, RL=10kΩ) Parameter Symbol Min. Typ. Max. Unit IQ − 30 45 mA Maximum input VIM 2.8 3.0 − Vrms THD=1%, VOL=−20dB (ATT) Maximum output VOM 2.2 2.5 − Vrms THD=1% Current upon no signal Voltage gain Maximum attenuation Cross-talk Bass control range Conditions No signal GV −1.5 0 1.5 dB VIN=1Vrms ATT 90 110 − dB VIN=1Vrms VCT 70 80 − dB VIN=1Vrms VBMax. 12 15 18 dB 100Hz, VIN=100mVrms VBMin. −18 −15 −12 dB 100Hz, VIN=100mVrms VTMax. 12 15 18 dB 10kHz, VIN=100mVrms VTMin. −18 −15 −12 dB 10kHz, VIN=100mVrms GSR 7 10 13 dB VIN=1Vrms BBE Contour control range GPS 9 10 11 dB 100Hz, VIN=100mVrms BBE Process control range GPH 9 10 11 dB 10kHz, VIN=100mVrms AGC I/O level 1 AGC1 0.7 1.0 1.4 mVrms VIN=1.0mVrms AGC I/O level 2 AGC2 50 75 100 mVrms VIN=50mVrms AGC I/O level 3 AGC3 150 200 250 mVrms VIN=200mVrms AGC I/O level 4 AGC4 200 280 360 mVrms VIN=1.0Vrms Total harmonic distortion THD − 0.01 0.1 % Output noise voltage VNO1 − 48 75 µVrms No signal, VOL=Max. Rg=0 ∗ Residual output noise voltage VMNO − 2.5 10 µVrms No signal, VOL=−∞, Rg=0 ∗ Channel balance GCA −1.5 0 1.5 dB Measured based on CH1. Input impedance RIN 20 30 40 kΩ f=1kHz Treble control range Surround effect control range VO=0.5Vrms, BPF=400Hz~30kHz ROUT − − 10 Ω f=1kHz Ripple rejection RR 40 − − V f=100Hz, VRR=100mVrms Input voltage "H" VIH 3 5 5.5 V SCL, SDA Input voltage "L" VIL −0.5 0 1.5 V SCL, SDA Output impedance ∗ Measured by VP-9690A of Matsushita (detection of mean value and indication of root-mean-value). Radiation resistance is not included in the design. The I/O phase of signal is the same. 9/27 BH3868BFS Audio ICs !Control signal specification (1) Electrical specifications and timing for bus lines and I/O stages SDA tBUF tLOW tR tF tSP tHD : STA SCL tHD : STA P tHD : DAT tHIGH tSU : DAT tSU : STO tSU : STA S Sr P Fig.1 Definition of timing on the I2C BUS 2 Table B Characteristics of the SDA and SCL bus lines for I C BUS devices Parameter Symbol Min. Max. Unit SCL clock fequency fSCL 0 100 kHz Bus free time between a STOP and START condition tBUF 4.7 − µs tHD ; STA 4.0 − µs LOW period of the SCL clock tLOW 4.7 − µs HIGH period of the SCL clock tHIGH 4.0 − µs tSU ; STA 4.7 − µs Data hold time tHD ; DAT 0∗ − µs Data set-up time tSU ; DAT 250 − ns Rise time of both SDA and SCL signals tR − 1000 ns Fall time of both SDA and SCL signals tF − 300 ns tSU ; STO 4.0 − µs Cb − 400 pF Hold time (repeated) START condition. After this period, the first clock pulse is generated Set-up time for a repeated START condition Set-up time for STOP condition Capacitive load for each bus line All values referred to VIH min. and VIL max. Levels (see Table C). ∗ A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH min. of the SCL signal) in order to bridge the undefined region of the falling edge of SCL. 10/27 BH3868BFS Audio ICs 2 Table C Characteristics of the SDA and SCL I/O stages for I C BUS devices Parameter Symbol Min. Max. Unit VIL −0.5 1.5 V (−0.5) (0.3 VDD) 3.0 ∗1 (0.7 VDD) (∗1) n/a n/a (n/a) (n/a) tSP n/a n/a ns at 3mA sink current VOL1 0 0.4 V at 6mA sink current (VOL2) (n/a) (n/a) tOF − 250∗2 (n/a) (n/a) LOW level input voltage : fixed input levels VDD-related input levels HIGH level input voltage : fixed input levels VIH VDD-related input levels V Hysteresis of Schmitt trigger inputs : Fixed input levels Vhys VDD-related input levels Pulse width of spikes which must be suppressed by the input filter. V LOW level output voltage (open drain or open collector) : Output fall time from VIH min. to VIL max. with a bus capacitance from 10pF to 400pF : with up to 3mA sink current at VOL1 with up to 6mA sink current at VOL2 ns Input current each I/O pin with an input voltage between 0.4V and 0.9 VDDmax. II −10 10 µA Capacitance for each I/O pin. CI − 10 pF n/a = not applicable ∗1 maximum VIH=VDDmax. + 0.5V ∗2 Cb=capacitance of one bus line in pF. Note that the maximum tF for the SDA and SCL bus lines quoted in Table B (300ns) is longer than the specified maximum tOF for the output stages (250ns). This allows series protection resistors (RS) to be connected between the SDA/SCL pins and the SDA/SCL bus lines as shown in Fig.1 without exceeding the maximum specified tF. The above-mentioned characteristics are theoretical values based on IC design and the delivery inspection does not guarantee anything. If any trouble is made, we will take necessary arrangements and actions in our faith. 11/27 BH3868BFS Audio ICs 2 (2) I C BUS format MSB LSB Slave Address S 1bit 8bit •S • Slave Address •A • Select Address • Data •P MSB LSB MSB LSB A Select Address A Data A P 1bit 8bit 1bit 8bit 1bit 1bit =Start condition (Recognition of start bit) =Recognition of IC. The high order 7 bits are optional. The least significant bit is “L” for writing. =Acknowledge bit (Recognition of acknowledgement) =Selection of 1ch volume, 2ch volume, BBE effect, bass+BBE, treble+MUTE and AGC+matrix surround. =Data on volume and tone. =Stop condition (Recognition of stop bit) Slave Address of BH3868BFS Fixing 16pin to VCC MSB LSB D7 D6 D5 D4 D3 D2 D1 R/W 1 0 0 0 0 0 1 0 Making 16pin OPEN MSB LSB D7 D6 D5 D4 D3 D2 D1 R/W 1 0 0 0 0 0 0 0 (3) Setting of Select Address Parameter MSB LSB D7 D6 D5 D4 D3 D2 D1 D0 0 1ch Volume 0 0 0 0 0 0 0 0 1 2ch Volume 0 0 0 0 0 0 0 1 2 BBE Processor 0 0 0 0 0 0 1 0 3 BBE, Bass 0 0 0 0 0 0 1 1 4 MUTE, Treble 0 0 0 0 0 1 0 0 5 AGC, Surround 0 0 0 0 0 1 0 1 Upon transferring consecutive data, the select address circulates because of the automatic increment function as follows: 0→1→2→3→4→5 The circulation starts from the select address specified first. It doesn't patrol from selection address 5 to selection address 0. 12/27 BH3868BFS Audio ICs (4) Data Configuration MSB Parameter 0 1ch Volume 1 2ch Volume 2 BBE Processor 3 BBE, Bass 4 MUTE, Treble 5 AGC, Surround D7 LSB D6 D5 D4 D3 D2 D1 D0 1ch Volume 2ch Volume Process Contour BBE Bass MUTE Treble AGC SON SSTE SMON LOOP Volume : all H : all L : ATT 0dB ATT -∞dB BBE Processor : all H : all L : Max. Min. Bass / Treble : all H : all L : Max. Min. Surround Effect : all H : all L : Max. Min. BBE : AGC : MUTE : LOOP : SSTE : SMON : SON : H : ON H : ON H : ON H : ON H : ON H : ON H : ON L : OFF L : OFF(AGC : Auto Gain Control) L : OFF L : OFF(LOOP : surround effect enhanceer) L : OFF(SSTE : Surround STEreo) L : OFF(SMON : Surround MONoral) L : OFF(SON : Surround ON) Surround Effect Note : It is advisable to apply MUTE upon switching the mode and gain of BBE and SURROUND. 13/27 BH3868BFS Audio ICs Volume Gain setting list Gain (dB) Hex. Notation D7 D6 D5 D4 D3 D2 D1 D0 0 FFH 1 1 1 1 1 1 1 1 −1 EAH 1 1 1 0 1 0 1 0 −2 DFH 1 1 0 1 1 1 1 1 −3 D6H 1 1 0 1 0 1 1 0 −4 CFH 1 1 0 0 1 1 1 1 −5 C8H 1 1 0 0 1 0 0 0 −6 C2H 1 1 0 0 0 0 1 0 1 0 0 1 −7 B9H 1 0 1 1 −8 B8H 1 0 1 1 1 0 0 0 −9 B3H 1 0 1 1 0 0 1 1 −10 AEH 1 0 1 0 1 1 1 0 −11 AAH 1 0 1 0 1 0 1 0 −12 A6H 1 0 1 0 0 1 1 0 −13 A2H 1 0 1 0 0 0 1 0 −14 9EH 1 0 0 1 1 1 1 0 −15 9AH 1 0 0 1 1 0 1 0 −16 96H 1 0 0 1 0 1 1 0 −17 93H 1 0 0 1 0 0 1 1 −18 90H 1 0 0 1 0 0 0 0 −19 8CH 1 0 0 0 1 1 0 0 −20 89H 1 0 0 0 1 0 0 1 −22 83H 1 0 0 0 0 0 1 1 −24 7DH 0 1 1 1 1 1 0 1 −26 78H 0 1 1 1 1 0 0 0 −28 72H 0 1 1 1 0 0 1 0 −30 6DH 0 1 1 0 1 1 0 1 −32 68H 0 1 1 0 1 0 0 0 −34 64H 0 1 1 0 0 1 0 0 −36 5FH 0 1 0 1 1 1 1 1 −38 5BH 0 1 0 1 1 0 1 1 −40 57H 0 1 0 1 0 1 1 1 −42 52H 0 1 0 1 0 0 1 0 −44 4FH 0 1 0 0 1 1 1 1 −46 4BH 0 1 0 0 1 0 1 1 −48 47H 0 1 0 0 0 1 1 1 −50 42H 0 1 0 0 0 0 1 0 −52 40H 0 1 0 0 0 0 0 0 −54 3DH 0 0 1 1 1 1 0 1 −56 3AH 0 0 1 1 1 0 1 0 −58 37H 0 0 1 1 0 1 1 1 −60 34H 0 0 1 1 0 1 0 0 14/27 BH3868BFS Audio ICs Gain (dB) Hex. Notation D7 D6 D5 D4 D3 D2 D1 D0 −62 32H 0 0 1 1 0 0 1 0 −64 2FH 0 0 1 0 1 1 1 1 −66 2DH 0 0 1 0 1 1 0 1 −68 2AH 0 0 1 0 1 0 1 0 −70 28H 0 0 1 0 1 0 0 0 −72 26H 0 0 1 0 0 1 1 0 −74 24H 0 0 1 0 0 1 0 0 −76 22H 0 0 1 0 0 0 1 0 −78 20H 0 0 1 0 0 0 0 0 −80 1EH 0 0 0 1 1 1 1 0 −82 1DH 0 0 0 1 1 1 0 1 −84 1BH 0 0 0 1 1 0 1 1 −∞ 00H 0 0 0 0 0 0 0 0 Treble / Bass setting list Treble Gain Gain (dB) Hex. Notation D6 D5 D4 D3 D2 D1 D0 +15 7FH 1 1 1 1 1 1 1 +15 3FH 0 1 1 1 1 1 1 +14 36H 0 1 1 0 1 1 0 +12 32H 0 1 1 0 0 1 0 +10 2FH 0 1 0 1 1 1 1 +8 2DH 0 1 0 1 1 0 1 +6 2BH 0 1 0 1 0 1 1 +4 29H 0 1 0 1 0 0 1 +2 26H 0 1 0 0 1 1 0 0 20H 0 1 0 0 0 0 0 −2 1AH 0 0 1 1 0 1 0 −4 17H 0 0 1 0 1 1 1 −6 15H 0 0 1 0 1 0 1 −8 13H 0 0 1 0 0 1 1 −10 11H 0 0 1 0 0 0 1 −12 0EH 0 0 0 1 1 1 0 −14 0AH 0 0 0 1 0 1 0 −15 00H 0 0 0 0 0 0 0 15/27 BH3868BFS Audio ICs Bass Gain Gain (dB) Hex. Notation D6 D5 D4 D3 D2 D1 D0 +15 7FH 1 1 1 1 1 1 1 +15 3FH 0 1 1 1 1 1 1 +14 36H 0 1 1 0 1 1 0 +12 32H 0 1 1 0 0 1 0 +10 2FH 0 1 0 1 1 1 1 +8 2DH 0 1 0 1 1 0 1 +6 2BH 0 1 0 1 0 1 1 +4 29H 0 1 0 1 0 0 1 +2 26H 0 1 0 0 1 1 0 0 20H 0 1 0 0 0 0 0 −2 1AH 0 0 1 1 0 1 0 1 1 −4 17H 0 0 1 0 1 −6 15H 0 0 1 0 1 0 1 −8 13H 0 0 1 0 0 1 1 −10 11H 0 0 1 0 0 0 1 −12 0EH 0 0 0 1 1 1 0 −14 0AH 0 0 0 1 0 1 0 −15 00H 0 0 0 0 0 0 0 Hex. Notation D7 D6 D5 D4 10.0 FH 1 1 1 1 9.0 EH 1 1 1 0 8.0 DH 1 1 0 1 7.0 CH 1 1 0 0 6.0 BH 1 0 1 1 5.5 AH 1 0 1 0 5.0 9H 1 0 0 1 4.5 8H 1 0 0 0 4.0 7H 0 1 1 1 3.5 6H 0 1 1 0 3.0 5H 0 1 0 1 2.5 4H 0 1 0 0 2.0 3H 0 0 1 1 1.5 2H 0 0 1 0 1.0 1H 0 0 0 1 0.5 0H 0 0 0 0 BBE Gain Process Gain (dB) 16/27 BH3868BFS Audio ICs Contour Gain (dB) Hex Notation D3 D2 D1 D0 10.0 FH 1 1 1 1 9.0 EH 1 1 1 0 8.0 DH 1 1 0 1 7.0 CH 1 1 0 0 6.0 BH 1 0 1 1 5.5 AH 1 0 1 0 5.0 9H 1 0 0 1 4.5 8H 1 0 0 0 4.0 7H 0 1 1 1 3.5 6H 0 1 1 0 3.0 5H 0 1 0 1 2.5 4H 0 1 0 0 2.0 3H 0 0 1 1 1.5 2H 0 0 1 0 1.0 1H 0 0 0 1 0.5 0H 0 0 0 0 Surround Gain setting list Gain (dB) Hex. Notation D2 D1 D0 10 7H 1 1 1 9 6H 1 1 0 8 5H 1 0 1 7 4H 1 0 0 6 3H 0 1 1 5 2H 0 1 0 4 1H 0 0 1 3 0H 0 0 0 Reference value : The setting table is a reference value persistently and the sctual use condition sometimes changes the gain of volume, the tone, surround. In case of data setting, we request confirmation. (5) Notes on Data Transfer This IC is equipped with the automatic increment function to improve the rate of data transfer. In addition to the data format shown in the under-mentioned Basic Format, the other data format Automatic Increment is also available for the data transfer. 1) Basic format MSB S LSB Slave Address MSB A LSB Select Address MSB A LSB Data A P 17/27 BH3868BFS Audio ICs 2) Automatic Increment (The Select Address is incremented (by one) according to the number of data.) MSB S LSB Slave Address MSB A LSB Select Address MSB A LSB Data1, Data2, · · · · · , DataN A P A P Example : <1> Data 1 shall be set as the data of the address specified by the Select Address. <2> Data 2 shall be set as the data of the address specified by the Select Address +1. <3> Data N shall be set as the data of the address specified by the Select Address +N−1. 3) Configuration Unavailable for Transfer (In this case, the Select Address 1 only is set.) MSB S LSB Slave Address MSB A LSB Select Address MSB A LSB Data MSB A LSB Select Address 2 MSB A LSB Data Note : If any data is sent as the Select Address 2 immediately after the Data, such data is recognized as the Data, not the Select Address 2. !AGC (1) Level Setting The AGC suppression level can be set by the voltage of the AGDADJ terminal (31pin). Assuming that the suppression level is GC (mVrms) and the AGCADJ voltage is ADJ (V), setting can be expressed as follows: GC=−286×ADJ+1186 The under-mentioned table shows a guideline of setting. Suppression Level (mVrms) AGCADJ Terminal Voltage (V) 100 3.8 200 3.45 300 3.1 400 2.75 The level specified by the electrical characteristic is AGCADJ=3.45 (V) and the suppression level is approximately 200 (mVrms). Use the suppression level in a rage from 100 (mVrms) to 400 (mVrms). The under-mentioned chart shows the characteristic when the suppression level is set to 100 (mVrms), 200 (mVrms), 300 (mVrms) and 400 (mVrms). 10 OUTPUT (Vrms) 1 VOLUME=MAX. TONE=FLAT BBE=OFF SURROUND=OFF AGC=ON f=1kHz 0.1 0.01 0.001 0.001 0.01 0.1 1 10 INPUT (Vrms) Fig.2 AGC characteristics 18/27 BH3868BFS Audio ICs (2) Setting of Attack Time and Release Time In this IC, the Attack Time and Release Time can be set in the boost side and cut side of AGC separately. 430 20k RR1 2 3 LS1 C1 RR2 LS2 + 1µ RL1 C2 1Meg 1µ Detector circuit of suppression Attack Time Recovery Time + RL2 1Meg Detector circuit of amplification : RR1 × C1 : RL1 × C1 Attack Time Recovery Time : RR2 × C2 : RL2 × C2 The Attack Time and Recovery Time shall be set by a resistor in IC and external capacitor and resistor. The internal resistance is RR1=430Ω and RR2=20KΩ (Typ). If the constant of capacitor C2 of LS2 decreases, an amplification starting point is shifted in a direction of smaller input voltage. Moreover, the distortion rate also changes and becomes worse. If the constant of capacitor C1 of LS1C1 decreases, the distortion rate becomes worse. If the resistance value of RL1 increases, the suppression is reduced. !SURROUND (1) Setting of Frequency Characteristic This IC has an output terminal (4pin) for the surround signal. The surround characteristic can be varied by adding an appropriate filter to this terminal. An example of characteristic that low-pass filter has been set is shown below : + − SOUT 10k + 4 R1 f1 = 1 2πCR2 f2 = 1 2πC(R1 + R2) − 0.0047µ 4.7k C R2 A1 = R2 R1 + R2 An amplifier to define the sound effect. A2 = 1 Gain [dB] A2 A1 f2 f1 Frequency [Hz] 19/27 BH3868BFS Audio ICs (2) Setting of Phase Shifter This IC contains two stages of phase shifters. If none of two stages of phase shifters are not used, the pseudo-stereo function is also unavailable. If only one of these phase shifters is used, the normal of pseudo stereo may be spoiled. R3 18k R3 18k Resistance in IC is 18kΩ (Typ.). R2 18k R2 − 18k + R1 + 18k R1 18k 29 C1 φ = −2tan−1 (2πfR1C1) − 30 C1 0.1µ 0.1µ (3) Surround and Pseudo-Stereo Operation ∆t1∆t2 : Time delayed by a phase shifter P1 P2 : Attenuation made by a phase shifter E : Surround effect 1) Surround + Lch 28 L−R Rch ∆ t1 × P1 ∆ t2 × P2 ×E Phase shifter Phase shifter Effect control + + 21 LOUT = L + ∆ t1 ∆ t2P1P2 (L−R) E 12 ROUT = R − ∆ t1 ∆ t2P1P2 (L−R) E LPF 5 + + − 2) Pseudo stereo + Lch 28 2 (L+R) B, P, F ∆ t1 × P1 ∆ t2 × P2 ×E Phase shifter Phase shifter Effect control + + 21 LOUT = L + ∆ t1 ∆ t2P1P2 (L+R) E 12 ROUT = R − ∆ t1 ∆ t2P1P2 (L+R) E LPF Configured externally Rch 5 + + − The above-mentioned figures show the block diagram of surround and pseudo stereo ICs. The characteristics of surround and pseudo stereo can be varied by changing the effect. Moreover, the number of states of phase shifters can be increased by turning on a switch of loop. However, an operation becomes unstable if the gain of effect is increased while the switch of loop remains turning on. Therefore, the effect should be approximately 6 dB. Upon switching the surround and pseudo stereo to each other, be sure to turn on a switch at the stereo surround side of SSTE to prevent a shock sound. 20/27 BH3868BFS Audio ICs !BBE This IC is equipped with BBE to achieve the clear sound. The characteristic can be changed by an external constant. If any constant other than recommendable ones is used, please ask BBE for confirmation. Frequency setting fC1 = 1 1 = 2π × 21.5k × C1 2π × 21.5k × 0.033µ fC2 = 1 1 = 2π × 21.5k × C2 2π × 21.5k × 0.0033µ fC3 = 1 1 = 2π × 21.5k × C3 2π × 56.2k × 47p 224Hz 2.24kHz 60.3kHz C1=Capacity between 6pin−7pin, and 27pin−26pin. C2=Capacity between 8pin−9pin, and 25pin−24pin. Gain 3dB fC1 fC2 fC3 Freq. fC3 is fixed at the inside. !Tone control Setting of bass frequency fC = 1 2π × 30k × C (Hz) + − Gain 30k 23pin 10pin C 3dB Gain fC Freq. Equivalent Circuit 21/27 BH3868BFS Audio ICs Setting of treble frequncy fC1 = fC2 = 1 2π × 30k × C (Hz) 1 2π × 30k × 60p 88k (Hz) − + + − 30k 22pin 11pin 30k C 60p Gain Equivalent Circuit 3dB Gain fC1 88k Freq. 22/27 30 32 26 29 31 3 2 4.7k 25 0.033µ 0.0033µ R−S 23 10µ LPF AMP L+S 0.033µ TONE TONE 0.033µ 1000p 1000p 10µ VOL Vref VOL 10µ 20 1Meg 0.0047µ 28 BBE PHASE SHIFT 0.0033µ 24 VOL 27 L−R L+R BBE 0.033µ 22 VOL 10µ 4.7µ 4.7µ 4.7µ LOGIC CONTROL 4.7µ VCC 18 1µ 0.1µ 21 AGC 0.1µ 17 1Meg 1µ 39k 62k 19 BIAS 100µ VCC BH3868BFS Audio ICs !Application 16 15 14 13 12 11 10 9 8 7 6 5 4 1 Fig.3 23/27 BH3868BFS Audio ICs 40 36 32 28 24 20 16 12 8 4 0 0 1 2 3 4 5 6 7 8 9 10 10 +20 5 +16 2 +12 OUTPUT GAIN : G (dB) 48 Condition : in view of electrical characteristics 44 TOTAL HARMONIC DISTORTION : THD (%) QUIESCENT CURRENT : IQ (mA) !Electrical characteristics curve 1 0.5 0.2 0.1 0.05 treble boost bass boost +8 +4 flat −0 −4 −8 −12 −16 0.02 0.01 1m 2m 5m 10m 20m 50m 100m200m 500m 1 2 3 treble cut bass cut −20 10 20 50 100 200 500 1k 2k 5k 10k 20k 50k100k POWER SUPPLY VOLTAGE : VCC (V) INPUT VOLTAGE : VIN (Vrms) INPUT FREQUENCY : f (Hz) Fig.4 Quiescent current Fig.5 THD Fig.6 Tone frequency +15 60 NOISE VOLTAGE : VNO (µVrms) OUTPUT GAIN : G (dB) +12.5 +10 +7.5 +5 +2.5 +0 −2.5 −5 50 40 30 20 10 −7.5 −10 10 20 50 100 200 500 1k 2k 0 5k 10k 20k 50k100k 0 −10 −20 −30 −40 −50 −60 −70 −80 −90 INPUT FREQUENCY : f (Hz) ATTENUATION : VATT (dB) Fig.7 BBE frequency Fig.8 Noise level !Operation notes 1. We trust that an example of application circuits are recommendable and we would like to ask you to check the undermentioned notes and the characteristics carefully. If you will modify and external circuit constant upon use, you should allow for not only static characteristics but also transient characteristics, unexpected variation of external components and our ICs. 2. Operating power supply voltage range Basic circuit function and operation can be guaranteed within the operating temperature range and within the operating power supply voltage range. Upon use, check those ranges carefully and specify the content, element, voltage and temperature. 24/27 BH3868BFS Audio ICs 3. Step switching noise In an example of application circuit, an example of constant is set on VC1, VC2, TC and BC terminals. This constant varies depending on signal level setting, actual wiring pattern, etc. Specify each constant under careful study and examination. The internal equivalent circuit is shown below. (A primary integration circuit is set for gradual variation.) R Every terminal + C − (External) R value (kΩ) VC1, VC2, TC, BC 30 4. Level setting of volume and tone Attenuation to control serial data is stated as a reference value in our specifications. An internal D/A converter is configured by the R-2R method and, therefore, there is any data also in an area in which some data are not consecutive. Use is for fine adjustment. However, the volume must be within 8 bits (256 steps) and the tone must be 7 bits (64+1 steps). 2 5. I C BUS control High-frequency digital signal is inputted into the SCL terminal and SDA terminal. Therefore, However, wire not to interfere any analog signal system line. 6. Power-on Reset This IC contains a circuit for initialization when the power supply turns on. Every channel volume has been set to become −∞ when the power supply turns on. When the power supply is turned ON once and OFF and then ON again immediately, the said description may not be achieved if any load remains in a capacitor. In this case, apply 2 muting until a command of I C BUS has been sent. 7. Capacitor of VREF (8pin) 100µF is recommended as the capacity of power supply filter attached to VREF. If this capacity is decreased, the maximum attenuation of volume is deteriorated and the cross-talk also tends to become worse. This IC contains a precharge circuit and discharge circuit for capacitor attached to VREF. !BBE process The BBE sound processor considers a loudspeaker and amplifier as total audio system, reproduces accurately “Rise of Sound” which characterizes the sound, by an appropriate signal processing at a stage before amplifier input, and makes the playback sound an original one as naturally as possible. 25/27 BH3868BFS Audio ICs !Problem in Sound Reproduction with Audio System and BBE Process In general, for the natural sound, treble harmonic element is generated first and then bass basic wave element is produced. This is the same with the attack part which shows the characteristics of various musical instruments. The amplitude element, which forms a frequency element and envelope at the rise of sound, expresses the character of the sound. Therefore, to reproduce any sound with a playback system, it is very important to express accurately the rise of sound against the original sound. However, there is unavoidable mismatch between a loudspeaker and amplifier of today’s audio playback system. For example, a power amplifier with transistor operates as constant-voltage source, but mismatch cannot be avoided because one loudspeaker is a current element. Moreover, the impedance characteristic of loudspeaker is affected considerably by electric reactance of voice coil or mechanical reactance of cone assembly. As a result, the rise of sound is distorted and the phase of playback sound is deviated. Furthermore, due to the increase of treble impedance, the loudspeaker amplitude is reduced and the harmonic element is deteriorated. So the treble element is easy to be masked by a consequent middle tone element of high level, and the rise of sound is hard to be produced accurately. BBE has been developed to solve those problems. BBE is a technology to reproduce the sound clearness more naturally by moving the delayed harmonic before the basic wave first to construct the same wave as that of the natural sound and then boosting slightly the treble which is easy to be attenuated. Because of the synergistic effect of phase correction and treble boost, the same clearness can be obtained by approximately half boost in comparison with a simple boost of equalizer. It has been ten years or more since BBE was introduced into many recording studios, PA, SR sites and broadcasting stations, and 100,000 or more units of BBE for professional have been using. BBE is designated by many musicians to improve the sound of vocal and musical instruments. !Principle of Operation To solve the problems in audio playback system mentioned in the previous page, the BBE processor processes a signal as follows: !Phase Correction Bass 20 Middle 150 Treble 2.4k 20k f (Hz) By dividing the input signal to three frequency bands, “Bass” (20 to 150 Hz), “Middle” (150Hz to 2.4kHz) and “Treble” (2.4k to 20kHz), and by adding them again, the phase difference −360° in Treble and −180° in Middle against Base are generated. These phase differences adjusts the time delay characteristic in every frequency band and minimizes the distortion of the rise of sound. !Revision of harmonic element Gain is applied to Treble, because the harmonic element (Treble element), of which gain is expected to be deteriorated depending on the loudspeaker characteristic, must be enhanced. However, if Treble is clear, it may seem that Bass is insufficient. This can be corrected by applying the gain to Bass. There are many audio system characteristics. The most suitable correction effect for your system can be obtained by BBE. 26/27 BH3868BFS Audio ICs !License agreement about patent and trademark BBE is a registered trademark of BBE Sound Inc. Only authorized party, who is permitted to use the trademark and patent of BBE, can supply and sell BH3868BFS. For such trademark and patent of BBE, please contact : BBE Sound lnc. 5381 Production Drive Huntington Beach, CA 92649 Tel:(714)897-6766 Fax:(714)896-0736 !External dimensions (Units : mm) 17 1 16 5.4±0.2 32 0.8 0.36±0.1 0.15±0.1 1.8±0.1 0.11 7.8±0.3 13.6±0.2 0.3Min. 0.15 SSOP−A32 27/27 Appendix Notes No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document use silicon as a basic material. Products listed in this document are no antiradiation design. The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. About Export Control Order in Japan Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control Order in Japan. In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction. Appendix1-Rev1.0