Multimedia ICs 16-bit stereo D / A converter for audio applications BU9480F The BU9480F is a 16-bit stereo D / A converter designed for audio applications, and has an internal 2 × oversampling circuit. Applications •16-bit stereo D / A converter for audio applications •1)Features 3.0 to 5.5V operating voltage. 4) 2-channel common phase output. 5) Internal 2 × oversampling interpolator. 6) 8 - pin plastic package. 7) Supports 4fs. (200kHz operation) 2) Low current consumption because of the CMOS process. 3) Resistor strings method used. •Block diagram LRCLK 5 SHIFT REGISTER / LATCH 8 BCLK 7 X2 OVER SAMPLING X2 OVER SAMPLING DAC DAC V CC SDATA 6 3 GND 4 2 1 OUTL REF OUTR •Pin descriptions Pin No. Pin name 1 ROUT Right channel analog signal output Function Low-impedance output I/O 1 / 2VCC Voltage 2 REF Connects the DA ref. voltage pin and ground High-impedance input 1 / 2VCC 3 GND Ground — — 4 LOUT Low-impedance output 1 / 2VCC 5 LRCK Left channel analog signal output The signal that distinguishes between left and right channels for serial data (left channe = high level, right channel = low level). 6 SDAT 7 BCLK 8 VCC Logic input — Serial data input Input with 2' compliment, MSB first. Logic input — Serial data shift clock input Logic input — Vcc — — 1 Multimedia ICs BU9480F •Absolute maximum ratings (Ta = 25°C) Parameter Symbol Limits Unit VDDMax. 7.0 V Applied voltage Power dissipation Pd 450∗ Operating temperature Topr – 10 ~ + 70 °C Storage temperature Tstg – 55 ~ + 125 °C Input voltage Topt – 0.3 ~ VDD + 0.3 V mW ∗ When unmounted, reduced by 4.5mW for each increase in Ta of 1°C over 25°C. •Recommended operating conditions Parameter Symbol Limits Unit Power supply voltage VDD 3.0 ~ 5.5 V Input low level voltage VIL 0.0 ~ 0.2 × VDD V Input high level voltage VIH 0.8 × VDD ~ VDD V Electrical characteristics (unless otherwise noted, Ta = 25°C, V •Analog unit characteristics DD Parameter Current dissipation Symbol Min. Typ. Max. Unit IDD — 3.6 6 mA Resolution RES — — 16 BIT Noise distortion 1 THD1 — 0.05 0.12 Noise distortion 2 THD2 — 0.07 0.4 Full-scale output voltage VFS 1.8 2 2.2 Crosstalk C.T — – 92 S / N ratio S/N 86 RL 10 Output pin load resistance = + 5.0V) Conditions f = 1kHz, 0dB Measurement circuit Fig.6,7 — Fig.6,7 % f = 1kHz, 0dB Fig.6,7 % f = 1kHz, – 20dB Fig.6,7 VP-P — Fig.6,7 – 85 dB Unmeasured channel output = 0 dB, f = 1kHz. DIN audio filter Fig.6,7 93 — dB DIN audio filter Fig.6,7 — — kΩ — Fig.6,7 Logic input characteristics Parameter Min. Typ. Max. Unit Conditions Measurement circuit Input high level voltage VIH 0.7 × VDD — VDD V Pins 5,6 and 7 Fig.6,7 Input low level voltage VIL GND — 0.3 × VDD V Pins 5,6 and 7 Fig.6,7 Leakage current, high level IIH — — µA Pins 5,6 and 7 = VDD Fig.6,7 Leakage current, low level IIL — — 10 µA Pins 5,6 and 7 = GND DA conversion frequency fSL — — 200 kHZ — Fig.6,7 – 10 Fig.6,7 TBCLK 60 — — ns — Fig.6,7 SDAT.LRCK settling time TST 60 — — ns — Fig.6,7 SDAT.LRCK holding time THD 60 — — ns — Fig.6,7 BCLK period 2 Symbol Multimedia ICs BU9480F •Pin equivalent circuits + 1, 4 pin 3 pin – Fig.4 Fig.1 8 pin 2 pin Fig.5 Fig.2 5, 6, 7 pin Fig.3 •Measurement circuits VCC A 8 7 DIGITAL AUDIO DATA BU9480F 1 2 6 3 5 4 10kΩ 10µF THD + V + 1µF 10kΩ THD V + 1µF Fig. 6 A V Fig. 7 3 4 LSB LSB Fig. 8 LRCK BLCK SDATA VIH TST VIL VIH VIL VIL THD VIH VIH TST VIH VIL VIH THD TST VIL Interpolation and original data output are timed respectively to the leading edge and leading edge of LRCK, and so LRCK should be set to a duty of 50%. TBCLK D (N – 1) Interpolation data (D (N – 2) + D (N – 1) ) / 2 D (N – 2) R OUT R ch N D (N – 1) Note: LSB TBCLK VIL THD VIH 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 MSB Interpolation data (D (N – 2) + D (N – 1) ) / 2 L ch N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 MSB D (N – 2) N–1 12 13 14 15 16 L OUT LRCK SDAT BCLK (D (N – 1) + D (N) ) / 2 (D (N – 1) + D (N) ) / 2 Multimedia ICs BU9480F •I / O signal timing chart Multimedia ICs BU9480F •External dimensions (Units: mm) 1 4 0.11 1.27 0.15 ± 0.1 4.4 ± 0.2 5 1.5 ± 0.1 6.2 ± 0.3 5.0 ± 0.2 8 0.4 ± 0.1 0.3Min. 0.15 SOP8 5