Product Overview
Rated at 6-kW output power, it is based on the new three-level ZVS topology that guarantees
high efficiency, great performances, high stability and maintenance.
Especially designed to operate in particle accelerator facilities.
Extreme versatility and ease of “tuning” to any load/magnet condition thanks to the digital
current control implementation.
t Different versions for different output
current and output voltage ratings
t Digital feedback current control loop
t High efficiency (up to 90%)
t New three-level ZVS topology
t Long-term output stability
t Ethernet connectivity
t Graphic color OLED and encoder
t 208VAC and 400VAC input versions
t On-module speed-regulated fans
t Internal temperature monitoring
The DiRAC power unit is based
on the recent AC-DC three-level
ZVS converter topology and it is
composed of a PFC stage combined
with a buck converter into a single
stage for a rated 6kW output power
(PS120050 version, [email protected]). The
resonant nature of this power supply
guarantees high efficiency, a crucial
factor to take into account when
maintaining into operation a large
number of power supplies in the
same facility.
t External configurable interlocks (I/O)
t Epics- and Tango-compatible
t Magnet Power Supplies
The current control loop of the
DiRAC, as for all other CAENels
power supplies, is completely digital
in order to guarantee the same
configurability and ease of tuning
to any load condition (resistive and
inductive parts).
t Accelerator Machine Power Supplies
t Current Waveform Generation
t Nuclear Magnetic Resonance (NMR)
A new feature of the DiRAC units
is the current control algorithm,
which is performed directly by the
on-board FPGA: the parallel nature
of the computation allows to greatly
reduce time delays in the feedback
Output current setting is performed
by the use of a DCCT (DC Current
Transformer) that presents high
long-term stability, good bandwidth,
low noise and extremely low TC
(Temperature Coefficient).
The use of state-of-the-art 18-bit SAR
ADCs for current and voltage sensing
guarantees a reduced group delay
and thus higher bandwidth.
Internal interlocks and protections
are redundant and distributed
inside the DiRAC units – e.g. the
temperature is monitored by six
different sensors placed in different
sections of the board and the internal
The control board of the unit,
hosting the FPGA, the diagnostic
ADCs, Communication sections,
local control + display managing and
other ancillary parts is the same used
for the SY3634 and SY3662 system
Command syntax and
communication protocol
compatibility are maintained with
respect to the other CAENels PS
Commercially available modules are
PS120050 ([email protected]) and PS135040
([email protected]) in “A” and “E” versions.
Technical Specifications
Rated Output Current
Rated Output Voltage
About CAENels
Input Voltage
CAENels is a dynamic company that
provides power supplies and state-of-the-art
dedicated electronic systems to the particle
accelerator community - e.g. synchrotron
light sources and Free Electron Laser (FEL)
PF (Power Factor)
Maximum Output Power
Maximum Inductive Load
Current Setting Resolution
Output Current Read-Back
Output Voltage Read-Back
Current Control Range
Output Ripple (0-10kHz)
Long Term Stability (8h)
AC/DC Efficiency
External Interlocks/States
Internal Interlocks
CAEN els d.o.o.
Kraška ulica, 2
6210 - Sežana
Phone +386 (0)5 7313 585
Fax +386 (0)5 7313 587
[email protected]
Hardware Protections
Auxiliary ADC Read-Backs
PS120050: 120 A
PS135040: 135 A
PS120050: 50 V
PS135040: 40 V
A- version: 3 × 208 V(AC) @ 47-63 Hz
E- version: 3 × 400 V(AC) @ 47-63 Hz
> 0.98
Three-Level ZVS Converter
up to 6 kW
1 H (more upon request)
18 bit
20 bit
20 bit
< 0.01 %
5 % - 100 %
100 ppm / FS
20 ppm / FS
up to 90%
4 Inputs: user-configurable "dry" contacts
2 Outputs: user-configurable
Earth Fault Current
Regulation Fault
Fan Fault
AC Fault
Load energy dumping (free-wheeling)
Circuit breaker
Internal Temperatures
Earth Leakage Current
Air convection - self-regulated internal fans
Ethernet TCP-IP / UDP
Soft-start mode
Point-by-Point Current Waveform Loading
User-definable interlock thresholds, active levels and timings
FPGA Firmware Remote Update
User-settable Slew-Rate value
19” wide – 3U high Euro-mechanics rack
DiRAC Rear view
Copyright © CAENels d.o.o. - 2013
All rights reserved. Information in this publication supersedes
all earlier versions. Specifications subject to change without
Printed in May 2013