EMIF06-10006F1 ® 6 LINES EMI FILTER AND ESD PROTECTION IPADTM MAIN PRODUCT CHARACTERISTICS Where EMI filtering in ESD sensitive equipment is required: Mobile phones and communication systems Computers, printers and MCU Boards ■ ■ ® DESCRIPTION The EMIF06-10006F1 is a highly integrated devices designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF04 flip-chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15kV. This device includes four EMIF filters and 4 separated ESD diodes. BENEFITS EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Very low PCB space consuming: 2.92mm x 1.29mm Very thin package: 0.65 mm High efficiency in ESD suppression (IEC61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration and wafer level packaging. Flip-Chip package ■ ■ PIN CONFIGURATION (ball side) ■ ■ 9 8 7 6 I5 I4 5 4 3 I3 I2 2 1 ■ ■ I6 I1 A ■ COMPLIES WITH THE FOLLOWING STANDARDS : IEC 61000-4-2 level 4: 15kV 8 kV Gnd O6 O5 Gnd O4 Gnd O3 O2 B O1 C (air discharge) (contact discharge) MIL STD 883E - Method 3015-6 Class 3 BASIC CELL CONFIGURATION Input 1 Output 1 Input 4 Output 4 Input 2 Output 2 Input 5 Output 5 Input 3 Output 3 Input 6 Output 6 GND GND Filtering cells: Ri/o = 100Ω Cline = 60pF TM : IPAD is a trademark of STMicroelectronics. January 2003 - Ed: 1 1/6 EMIF06-10006F1 ABSOLUTE RATINGS (limiting values) Symbol Parameter and test conditions Value Unit PR DC power per resistance 0.1 W PT Total DC power per package 0.6 W Tj Maximum junction temperature 125 °C -40 to + 85 °C 125 °C Top Operating temperature range Tstg Storage temperature range ELECTRICAL CHARACTERISTICS (Tamb = 25 °C) Symbol I Parameter VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage IF VF VCL VBR VRM VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Series resistance between Input and Output Cline Input capacitance per line Symbol 2/6 Test conditions V IRM IR IPP Min. Typ. Max. Unit 5.5 7 9 V 500 nA VBR IR = 1 mA IRM VRM = 3.3 V per line RI/O I = 10 mA 80 100 120 Ω Cline VR = 2.5 V, F = 1 MHz, 30 mV (on filter cells) 50 60 70 pF EMIF06-10006F1 Fig. 1: S21 (dB) attenuation measurements and Aplac simulation. Fig. 2: Analog crosstalk measurements. Aplac 7.62 User: ST Microelectronics Aplac 7.62 User: ST Microelectronics 00 00 dB dB -25 -12.5 i3_o2.s2p -50 -25 -75 -37.5 i3-o3-load Simulation f/Hz -50 1M 3M 10M 30M 100M 300M 1G f/Hz -100 3G 100k 10M 1M 100M 1G Fig. 3: Digital crosstalk measurements. Fig. 4: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and one output V(out). Fig. 5: ESD response to IEC61000-4-2 (-15kV air discharge) on one input V(in) and one output V(out). Fig. 6: Line capacitance versus applied voltage for filter. C(pF) 100 90 F=1MHz Vosc=30mVRMS Tj=25°C 80 70 60 50 40 30 20 10 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VR(V) 3/6 EMIF06-10006F1 Aplac model Rbump Lbump Rs=100 Lbump Rbump Ii* sub Oi* Rsub Cz=41pF@0V Cbump Rsub Cbump Cz=41pF@0V Rbump Rsub Lbump sub Oi * = Output of each cell Ii* = Input of each cell Cgnd Lgnd Rgnd EMIF06-10006F1 model Ground return for each GND bump Aplac parameters 4/6 aplacvar Rs 100 aplacvar Cz 41 pF aplacvar Lbump 50 pH aplacvar Rbump 20 m aplacvar Cbump 1.2 pF aplacvar Rsub 100 m aplacvar Rgnd 100 m aplacvar Lgnd 100 pH aplacvar Cgnd 0.15 pF EMIF06-10006F1 ORDER CODE EMIF yy - xxx zz F 1 Pitch = 500µm Bump = 315µm EMI Filter FLIP CHIP Number of lines x: resistance value (Ω) z: capacitance value / 10 (pF) or application (3 letters) and version (2 digits) PACKAGE MECHANICAL DATA 435µm ± 50 315µm ± 50 500µm ± 50 50 1µ m ±5 0 1.29mm ± 50µm 250µm ± 50 650µm ± 65 2.92mm ± 50µm FOOT PRINT RECOMMENDATIONS Dot, ST logo xxx = marking yww = datecode (y = year ww = week) 545 400 545 Copper pad Diameter : 250µm recommended , 300µm max MARKING Solder stencil opening : 330µm 230 x x x y w w 100 Solder mask opening recommendation : 340µm min for 300µm copper pad diameter All dimensions in µm 5/6 EMIF06-10006F1 FLIP-CHIP TAPE AND REEL SPECIFICATION Dot identifying Pin A1 location Ø 1.5 +/- 0.1 3.5 +/- 0.1 ST xxx yww ST xxx yww ST xxx yww 8 +/- 0.3 0.73 +/- 0.05 All dimensions in mm 1.75 +/- 0.1 4 +/- 0.1 4 +/- 0.1 User direction of unreeling OTHER INFORMATION Ordering code Marking Package Weight Base qty Delivery mode EMIF06-10006F1 FTT Flip-Chip 5.4 mg 5000 Tape & reel Note: More packing informations are available in the application note AN1235: ''Flip-Chip: Package description and recommandations for use'' Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 6/6