SDN137 Digital High Speed Optocoupler 10MBd, Logic Output Description Features The SDN137 consists of a high efficient AlGaAs Light Emitting Diode and a high speed optical detector. This design provides excellent AC and DC isolation between the input and output sides of the Optocoupler. The output of the optical detector features an open collector Schottky clamped transistor. The enable function allows the optical detector to be strobed. The internal shield ensures high common mode transient immunity. A guaranteed common mode transient immunity is up to 15,000V/μS. Agency Approvals The SDN137 comes standard in an 8 pin DIP package. UL / C-UL: VDE: Applications High Speed Logic Ground Isolation Replace Slower Speed Optocouplers Line Receivers Power Transistor Isolation Pulse Transformer Replacement Switch Mode Power Supplies Digital Fieldbus Isolation Ground Isolation – Analog Signals The values indicated are absolute stress ratings. Functional operation of the device is not implied at these or any conditions in excess of those defined in electrical characteristics section of this document. Exposure to absolute Maximum Ratings may cause permanent damage to the device and may adversely affect reliability. Storage Temperature …………………………..-55 to +125°C Operating Temperature …………………………-40 to +85°C Continuous Input Current ………………………………..40mA Transient Input Current ………………….……………..400mA Reverse Input Control Voltage …………….………………5V Max Enable Input Voltage (VE) …………………………….5V Max Enable Input Current (IE) ……………..…………….5mA Input Power Dissipation ……..…………………………40mW Max Supply Voltage (VCC) …………………………………..7V Max Output Collector Current (IO) ……..……………….50mA Max Output Collector Voltage (VO) ...................................7V Output Power Dissipation ……………………………..85mW 8 VCC Anode 2 7 VE Cathode 3 6 VO NC 4 5 Ground Ordering Information Truth Table (Positive Logic) SCN137 LED ON OFF ON OFF ON OFF ENABLE H H L L NC NC OUTPUT L H H H L H ** A 0.1μF bypass Capacitor must be connected between pins 5 & 8 (GND & VCC) © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 File # E201932 File # 40035191 (EN 60747-5-2) Absolute Maximum Ratings Schematic Diagram NC 1 TTL Compatible High Bit Rate: 10MBd High CMR Performance (15kV/S) High Isolation Voltage (5000VRMS) High Common Mode Interference Immunity RoHS / Pb-Free / REACH Compliant Part Number Description SDN137 SDN137-H SDN137-S SDN137-STR 8 pin DIP, (50/Tube) 0.40” (10.16mm) Lead Spacing (VDE0884) 8 pin SMD, (50/Tube) 8 pin SMD, Tape and Reel (1000/Reel) NOTE: Suffixes listed above are not included in marking on device for part number identification Page # 1 SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output Electrical Characteristics, TA = 25°C (unless otherwise specified) Parameter Symbol Min. Typ. Max. Units Test Conditions V IF = 10mA mV/°C IF = 10mA Input Specifications Input Forward Voltage Input Forward Voltage Temp Coefficient VF - 1.36 1.70 VF/T - -1.5 - BVR 5 - - V IR = 10A Input Threshold Current ITH - 1.1 5 mA VE=2V, VCC=5.5V, IOL(sinking)=13mA Input Capacitance CIN - 34 - pF f=1MHz, VF=0V Input Reverse Voltage Output Specifications, VCC = 5V (unless otherwise specified) High Level Supply Current ICCH - 7.4 10 mA VE=0.5V, VCC=5.5V, IF=0mA Low Level Supply Current ICCL - 10 13 mA VE=0.5V, VCC=5.5V, IF=10mA High Level Enable Current IEH - -0.6 -1.6 mA VE=2V Low Level Enable Current IEL - -0.9 -1.6 mA VE=0.5V High Level Enable Voltage VEH 2 - - Low Level Enable Voltage VEL - - 0.8 High Level Output Current IOH - - 100 A VE=2V, VCC=5.5V, VO=5.5V, IF=250A Low Level Output Voltage VOL - 0.28 0.60 V VE=2V, VCC=5.5V, IF=5mA IOL(sinking)=13mA V Switching Specifications, VCC = 5V, IF=7.5mA (unless otherwise specified) Propagation Delay Time to Low Output Level tPHL 25 35 100 nS RL=350, CL=15pF Propagation Delay Time to High Output Level tPLH 25 45 100 nS RL=350, CL=15pF | tPLH - tPHL | - 10 35 nS RL=350, CL=15pF tPSK - 8 40 nS RL=350, CL=15pF Output Rise Time (10% - 90%) tr - 20 - nS RL=350, CL=15pF Output Fall Time (90% - 10%) tf - 8 - nS RL=350, CL=15pF Propagation Delay Time of enable from VEH to VEL tELH - 22 - nS RL=350, CL=15pF, VEL=0V, VEH=3V Propagation Delay Time of enable from VEL to VEH tEHL - 12 - nS RL=350, CL=15pF, VEL=0V, VEH=3V Logic High Common Mode Transient Immunity |CMH| 5,000 - - V/S |VCM|=20V, VCC=5V, IF=0mA, VO (MIN)=2V, RL=350 Logic Low Common Mode Transient Immunity |CML| 5,000 - - V/S |VCM|=20V, VCC=5V, IF=7.5mA, VO (MIN)=0V, RL=350 Pulse Width Distortion Propagation Delay Skew © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 Page # 2 SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output Electrical Characteristics, continued… TA = 25°C (unless otherwise specified) Parameter Symbol Min. Typ. Max. Units Test Conditions μA 45% RH, t=5s, VI-O=3kV VRMS RH ≤ 50%, t=1min - VI-O = 500VDC - pF f=1MHz Isolation Specifications Input-Output Insulation Leakage Current II-O - - Withstand Insulation Test Voltage VISO 5000 - 1.0 12 Input-Output Resistance RI-O - 10 Input-Output Capacitance CI-O - 1.0 Notes 1. A 0.1F or bigger bypass capacitor for VCC is needed as shown in Figure 1 2. Peaking driving circuit may be used to speed up the LED. The peak drive current of LED may go up to 50mA and maximum pulse width 50ns, as long as average current doesn’t exceed 20mA. 3. tPLH (propagation delay) is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the output pulse. 4. tPHL (propagation delay) is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the output pulse. 5. The tELH enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising edge of the output pulse. 6. The tEHL enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling edge of the output pulse. 7. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., VO > 2.0 V). 8. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., VO < 0.8 V). 9. No external pull up is required for a high logic state on the enable input. If the enable pin is not used, tying it to VCC. 10. Device is considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together. 11. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage 3000 VRMS for one second (leakage current less than 5 A). This test is performed before the 100% production test for partial discharge 12. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 6000 VRMS for one second (leakage current less than 5 A). This test is performed before the 100% production test for partial discharge Recommended Operating Conditions, TA = 25°C (unless otherwise specified) Parameter Symbol Min. Typ. °C -40 Supply Voltage VCC 4.5 - 5.5 V Low Level Input Current IFL 0 - 250 A High Level Input Current IFH 5 - 15 mA Low Level Enable Voltage VEL 0 - 0.8 V High Level Enable Voltage VEH 2 - VCC V Output Pull Up Resistor RL 330 - 4k Fan Out N - - 5 - Page # 3 85 Units Operating Temperature © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 - Max. Test Conditions °C RL = 1k SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output SDN137 Electrical Test Circuits Figure 1: Single Channel Test Circuit for tPHL and tPLH Figure 2: Single Channel Test Circuit for tEHL and tELH Figure 3: © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 Single Channel Test Circuit for Common Mode Transient Immunity Page # 4 SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output SDN137 Performance & Characteristics Plots, TA = 25°C (unless otherwise specified) Figure 4: Input Diode Forward Characteristics Figure 5: Input Diode Forward Voltage vs. Temperature 2 1.5 TA=25°C 1.45 1.8 1.4 VF - Forword Voltage (V) VF - Input Forword Voltage (V) TA=25°C DPlot Trial Version http://www.dplot.com 1.35 1.3 IF=20mA 1.6 1.4 1.2 1.25 IF=2mA 1 -40 1.2 0 5 10 15 20 25 30 -20 Figure 6: Input Diode Threshold Current vs. Temperature Vcc=5.0V Vo=0.6V RL=350 DPlot Trial RL=4k Version http://www.dplot.com 0 20 40 60 80 RL=4k 4 DPlot Trial RL=350 Version http://www.dplot.com RL=1k 3 2 0 100 1 4 5 6 65 IOL=16mA IOL - Low Level Output Current (mA) VOL - Low Level Output Voltage (V) 3 Figure 9: Low Level Output Current vs. Temperature Vcc=5.5V VE=2.0V IF=5mA 0.5 IOL=13mA DPlot Trial Version http://www.dplot.com IOL=6.4mA 0.1 0 -40 2 IF - Input Forword Current (mA) 0.6 0.2 100 0 -20 Figure 8: Low Level Output Voltage vs. Temperature 0.3 80 Vcc=5V TA=25°C TA - Ambient Temperature (C) 0.4 60 1 0.5 0 -40 40 5 Vo - Output Voltage (V) ITH - Input Threshold Current (mA) 1 20 6 RL=1k 1.5 0 Figure 7: Output Voltage vs. Input Forward Current 3 2 IF=10mA TA - Ambient Temperature (C) IF - Input Forword Current (mA) 2.5 IF=30mA DPlot Trial Version http://www.dplot.com -20 0 20 IOL=9.6mA 40 60 80 © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 55 50 DPlot IF=10-15mA Trial Version http://www.dplot.com IF=5mA 45 40 -40 100 TA - Ambient Temperature (C) Vcc=5.0V VE=2.0V VOL=0.6V 60 -20 0 20 40 60 80 100 TA - Ambient Temperature (C) Page # 5 SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output SDN137 Performance & Characteristics Plots, TA = 25°C (unless otherwise specified) Figure 10: Enable Propagation Delay vs. Temperature Figure 11: Rise and Fall Time vs. Temperature 180 Vcc=5.0V IF=7.5mA VEH=3V VEL=0V 70 60 160 tR,tF - Rise Fall Time (ns) tE - Enable Propagation delay (ns) 80 DPlot tELH, RL=4k TrialtELH, RL=1k Version tELH, RL=350 http://www.dplot.com 50 40 30 20 10 140 120 -20 0 20 40 60 DPlot Trial RL=1K Version RL=350,1K,4K RLhttp://www.dplot.com =350 100 80 60 40 20 tEHL, RL=350O,1k,4k 0 -40 80 0 -40 100 -20 0 Figure 12: Propagation Delay Time vs. Temperature RL=350 RL=1K DPlot Trial Version http://www.dplot.com RL=350,1K,4K RL=4K 100 RL=1K DPlot Trial Version RL=350 http://www.dplot.com 60 40 RL=350,1K,4K 20 0 -20 0 20 40 60 80 5 100 7 9 11 13 15 IF - Input Forword Current (mA) TA - Ambient Temperature (C) Figure 14: Pulse Width Distortion vs. Input Forward Current Figure 15: Pulse Width Distortion vs. Temperature 60 60 Vcc=5.0V TA=25°C 50 PWD - Pulse width Distortion (ns) PWD - Pulse Width Distortion (ns) 80 tpHL tpLH 80 tp - Propagation Delay (ns) tP - Propagation delay (ns) tpHL tpLH 20 0 -40 60 100 Vcc=5.0V IF=7.5mA RL=4K 40 40 Figure 13: Propagation Delay vs. Input Forward Current 100 60 20 TA - Ambient Temperature (C) TA - Ambient Temperature (C) 80 tRISE tFALL RL=4K RL=4K 40 DPlot Trial Version RL=1K http://www.dplot.com 30 20 10 50 40 Vcc=5.0V IF=7.5mA DPlot Trial Version RL=1K http://www.dplot.com RL=4K 30 20 10 RL=350 RL=350 0 -40 0 5 7 9 11 13 15 © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 -20 0 20 40 60 80 100 TA - Ambient Temperature (C) IF - Forword Current (mA) Page # 6 SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output SDN137 Solder Reflow Temperature Profile Recommendations (1) Infrared Reflow: Refer to the following figure as an example of an optimal temperature profile for single occurrence infrared reflow. Soldering process should not exceed temperature or time limits expressed herein. Surface temperature of device package should not exceed 250ºC: G F D E H B A C Figure 16 Process Step A B C D E F G H Description Parameter Preheat Start Temperature (ºC) Preheat Finish Temperature (ºC) Preheat Time (s) Melting Temperature (ºC) Time above Melting Temperature (s) Peak Temperature, at Terminal (ºC) Dwell Time at Peak Temperature (s) Cool-down (ºC/s) 150ºC 180ºC 90 - 120s 230ºC 30s 260ºC 10s <6ºC/s (2) Wave Solder: Maximum Temperature: Maximum Time: Pre-heating: Single Occurrence 260ºC (at terminal) 10s 100 - 150ºC (30 - 90s) (3) Hand Solder: Maximum Temperature: Maximum Time: Single Occurrence © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 350ºC 3s (at tip of soldering iron) Page # 7 SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output SDN137 Package Dimensions 8 PIN DIP Package © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 Note: Page # 8 All dimensions in millimeters [mm] with inches in parenthesis () SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output SDN137 Package Dimensions 8 PIN WIDE Lead Space Package (-H) © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 Note: Page # 9 All dimensions in millimeters [mm] with inches in parenthesis () SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output SDN137 Package Dimensions 8 PIN SMD Surface Mount Package (-S) © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 Note: Page # 10 All dimensions in millimeters [mm] with inches in parenthesis () SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output SDN137 Packaging Specifications Tape & Reel Specifications (T&R) Specification Note: Symbol All dimensions in millimeters [mm] with inches in parenthesis () Dimensions, mm ( inches ) Tape Width W 16 0.3 ( 0.63 ) Sprocket Hole Pitch P0 4 0.1 ( 0.15 ) Compartment Location F P2 7.5 0.1 ( 0.295 ) 2 0.1 ( 0.079 ) Compartment Pitch P1 12 0.1 ( 0.472 ) © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 Page # 11 SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output DISCLAIMER Solid State Optronics (SSO) makes no warranties or representations with regards to the completeness and accuracy of this document. SSO reserves the right to make changes to product description, specifications at any time without further notices. SSO shall not assume any liability arising out of the application or use of any product or circuit described herein. Neither circuit patent licenses nor indemnity are expressed or implied. Except as specified in SSO’s Standard Terms & Conditions, SSO disclaims liability for consequential or other damage, and we make no other warranty, expressed or implied, including merchantability and fitness for particular use. LIFE SUPPORT POLICY SSO does not authorize use of its devices in life support applications wherein failure or malfunction of a device may lead to personal injury or death. Users of SSO devices in life support applications assume all risks of such use and agree to indemnify SSO against any and all damages resulting from such use. Life support devices are defined as devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when used properly in accordance with instructions for use can be reasonably expected to result in significant injury to the user, or (d) a critical component of a life support device or system whose failure can be reasonably expected to cause failure of the life support device or system, or to affect its safety or effectiveness. © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 Page # 12 SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512