THC63LVDF84B(5S)_Rev.1.10_E THC63LVDF84B(5S) LVDS 24Bit COLOR HOST-LCD PANEL INTERFACE RECEIVER(Falling Edge Clock) General Description Features The THC63LVDF84B(5S) receiver convert the four LVDS(Low Voltage Differential Signaling) data streams back into 28bits of CMOS/TTL data with falling edge clock. At a transmit clock frequency of 65MHz, 24bits of RGB data and 4bits of LCD timing and control data (HSYNC, VSYNC, CNTL1, CNTL2) are transmitted at a rate of 1.8Gbps. • Wide dot clock range: 20-65MHz suited for VGA, SVGA and XGA • • • • • PLL requires No external components Low power consumption Power-Down Mode Low profile 56 Lead TSSOP Package Pin compatible with THC63LVDF84A Block Diagram RA +/RB +/DATA (LVDS) RC +/RD +/- CLOCK (LVDS) RCLK +/20 to 65MHz LVDS TO TTL PARALLEL THC63LVDF84B(5S) 7 RA0-6 7 7 RB0-6 CMOS/TTL OUTPUT RC0-6 7 RD0-6 RECEIVER CLOCK OUT (20 to 65MHz) PLL /PDWN (140-455Mbit/On Each LVDS Channel) Copyright (C)2015 THine Electronics, Inc. 1 /10 THine Electronics, Inc. Security E THC63LVDF84B(5S) _Rev.1.10_E Pin Out THC63LVDF84B(5S) RC3 RD6 RC4 GND RC5 RC6 RD0 LVDSGND RARA+ RBRB+ LVDSVCC LVDSGND RCRC+ RCLKRCLK+ RDRD+ LVDSGND PLLGND PLLVCC PLLGND /PDWN CLKOUT RA0 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 VCC RC2 RC1 RC0 GND RB6 RD5 RD4 VCC RB5 RB4 RB3 GND RB2 RD3 RD2 VCC RB1 RB0 RA6 GND RA5 RD1 RA4 RA3 VCC RA2 RA1 Pin Description Pin Name Pin # Type RA+, RA- 10, 9 LVDS IN RB+, RB- 12, 11 LVDS IN RC+, RC- 16, 15 LVDS IN RD+, RD- 20, 19 LVDS IN RCLK+, RCLK- 18, 17 LVDS IN RA0~RA6 27,29,30,32,33,35,37 OUT RB0~RB6 38,39,43,45,46,47,51 OUT RC0~RC6 53,54,55,1,3,5,6 OUT RD0~RD6 7,34,41,42,49,50,2 OUT CLKOUT 26 OUT /PDWN 25 IN VCC 31,40,48,56 Power Power Supply Pins for TTL outputs and digital circuitry GND 4,28,36,44,52 Ground Ground Pins for TTL outputs and digital circuitry LVDSVCC 13 Power Power Supply Pin for LVDS inputs LVDSGND 8,14,21 Ground Ground Pins for LVDS inputs PLLVCC 23 Power Power Supply Pin for PLL circuitry PLLGND 22,24 Ground Ground Pins for PLL circuitry Copyright (C)2015 THine Electronics, Inc. Description LVDS Data Inputs LVDS Clock Inputs Pixel Data Outputs Pixel Clock Output H: Normal operation L: Power down (all outputs are pulled to ground ) 2 /10 THine Electronics, Inc. Security E THC63LVDF84B(5S) _Rev.1.10_E Electrical Characteristics CMOS/TTL DC SPECIFICATIONS VCC = VCC = PLL VCC = LVDS VCC Symbol Parameter Conditions Min. Typ. Max. Units VIH High Level Input Voltage 2.0 VCC V VIL Low Level Input Voltage GND 0.8 V VOH1 High Level Output Voltage IOH = -4mA VOL1 Low Level Output Voltage IOL = 4mA 0.4 V Input Current 0V ≤ VIN ≤ VCC ± 10 uA IIN 2.4 V LVDS RECEIVER DC SPECIFICATIONS VCC = VCC = PLL VCC = LVDS VCC Symbol Parameter VTH Differential Input High Threshold VTL Differential Input Low Threshold IIN Input Current Conditions Min. VOC = +1.2V Typ. Max. Units 100 mV -100 mV VIN = +2.4V/0V ± 10 VCC = 3.6V uA Absolute Maximum Ratings1 Supply Voltage (Vcc) CMOS/TTL Input Voltage CMOS/TTL Output Voltage LVDS Receiver Input Voltage Junction Temperature Storage Temperature Range Resistance to soldering heat Maximum Power Dissipation@25 °C -0.3 to +4V -0.3 to (Vcc + 0.3V) -0.3V to (Vcc + 0.3V) -0.3V to (Vcc + 0.3V) +125 °C -55 °C to +150 °C +260 °C /10sec 0.5W Recommended Operating Conditions Parameter Min Typ Max Unit All Supply Voltage 3.0 3.3 3.6 V Operating Ambient Temperature -40 85 °C Differential CLKIN Frequency 20 65 MHz 1. “Absolute Maximum Ratings” are those valued beyond which the safety of the device can not be guaranteed. They are not meant to imply that the device should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation. Copyright (C)2015 THine Electronics, Inc. 3 /10 THine Electronics, Inc. Security E THC63LVDF84B(5S) _Rev.1.10_E Supply Current VCC = VCC = PLL VCC = LVDS VCC Symbol IRCCG IRCCW IRCCS Parameter Condition(*) Receiver Supply Current 16Grayscale Pattern CL=8pF, VCC=3.3V Receiver Supply Current f = 65MHz Worst Case Pattern Receiver Power Down Supply Current /PDWN = L Typ. Max. Units 41 53 mA 72 94 mA 10 mA 16 Gray Scale Pattern CLKIN Rx0 Rx1 Rx2 Rx3 Rx4 Rx5 Rx6 Worst Case Pattern CLKIN EVEN RxIN ODD RxIN Copyright (C)2015 THine Electronics, Inc. 4 /10 THine Electronics, Inc. Security E THC63LVDF84B(5S) _Rev.1.10_E Switching Characteristics VCC =VCC = PLL VCC = LVDS VCC Symbol Parameter Min. Typ. Max. Units 15.4 T 50.0 ns tRCP CLK OUT Period tRCH CLK OUT High Time 4T/7 ns tRCL CLK OUT Low Time 3T/7 ns tRCD RCLK +/- to CLK OUT Delay 5T/7 ns tRS TTL Data Setup to CLK OUT 0.35T-0.3 ns tRH TTL Data Hold from CKL OUT 0.45T-1.6 ns tTLH TTL Low to High Transition Time 2.0 3.0 ns tTHL TTL High to Low Transition Time 1.8 3.0 ns tRIP1 Input Data Position0 (T = 11.76ns) -0.4 0.0 +0.4 ns tRIP0 Input Data Position1 (T = 11.76ns) T/7-0.4 T/7 T/7+0.4 ns tRIP6 Input Data Position2 (T = 11.76ns) 2T/7-0.4 2T/7 2T/7+0.4 ns tRIP5 Input Data Position3 (T = 11.76ns) 3T/7-0.4 3T/7 3T/7+0.4 ns tRIP4 Input Data Position4 (T = 11.76ns) 4T/7-0.4 4T/7 4T/7+0.4 ns tRIP3 Input Data Position5 (T = 11.76ns) 5T/7-0.4 5T/7 5T/7+0.4 ns tRIP2 Input Data Position6 (T = 11.76ns) 6T/7-0.4 6T/7 6T/7+0.4 ns tRPLL Phase Lock Loop Set 10.0 ms AC Timing Diagrams TTL Output 80% 80% 8pF TTL Output 20% 20% TTL Output Load tTHL tTLH Copyright (C)2015 THine Electronics, Inc. 5 /10 THine Electronics, Inc. Security E THC63LVDF84B(5S) _Rev.1.10_E AC Timing Diagrams tRIP2 tRIP3 tRIP4 tRIP5 tRIP6 tRIP0 tRIP1 Rx+/- Rx6 Rx5 Rx4 Rx3 Rx2 RCLK+ Rx1 Rx0 Vdiff = 0V Vdiff = 0V tRCD tRCP CLKOUT tRCH VCC/2 VCC/2 tRCL tRS Rx0 - Rx6 DATA VALID VCC/2 VCC/2 VCC/2 tRH DATA VALID VCC/2 Note: 1) Vdiff = (RA+) - (RA-), ...... (RCLK+) - (RCLK-) Copyright (C)2015 THine Electronics, Inc. 6 /10 THine Electronics, Inc. Security E THC63LVDF84B(5S) _Rev.1.10_E AC Timing Diagrams Phase Lock Loop Set Time /PDWN VCC/2 3.6V VCC VCC/2 tRPLL RCLK+/- CLKOUT Copyright (C)2015 THine Electronics, Inc. VCC/2 7 /10 THine Electronics, Inc. Security E THC63LVDF84B(5S)_Rev.1.10_E Note 1)Power On Sequence Power on LVDS-Tx after THC63LVDF84B(5S). 2)Cable Connection and Disconnection Don't connect and disconnect the LVDS cable, when the power is supplied to the system. 3)GND Connection Connect the each GND of the PCB which LVDS-Tx and THC63LVDF84B(5S) on it. It is better for EMI reduction to place GND cable as close to LVDS cable as possible. 4)Multi Drop Connection Multi drop connection is not recommended. TCLK+ THC63LVDF84B(5S) LVDS-Tx TCLK- LVDS-Tx 5)Asynchronous use Asynchronous use such as following systems are not recommended. TCLK+ CLKOUT DATA LVDS-Tx TCLK- CLKOUT THC63LVDF84B(5S) DATA IC IC TCLK+ CLKOUT DATA LVDS-Tx TCLK- THC63LVDF84B(5S) TCLK+ TCLK- DATA CLKOUT THC63LVDF84B(5S) DATA IC IC TCLK+ TCLK- Copyright (C)2015 THine Electronics, Inc. THC63LVDF84B(5S) 8 /10 DATA THine Electronics, Inc. Security E THC63LVDF84B(5S) _Rev.1.10_E Package 56 Lead Molded Thin Shrink Small Outline Package, JEDEC Unit : millimeters 14.0 ± 0.1 56 29 8.1 ± 0.1 6.1 ± 0.1 4.05 1 28 (1.0) 1.2 MAX 0.10 ± 0.05 0.50 TYP Copyright (C)2015 THine Electronics, Inc. 0.20 TYP 9 /10 THine Electronics, Inc. Security E THC63LVDF84B(5S) _Rev.1.10_E Notices and Requests 1. The product specifications described in this material are subject to change without prior notice. 2. The circuit diagrams described in this material are examples of the application which may not always apply to the customer's design. We are not responsible for possible errors and omissions in this material. Please note if errors or omissions should be found in this material, we may not be able to correct them immediately. 3. This material contains our copy right, know-how or other proprietary. Copying or disclosing to third parties the contents of this material without our prior permission is prohibited. 4. Note that if infringement of any third party's industrial ownership should occur by using this product, we will be exempted from the responsibility unless it directly relates to the production process or functions of the product. 5. Product Application 5.1 Application of this product is intended for and limited to the following applications: audiovide deice, officce automation device, communication device, consumer electronics, smartphone, feature phone, and amusement machinedevice. This product must not be used for applications that require extremely high-reliability/safety such as aerospace device, traffic device, transportation device, nuclear power control device, combustion chamber device, medical device related to critical care, or any kind of safety device. 5.2 This product is not intended to be used as an automotive part, unless the product is specified as a product conforming to the demandes and specifications of ISO/TS16949 (“the specified Product”) in this data sheet. THine Electronics, Inc.(“THine”) accepts no liability what so every for any product other than the Specified Product for it not conforming to the aforementioned demands and specifications. 5.3 THine accepts liability for demands and specifications of the Specified Product only to the extent that the user and THine have been previously and explicitly agreed to each other. 6. Despite our utmost efforts to improve the quality and reliability of the product, faults will occur with a certain small probability, which is inevitable to a semi-conductor product. Therefore, you are encouraged to have sufficiently redundant or error preventive design applied to the use of the product so as not to have our product cause any social or public damage. 7. Please note that this product is not designed to be radiation-proof. 8. Customers are asked, if required, to judge by themselves if this product falls under the category of strategic goods under the Foreign Exchange and Foreign Trade Control Law. THine Electronics, Inc. E-mail: [email protected] Copyright (C)2015 THine Electronics, Inc. 10 /10 THine Electronics, Inc. Security E