SSF1221J2
Main Product Characteristics:
VDSS
-12V
RDS(on)
14.4 mΩ(typ.)
ID
-12A
DFN2x2-6L Pin Assignment
Schematic diagram
Features and Benefits:
Advanced trench MOSFET process technology
Special designed for battery charge, load
switching in cellular handset and general
ultraportable applications
Ultra low on-resistance with low gate charge
Fast switching and reverse body recovery
150℃ operating temperature
Description:
It utilizes the latest trench processing techniques to achieve the high cell density and reduces the
on-resistance with high repetitive avalanche rating. These features combine to make this design an extremely
efficient and reliable device for use in battery charge and load switching in cellular handset and a wide variety of
other ultraportable applications
Absolute max Rating:
Symbol
Parameter
Max.
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 4.5V①
-12
ID @ TC = 100°C
Continuous Drain Current, VGS @ 4.5V①
-7.4
IDM
Pulsed Drain Current②
-28
PD @TC = 25°C
Power Dissipation③
2.4
W
VDS
Drain-Source Voltage
-12
V
VGS
Gate-to-Source Voltage
±8
V
-55 to +150
°C
TJ
TSTG
Operating Junction and Storage Temperature Range
A
Thermal Resistance
Symbol
Characterizes
Typ.
Max.
Units
RθJC
Junction-to-case
6.9
8
℃/W
RθJA
Junction-to-ambient (t ≤ 10s) ④
52
62.5
℃/W
©Silikron Semiconductor CO.,LTD.
2011.09.08
www.silikron.com
Version : 1.1
page 1 of 6
SSF1221J2
Electrical Characterizes @TA=25℃
Symbol
Parameter
V(BR)DSS
Drain-to-Source breakdown voltage
RDS(on)
Static Drain-to-Source on-resistance
unless otherwise specified
Min.
Typ.
Max.
Units
-12
Conditions
—
—
V
—
14.4
16
—
18.9
21
—
26.4
38
-0.4
—
-1
V
VDS = VGS, ID = 250μA
—
—
-1
μA
VDS = -12V,VGS = 0V
—
—
100
—
—
-100
VGS = 0V, ID = 250μA
VGS =-4.5V, ID =-10A
mΩ
VGS =-2.5V, ID =-8.9A
VGS =-1.8V, ID =-4.5A
VGS(th)
Gate threshold voltage
IDSS
Drain-to-Source leakage current
IGSS
Gate-to-Source forward leakage
gFS
Forward Transconductance
-3
—
—
Qg
Total gate charge
—
21
—
Qgs
Gate-to-Source charge
—
2.5
—
Qgd
Gate-to-Drain("Miller") charge
—
6
—
VGS = -4.5V
td(on)
Turn-on delay time
—
30
—
VGS=-4.5V,
tr
Rise time
—
48
—
td(off)
Turn-Off delay time
—
97
—
tf
Fall time
—
65
—
RGEN=6Ω
Ciss
Input capacitance
—
2138
—
VGS = 0V
Coss
Output capacitance
—
685
—
Crss
Reverse transfer capacitance
—
650
—
nA
S
VGS = 8V
VGS = -8V
VDS = -5V, ID =-10A
ID = -10A,
nC
ns
pF
VDD=-6V,
VDD=-6V,
ID = -10A,
VDS = -6V
ƒ = 1MHz
Source-Drain Ratings and Characteristics
Symbol
IS
ISM
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max.
Units
—
—
-12
A
—
—
-28
A
Conditions
MOSFET symbol
showing
the
integral reverse
p-n junction diode.
VSD
Diode Forward Voltage
—
-0.77
-1.2
V
IS=-2A, VGS=0V
trr
Reverse Recovery Time
—
16
—
ns
TJ = 25°C, IF =-10A,
Qrr
Reverse Recovery Charge
—
5.9
—
uC
di/dt = 100A/μs
©Silikron Semiconductor CO.,LTD.
2011.09.08
www.silikron.com
Version : 1.1
page 2 of 6
SSF1221J2
Test circuits and Waveforms
Switch time test circuit:
Switch Waveforms:
Notes:
①The maximum current rating is limited by bond-wires.
②Repetitive rating; pulse width limited by max. junction temperature.
③The power dissipation PD is based on max. junction temperature, using junction-to-ambient thermal
resistance.
④The value of RθJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a
still air environment with TA =25°C
⑤These curves are based on the junction-to-case thermal impedence which is measured with the
device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C.
©Silikron Semiconductor CO.,LTD.
2011.09.08
www.silikron.com
Version : 1.1
page 3 of 6
SSF1221J2
Mechanical Data：
DFN 2 x 2-6L PACKAGE INFORMATION
Notes:
①Does not fully conform to JEDEC registration MO-229 dated Aug/2003.
②Dimensions are in millimeters.
③Dimensions and tolerances per ASME Y14.5M. 1994.
©Silikron Semiconductor CO.,LTD.
2011.09.08
www.silikron.com
Version : 1.1
page 4 of 6
SSF1221J2
Ordering and Marking Information
Device Marking: 1221
Package (Available)
DFN 2x2-6L
Operating Temperature Range
C : -55 to 150 ºC
Devices per Unit
Package
Type
Units/
Tape
DFN2x2-6L
Units/Inner Inner
Box
Boxes/Carton
Box
Units/Carton
Box
3000pcs 10pcs
15000pcs
60000pcs
Reliability Test Program
Test Item
Conditions
High
Temperature
Reverse
Bias(HTRB)
High
Temperature
Gate
Bias(HTGB)
Tapes/Inner
Box
4pcs
Duration
Sample Size
Tj=125℃ or 150℃ @
80% of Max
VDSS/VCES/VR
168 hours
500 hours
1000 hours
3 lots x 77 devices
Tj=125℃ or 150℃ @
100% of Max VGSS
168 hours
500 hours
1000 hours
3 lots x 77 devices
©Silikron Semiconductor CO.,LTD.
2011.09.08
www.silikron.com
Version : 1.1
page 5 of 6
SSF1221J2
ATTENTION:
■
■
■
■
■
■
■
■
■
Any and all Silikron products described or contained herein do not have specifications that can handle applications
that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other
applications whose failure can be reasonably expected to result in serious physical and/or material damage.
Consult with your Silikron representative nearest you before using any Silikron products described or contained
herein in such applications.
Silikron assumes no responsibility for equipment failures that result from using products at values that exceed,
even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed
in products specifications of any and all Silikron products described or contained herein.
Specifications of any and all Silikron products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees of the
performance, characteristics, and functions of the described products as mounted in the customer’s products or
equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer
should always evaluate and test devices mounted in the customer’s products or equipment.
Silikron Semiconductor CO.,LTD. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to
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events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for
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Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for
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Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
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This catalog provides information as of Dec, 2008. Specifications and information herein are subject to change
without notice.
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Worldwide Sales and Service:
[email protected]
Technical Support:
[email protected]
Suzhou Silikron Semiconductor Corp.
Building 11A Suchun Industrial Square, 428# Xinglong Street, Suzhou P.R. China
TEL: (86-512) 62560688
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©Silikron Semiconductor CO.,LTD.
2011.09.08
www.silikron.com
Version : 1.1
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