P1300EC

Thyristor Surge Suppressors (TSS)
P0080EC - P5000EC Series - TO-92
@10/700μS, 6KV
Description
P0080EC - P5000EC Series are designed to protect broadband
equipment such as modems, line card, CPE and DSL from
damaging over-voltage transients.
The series provides a surface mount solution that enables
equipment to comply with global regulatory standards.
Features and Benefits
u
Low voltage overshoot
u
Low on-state voltage
u
Does not degrade surge capability after multiple surge events
Pinout Designation
within limit
u
Fails short circuit when surged in excess of ratings
u
Low Capacitance
Schematic Symbol
Applicable Global Standards
u
u
u
u
u
u
u
u
u
PIN3
PIN1
TIA-968-A / TIA-968-B
ITU K.20/21 Enhanced level
ITU K.20/21 Basic Level
GR 1089 Inter building
GR 1089 Inter building
IEC 6100-4-5
YD/T 1082
YD/T 993
YD/T 950
Electrical Parameters
Parameter
Definition
IS
Switching Current - maximum current required to switch to
on state
IDRM
Leakage Current - maximum peak off-state current
measured at VDRM
IT
IH
Holding Current - minimum current required to maintain on
state
IS
IH
IT
On-state Current - maximum rated continuous on-state
current
VS
Switching Voltage - maximum voltage prior to switching to
on stat
VDRM
Peak Off-state Voltage - maximum voltage that can be
applied while maintaining off state
VT
On-state Voltage - maximum voltage measured at rated
on-state current
C0
Off-state Capacitance - typical capacitance measured in
off state
UN Semiconductor Co., Ltd.
Revision October 18, 2013
+I
IDRM
-V
+V
VT
VDRM
VS
-I
www.unsemi.com.tw
1/5
@ UN Semiconductor Co., Ltd. 2013
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Thyristor Surge Suppressors (TSS)
P0080EC - P5000EC Series - TO-92
@10/700μS, 6KV
Electrical Characteristics
Part
Number
Marking
VDRM
VS
VT
@IDRM=5μA
@100V/μS
@IT=2.2A
V min
V max
C0
IS
IT
IH
V max
mA max
A max
mA min
pF min
pF max
@1MHz
P0080EC
P0080EC
6
25
4
800
2.2
50
25
110
P0300EC
P0300EC
25
40
4
800
2.2
50
15
110
P0640EC
P0640EC
58
77
4
800
2.2
150
40
100
P0720EC
P0720EC
65
88
4
800
2.2
150
35
100
P0900EC
P0900EC
75
98
4
800
2.2
150
25
90
P1100EC
P1100EC
90
130
4
800
2.2
150
30
90
P1300EC
P1300EC
120
160
4
800
2.2
150
25
90
P1500EC
P1500EC
140
180
4
800
2.2
150
25
85
P1800EC
P1800EC
170
220
4
800
2.2
150
25
85
P2000EC
P2000EC
180
220
4
800
2.2
150
20
85
P2300EC
P2300EC
190
260
4
800
2.2
150
25
80
P2600EC
P2600EC
220
300
4
800
2.2
150
20
80
P3100EC
P3100EC
275
350
4
800
2.2
150
20
65
P3500EC
P3500EC
320
400
4
800
2.2
150
20
65
P4000EC
P4000EC
360
460
4
800
2.2
150
20
65
P4500EC
P4500EC
400
540
4
800
2.2
150
20
65
P5000EC
P5000EC
440
600
4
800
2.2
150
20
65
Notes:
- Absolute maximum ratings measured at TA= 25ºC (unless otherwise noted).
- Devices are bi-directional.
Surge Ratings
2/10μS1
Series
2/10μS
2
A min
C
8/20μS1
1.2/50μS
2
10/160μS1
10/560μS1
10/1000μS1
2
2
2
10/160μS
10/560μS
10/1000μS
5/310μS1
10/700μS
A min
A min
A min
A min
A min
400
200
150
100
150
500
Notes:
1. Current waveform in µs
2. Voltage waveform in µs
2
ITSM
50/60 Hz
A min
50
di/dt
Amps/µs max
500
- Peak pulse current rating (IPP) is repetitive and guaranteed for the life of the product.
- IPP ratings applicable over temperature range of -40ºC to +85ºC
- The device must initially be in thermal equilibrium with -40°C < TJ < +150°C
Thermal Considerations
Package
Symbol
Parameter
Value
Unit
TJ
Operating Junction Temperature Range
- 40 to + 150
°C
TS
Storage Temperature Range
- 40 to +150
°C
RθJA
Thermal Resistance: Junction to Ambient
90
°C/W
TO-92
UN Semiconductor Co., Ltd.
Revision October 18, 2013
www.unsemi.com.tw
2/5
@ UN Semiconductor Co., Ltd. 2013
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Thyristor Surge Suppressors (TSS)
P0080EC - P5000EC Series - TO-92
@10/700μS, 6KV
Characteristic Curves
Figure 2 - tr × td Pulse Waveform
Figure 1 - V-I Characteristics
+I
Ipp – Peak Pulse Current - % Ipp
IT
IS
IH
IDRM
-V
+V
VT
VDRM
VS
tr=rise time to peak value
td=decay time to half value
100
Peak
Value
Waveform=tr×td
50
Half Value
50
tr
td
0
t – Time (μs)
-I
Figure 4 - Normalized DC Holding Current Versus Case
Temperature
Figure 3 - Normalized VS Change Versus Junction
Temperature
2.0
1.8
IH
IH (TC=25℃)
12
10
8
6
25℃
4
2
Ration of
Percent of VS Change - %
14
9
-4
-6
-8
1.6
1.4
1.0
0.8
0.6
0.4
-40
-20 0
20
40
60
80
100
120
140
160
-40 -20
0
20
40
60
80
100
120
140
160
Case Temperature (TC) - ℃
Junction Temperature (TJ) - ℃
UN Semiconductor Co., Ltd.
Revision October 18, 2013
25℃
1.2
www.unsemi.com.tw
3/5
@ UN Semiconductor Co., Ltd. 2013
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Thyristor Surge Suppressors (TSS)
P0080EC - P5000EC Series - TO-92
@10/700μS, 6KV
Environmental Specifications
Physical Specifications
80% Rated VDRM (VAC Peak ) +125°C or +150°C,
High Temp Voltage
Lead Material Copper Alloy High Temp Voltage
Blocking
Blocking 504 or 1008 hrs. MIL-STD-750 (Method
Lead Material
Copper Alloy
Terminal Finish
100% Matte-Tin Plated
Body Material
UL recognized epoxy meeting flammability
classification 94V-0
1040) JEDEC, JESD22-A-101
-65°C to +150°C, 15 min. dwell, 10 up to 100 cycles.
Temp Cycling
MIL-STD-750
(Method
1051)
EIA/JEDEC,
JESD22-A104
Biased Temp &
52 VDC (+85°C) 85%RH, 504 up to 1008 hrs.
Humidity
JEDEC, JESD22-A-101
+150°C 1008 hrs.
High Temp Storage
EIA/
MIL-STD-750 (Method 1031)
JEDEC, JESD22-A-101
Low Temp Storage
-65°C, 1008 hrs.
Thermal Shock
Thermal Shock 10 cycles.
0°C to +100°C, 5 min. dwell, 10 sec. transfer,
MIL-STD-750 (Method
1056) JEDEC, JESD22-A-106
Autoclave (Pressure
+121°C, 100%RH, 2atm, 24 up to 168 hrs.
Cooker Test)
EIA/Cooker Test)
JEDEC, JESD22-A-102
+260°C, 30 secs.
MIL-STD-750 (Method 2031
Resistance to Solder
Heat
Moisture Sensitivity
85%RH, +85°C, 168 hrs., 3 reflow cycles Level
Level
(+260°C Peak).
JEDEC-J-STD-020, Level 1
Soldering Parameters
Reflow Condition
TP
Ramp-up
Critical Zone
TL to TP
Pre Heat
Lead–free assembly
-Temperature Min (Ts(min))
+150°C
-Temperature Max (Ts(max))
+200°C
-Time (min to max) (ts)
60 -180 Seconds
TL
Temperature
TS(max)
Ramp-down
Average ramp up rate ( Liquidus Temp TL)
to peak
3°C/Second Max
TS(max) to TL - Ramp-up Rate
3°C/Second Max
TS(min)
Preheat
25
Time to peak temperature
(t 25℃ to peak)
Time
UN Semiconductor Co., Ltd.
Revision October 18, 2013
- Temperature (TL) (Liquidus)
+217°C
- Time (min to max) (ts)
60 -150 Seconds
Reflow
Peak Temperature (TP)
260 +0/-5°C
Time within 5°C of actual peak Temperature
(tp)
30 Seconds Max
Ramp-down Rate
6°C/Second Max
Time 25°C to peak Temperature (TP)
8 minutes Max
Do not exceed
+260°C
www.unsemi.com.tw
4/5
@ UN Semiconductor Co., Ltd. 2013
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Thyristor Surge Suppressors (TSS)
P0080EC - P5000EC Series - TO-92
@10/700μS, 6KV
Part Numbering
Part Marking
Part Marking Code
PXXXXE
C
(Refer to Electrical Characteristics Table)
Date code
Dimensions
TO-92
Inches
Dimensions
MT1/PIN1
MT2/PIN3
Millimeters
Min
Max
Min
Max
A
0.176
0.196
4.47
4.98
B
0.500
D
0.095
12.70
0.105
2.41
2.67
E
0.150
G
0.135
0.145
3.43
3.68
H
0.088
0.096
2.23
2.44
J
0.176
0.186
4.47
4.73
K
0.088
0.096
2.23
2.44
L
0.013
0.019
0.33
0.48
M
0.013
0.017
0.33
0.43
N
3.81
0.060
1.52
All leads are insulated from case.
Case is electrically
non-conductive. (Rated at 1600 V(AC) RMS for one minute from leads
to case over the operating temperature range.)
The TO-92 is designed to meet mechanical standards as set forth in
JEDEC publication number 95.
Mold flash shall not exceed 0.13 mm per side.
Packaging
Part Number
Description
Quantity
Pxxx0EC
TO-92 Bulk Pack
1000
UN Semiconductor Co., Ltd.
Revision October 18, 2013
www.unsemi.com.tw
5/5
@ UN Semiconductor Co., Ltd. 2013
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.