74LV14 Hex inverting Schmitt trigger

74LV14
Hex inverting Schmitt trigger
Rev. 6 — 12 December 2011
Product data sheet
1. General description
The 74LV14 is a low-voltage Si-gate CMOS device that is pin and function compatible with
74HC14 and 74HCT14.
The 74LV14 provides six inverting buffers with Schmitt-trigger input. It is capable of
transforming slowly-changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage VT+ and the negative voltage VT is defined as the input
hysteresis voltage VH.
2. Features and benefits





Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 C
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 C
 ESD protection:
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V
 Multiple package options
 Specified from 40 C to +85 C and from 40 C to +125 C
3. Applications
 Wave and pulse shapers for highly noisy environments
 Astable multivibrators
 Monostable multivibrators
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74LV14N
40 C to +125 C
DIP14
plastic dual in-line package; 14 leads (300 mil)
SOT27-1
74LV14D
40 C to +125 C
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74LV14DB
40 C to +125 C
SSOP14
plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74LV14PW
40 C to +125 C
TSSOP14
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74LV14BQ
40 C to +125 C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5  3  0.85 mm
SOT762-1
5. Functional diagram
1
3
5
9
11
13
1A
1Y
2A
2Y
3A
3Y
4A
4Y
5A
5Y
6A
6Y
mna204
2
1
2
3
4
5
6
9
8
11
10
13
12
4
6
8
10
12
001aac497
Fig 1. Logic symbol
74LV14
Product data sheet
Fig 2. IEC logic symbol
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
A
Y
mna025
Fig 3. Logic diagram for one
Schmitt trigger
© NXP B.V. 2011. All rights reserved.
2 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
6. Pinning information
6.1 Pinning
1
1A
terminal 1
index area
74LV14
14 VCC
74LV14
1Y
2
13 6A
1A
1
14 VCC
2A
3
12 6Y
1Y
2
13 6A
2Y
4
2A
3
12 6Y
3A
5
2Y
4
11 5A
3Y
6
6
9
4A
7
8
4Y
8
3Y
GND
10 5Y
9
4Y
10 5Y
7
5
VCC
GND
3A
11 5A
(1)
4A
001aah096
Transparent top view
001aah095
(1) The die substrate is attached to the exposed die pad
using conductive die attach material. It can not be
used as a supply pin or input.
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
Fig 5. Pin configuration DHVQFN14
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
1A
1
data input
1Y
2
data output
2A
3
data input
2Y
4
data output
3A
5
data input
3Y
6
data output
GND
7
ground (0 V)
4Y
8
data output
4A
9
data input
5Y
10
data output
5A
11
data input
6Y
12
data output
6A
13
data input
VCC
14
supply voltage
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
3 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
7. Functional description
Table 3.
Function table
H = HIGH voltage level; L = LOW voltage level.
Input nA
Output nY
L
H
H
L
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
[1]
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
[1]
IO
output current
VO = 0.5 V to (VCC + 0.5 V)
ICC
IIK
Min
Max
Unit
0.5
+7.0
V
-
20
mA
-
50
mA
-
25
mA
supply current
-
50
mA
IGND
ground current
50
-
mA
Tstg
storage temperature
65
+150
C
Ptot
total power dissipation
Tamb = 40 C to +125 C
DIP14 package
[2]
-
750
mW
SO14 package
[3]
-
500
mW
(T)SSOP14 package
[4]
-
500
mW
DHVQFN14 package
[5]
-
500
mW
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
Ptot derates linearly with 12 mW/K above 70 C.
[3]
Ptot derates linearly with 8 mW/K above 70 C.
[4]
Ptot derates linearly with 5.5 mW/K above 60 C.
[5]
Ptot derates linearly with 4.5 mW/K above 60 C.
9. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
[1]
Min
Typ
Max
Unit
1.0
3.3
5.5
V
VCC
supply voltage
VI
input voltage
0
-
VCC
V
VO
output voltage
0
-
VCC
V
Tamb
ambient temperature
40
+25
+125
C
[1]
The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to
VCC = 1.0 V (with input levels GND or VCC).
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
4 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
10. Static characteristics
Table 6.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VOH
HIGH-level output voltage
LOW-level output voltage
VOL
Conditions
Tamb = 40 C to +85 C
Tamb = 40 C
to +125 C
Unit
Min
Typ[1]
Max
Min
Max
IO = 100 A; VCC = 1.2 V
-
1.2
-
-
-
V
IO = 100 A; VCC = 2.0 V
1.8
2.0
-
1.8
-
V
IO = 100 A; VCC = 2.7 V
2.5
2.7
-
2.5
-
V
IO = 100 A; VCC = 3.0 V
2.8
3.0
-
2.8
-
V
IO = 100 A; VCC = 4.5 V
4.3
4.5
-
4.3
-
V
IO = 6 mA; VCC = 3.0 V
2.4
2.82
-
2.2
-
V
IO = 12 mA; VCC = 4.5 V
3.6
4.2
-
3.5
-
V
IO = 100 A; VCC = 1.2 V
-
0
-
-
-
V
IO = 100 A; VCC = 2.0 V
-
0
0.2
-
0.2
V
IO = 100 A; VCC = 2.7 V
-
0
0.2
-
0.2
V
IO = 100 A; VCC = 3.0 V
-
0
0.2
-
0.2
V
IO = 100 A; VCC = 4.5 V
-
0
0.2
-
0.2
V
IO = 6 mA; VCC = 3.0 V
-
0.25
0.40
-
0.50
V
IO = 12 mA; VCC = 4.5 V
VI = VT+ or VT
VI = VT+ or VT
-
0.35
0.55
-
0.65
V
II
input leakage current
VI = VCC or GND;
VCC = 5.5 V
-
-
1.0
-
1.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
20.0
-
40
A
ICC
additional supply current
per input; VI = VCC  0.6 V;
VCC = 2.7 V to 3.6 V
-
-
500
-
850
A
CI
input capacitance
-
3.5
-
-
-
pF
[1]
Typical values are measured at Tamb = 25 C.
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
5 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
11. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; For test circuit see Figure 7.
Symbol Parameter
tpd
propagation delay
Tamb = 40 C
to +85 C
Conditions
Typ[1]
Max
Min
Max
VCC = 1.2 V
-
80
-
-
-
ns
VCC = 2.0 V
-
27
37
-
48
ns
[2]
nA to nY; see Figure 6
-
20
28
-
35
ns
VCC = 3.0 V to 3.6 V; CL = 15 pF
[3]
-
13
-
-
-
ns
VCC = 3.0 V to 3.6 V
[3]
-
15
22
-
28
ns
-
-
18
-
23
ns
-
15
-
-
-
pF
VCC = 4.5 V to 5.5 V
power dissipation
capacitance
Unit
Min
VCC = 2.7 V
CPD
Tamb = 40 C
to +125 C
[4]
CL = 50 pF; fi = 1 MHz;
VI = GND to VCC
[1]
All typical values are measured at Tamb = 25 C.
[2]
tpd is the same as tPLH and tPHL.
[3]
Typical values are measured at nominal supply voltage (VCC = 3.3 V).
[4]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where:
fi = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
N = number of inputs switching
(CL  VCC2  fo) = sum of the outputs.
12. Waveforms
VI
VM
nA input
VM
GND
t PHL
t PLH
VOH
VM
nY output
VOL
VM
mna344
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. The input (nA) to output (nY) propagation delays
74LV14
Product data sheet
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Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
6 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
Table 8.
Measurement points
Supply voltage
Input
Output
VCC
VM
VM
< 2.7 V
0.5VCC
0.5VCC
2.7 V to 3.6 V
1.5 V
1.5 V
 4.5 V
0.5VCC
0.5VCC
VCC
PULSE
GENERATOR
VI
VO
DUT
CL
50 pF
RT
RL
1 kΩ
001aaa663
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
Fig 7. Load circuit for switching times
Table 9.
Test data
Supply voltage
Input
VCC
VI
tr, tf
< 2.7 V
VCC
 2.5 ns
2.7 V to 3.6 V
2.7 V
 2.5 ns
 4.5 V
VCC
 2.5 ns
13. Transfer characteristics
Table 10. Transfer characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Figure 8 and Figure 9.
Symbol Parameter
VT+
positive-going
threshold voltage
74LV14
Product data sheet
Tamb = 40 C
to +85 C
Conditions
Tamb = 40 C
to +125 C
Unit
Min
Typ[1]
Max
Min
Max
VCC = 1.2 V
-
0.70
-
-
-
V
VCC = 2.0 V
0.8
1.10
1.4
0.8
1.4
V
VCC = 2.7 V
1.0
1.45
2.0
1.0
2.0
V
VCC = 3.0 V
1.2
1.60
2.2
1.2
2.2
V
VCC = 3.6 V
1.5
1.95
2.4
1.5
2.4
V
VCC = 4.5 V
1.7
2.50
3.15
1.7
3.15
V
VCC = 5.5 V
2.1
3.00
3.85
2.1
3.85
V
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Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
7 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
Table 10. Transfer characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Figure 8 and Figure 9.
Symbol Parameter
Tamb = 40 C
to +85 C
Conditions
Min
VT
VH
[1]
negative-going
threshold voltage
hysteresis voltage
Typ[1]
Tamb = 40 C
to +125 C
Max
Min
Unit
Max
VCC = 1.2 V
-
0.34
-
-
-
V
VCC = 2.0 V
0.3
0.65
0.9
0.3
0.9
V
VCC = 2.7 V
0.4
0.90
1.4
0.4
1.4
V
VCC = 3.0 V
0.6
1.05
1.5
0.6
1.5
V
VCC = 3.6 V
0.8
1.30
1.8
0.8
1.8
V
VCC = 4.5 V
0.9
1.60
2.0
0.9
2.0
V
VCC = 5.5 V
1.1
2.00
2.6
1.1
2.6
V
VCC = 1.2 V
-
0.3
-
-
-
V
VCC = 2.0 V
0.2
0.55
0.8
0.2
0.8
V
VCC = 2.7 V
0.3
0.60
1.1
0.3
1.1
V
VCC = 3.0 V
0.4
0.65
1.2
0.4
1.2
V
VCC = 3.6 V
0.4
0.70
1.2
0.4
1.2
V
VCC = 4.5 V
0.4
0.80
1.4
0.4
1.4
V
VCC = 5.5 V
0.6
1.00
1.5
0.6
1.5
V
All typical values are measured at Tamb = 25 C.
14. Waveforms transfer characteristics
VO
VT+
VI
VH
VT−
VI
VH
VT−
VT+
VO
mna207
mna208
VT+ and VT limits at 70 % and 20 %.
Fig 8. Transfer characteristic
74LV14
Product data sheet
Fig 9.
Definition of VT+, VT and VH
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Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
8 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
001aaa659
12
001aaa660
100
ICC
(μA)
ICC
(μA)
80
8
60
40
4
20
0
0
0
0.3
0.6
0.9
1.2
0
0.4
VI (V)
0.8
1.2
1.6
2
VI (V)
VCC = 1.2 V.
VCC = 2.0 V.
Fig 10. Typical 74LV14 transfer characteristics
Fig 11. Typical 74LV14 transfer characteristics
001aaa661
300
ICC
(μA)
200
100
0
0
0.6
1.2
1.8
2.4
3
VI (V)
VCC = 3.0 V.
Fig 12. Typical 74LV14 transfer characteristics
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
9 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
15. Application information
The slow input rise and fall times cause additional power dissipation, this can be
calculated using the following formula:
Padd = fi  (tr  ICC(AV) + tf  ICC(AV))  VCC where:
Padd = additional power dissipation (W);
fi = input frequency (MHz);
tr = rise time (ns); 10 % to 90 %;
tf = fall time (ns); 90 % to 10 %;
ICC(AV) = average additional supply current (A).
Average ICC(AV) differs with positive or negative input transitions, as shown in Figure 13.
An example of a relaxation circuit using the 74LV14 is shown in Figure 14.
001aah097
100
ΔICC(AV)
(μA)
(1)
75
(2)
50
25
0
1.0
1.5
2.0
2.5
3.0
VCC (V)
(1) Positive-going edge.
(2) Negative-going edge.
Fig 13. Average additional supply current as a function of VCC
R
C
mna035
1
1
f = ---  --------------------T 0.8  RC
Fig 14. Relaxation oscillator
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
10 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
16. Package outline
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
w M
b1
(e 1)
b
MH
8
14
pin 1 index
E
1
7
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
4.2
0.51
3.2
1.73
1.13
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
2.2
inches
0.17
0.02
0.13
0.068
0.044
0.021
0.015
0.014
0.009
0.77
0.73
0.26
0.24
0.1
0.3
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.087
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT27-1
050G04
MO-001
SC-501-14
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-13
Fig 15. Package outline SOT27-1 (DIP14)
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
11 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.010 0.057
inches 0.069
0.004 0.049
0.05
0.244
0.039
0.041
0.228
0.016
0.028
0.024
0.01
0.01
0.028
0.004
0.012
θ
8o
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 16. Package outline SOT108-1 (SO14)
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
12 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
D
SOT337-1
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
7
1
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
2
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
0.65
7.9
7.6
1.25
1.03
0.63
0.9
0.7
0.2
0.13
0.1
1.4
0.9
8o
o
0
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT337-1
REFERENCES
IEC
JEDEC
JEITA
MO-150
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 17. Package outline SOT337-1 (SSOP14)
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
13 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
E
D
A
X
c
y
HE
v M A
Z
8
14
Q
(A 3)
A2
A
A1
pin 1 index
θ
Lp
L
1
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.72
0.38
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT402-1
REFERENCES
IEC
JEDEC
JEITA
MO-153
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
Fig 18. Package outline SOT402-1 (TSSOP14)
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
14 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
SOT762-1
14 terminals; body 2.5 x 3 x 0.85 mm
A
B
D
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
C
e1
e
2
6
y
y1 C
v M C A B
w M C
b
L
1
7
Eh
e
14
8
13
9
Dh
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A(1)
max.
A1
b
1
0.05
0.00
0.30
0.18
c
D (1)
Dh
E (1)
Eh
0.2
3.1
2.9
1.65
1.35
2.6
2.4
1.15
0.85
e
0.5
e1
L
v
w
y
y1
2
0.5
0.3
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT762-1
---
MO-241
---
EUROPEAN
PROJECTION
ISSUE DATE
02-10-17
03-01-27
Fig 19. Package outline SOT762-1 (DHVQFN14)
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
15 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
17. Abbreviations
Table 11.
Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
18. Revision history
Table 12.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74LV14 v.6
20111212
Product data sheet
-
74LV14 v.5
Modifications:
•
Legal pages updated.
74LV14 v.5
20110105
Product data sheet
-
74LV14 v.4
74LV14 v.4
20090702
Product data sheet
-
74LV14 v.3
74LV14 v.3
20071220
Product data sheet
-
74LV14 v.2
74LV14 v.2
19980420
Product specification
-
74LV14 v.1
74LV14 v.1
19970203
Product specification
-
-
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
16 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
19. Legal information
19.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
19.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
17 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddr[email protected]
74LV14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
18 of 19
74LV14
NXP Semiconductors
Hex inverting Schmitt trigger
21. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
14
15
16
17
18
19
19.1
19.2
19.3
19.4
20
21
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Transfer characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms transfer characteristics. . . . . . . . . 8
Application information. . . . . . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Contact information. . . . . . . . . . . . . . . . . . . . . 18
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 12 December 2011
Document identifier: 74LV14