AN10876 Buck converter for SSL applications Rev. 2 — 23 June 2011 Application note Document information Info Content Keywords Buck, down, converter, driver, topology, AC/DC, DC/DC, SMPS, LED Abstract This document describes how to design a buck converter that can be used to drive a LED string. It also illustrates the method of calculating components in the Boundary Conduction Mode (BCM). AN10876 NXP Semiconductors Buck converter for SSL applications Revision history Rev Date Description v.2 20110623 second issue Modifications: • • • v.1 20091014 text and formulas updated template updated to latest version all illustrations upgraded to new AQL standard first issue. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 2 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 1. Introduction The buck converter is one of the most common and often used Switch Mode Power Supply (SMPS) topologies. This topology is also known as a down converter because of its main feature - the output voltage is always lower than the input voltage. A buck converter can be remarkably efficient (up to 95 % for integrated circuits) and self-regulating. This makes it useful for tasks such as converting a 12 V to 24 V typical battery voltage in a laptop, down to the few volts needed by the processor. This topology can be used not only to convert voltage, but is also suitable to act as a current source, depending on the control method. A number of NXP LED drivers can operate in buck mode. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 3 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 2. Scope 2.1 Scope This application note discusses the general principles and considerations to be addressed when designing a buck converter and especially a buck converter for LEDs in Boundary Conduction Mode with valley detect. There is a separate chapter for losses and key component calculations. This application note can be used when designing a buck converter using several of NXPs LED driver ICs, such as SSL1523, SSL2101, SSL2102, SSL2108, SSL2109 and UBA 3070. Dimmability and mains dimmability are not discussed within this application note, as this is specific for each IC solution. 2.2 General philosophy of the application note The layout of this document is constructed to enable each chapter on a related subject to be read with a minimum of cross-references to other documents or data sheets. This leads to repetition as some of the information within this application note is also available in other, more dedicated application notes. In most cases, typical values are given to enhance readability. • Section 3 discusses the theory of operation. It demonstrates how voltages and currents flow during one converter cycle. It also gives a short overview of the trade-off between CCM and BCM/DCM modes. • Section 4 provides information on how to design key components, such as the inductor value. It describes the resultant calculation of peak current with BCM, when valley detection is used. • Section 5 shows some power calculations, to give the designer an insight into the loss mechanisms in the converter, and how choices affect efficiency. • Section 6 briefly covers LED current tolerance and stability. 2.3 Related documents and tools. Further information regarding design tools and the driver ICs mentioned in this document can be either found on the product page for the specific IC (Internet link), or are available through the local sales office. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 4 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 3. Theory of operation The operation of the buck converter is relatively simple, comprising an inductor and two switches that control the inductor input current. It alternates between connecting the inductor to source voltage to store energy in the inductor, and discharging the inductor into the load. Figure 1 shows a simplified application diagram of a buck converter connected to a voltage supply and a load. For a basic understanding of the application, VI and Vo can be regarded as DC. In a practical application, a MOSFET or bipolar transistor replaces switch S1, and a diode replaces switch S2. S1 supply S2 LOAD 019aaa865 Fig 1. Basic configuration circuit The circuit is defined by the state of the switches. With two switches there are four modes, but not all of them are applicable. Modes 1 and 2 are the most important and nearly always present, while mode 3 is only present in Discontinuous Conduction Mode (DCM). Mode 4 must be prevented, since this would short circuit the supply. The state of the switches in modes 1 to 3 is displayed in Table 1. Table 1. Possible modes of operation Mode S1 S2 Duration 1 On Off 1 ttotal 2 Off On 2 ttotal 3 Off Off 3 ttotal The operation of the buck-back converter is briefly explained on the next page. The figures show the equivalent circuit diagrams for the first two modes. Simplified waveforms are also shown for one complete switching cycle. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 5 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications Vi Vo S2 II = IL S1 (Vi - Vo) × t L IS1 δ1 Vi S2 Vo II = Ipeak IL S1 Vo × t (t0 = Ton) L VS δ2 IL Ipeak Iled IS1 Vi VS Vi - Vo δ1 Fig 2. δ2 δ3 019aaa868 Buck waveforms - discontinuous conduction mode During the time 1 ttotal (Mode 1), switch S1 is switched on and a current starts to flow through inductor L. At the moment switch S1 is switched off, the secondary switch S2 is closed and a current flows towards the output. During the conduction time of switch S2, the energy in the inductor is reduced. The time interval 3 is entered when the current through switch S2 has decreased to zero. This mode of operation is referred to as the Discontinuous Conduction Mode (DCM). The border between DCM and Continuous Conduction Mode (CCM) is reached when the time 3 ttotal has become zero. This is referred to as the Boundary Conduction Mode (BCM). The CCM mode is present when the inductor current does not reach zero throughout the cycle. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 6 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications Switch S2 is often replaced by a diode. It must be ensured that Mode 3 is entered only when the current through the inductor is zero. If both switches open when there is still current running through the inductor, the current will try and seek another path, and a very high voltage peak will be the result. The peak might damage the switches or the inductor, but this can be prevented by using a suitable diode for S2. Both Continuous mode and Discontinuous mode buck solutions are common, and each solution has the following specific advantages and disadvantages: • The CCM converter has less input and output current ripple than the discontinuous mode version, so it requires less additional filtering. • The CCM converter has lower core losses because less of the BH-curve is utilized. It must, however, have an inductor value inverse to the current ripple, which results in a much bigger core and more windings. This counters the lower core losses, and gives more wire losses. • The CCM converter cannot be regulated to low values and the control margin is determined by the current ripple. • The DCM converter has no hard current switching when S1 starts to conduct. As a result, only a switching method that is optimized for low switch-off losses can be used. • The DCM converter makes full use of magnetic energy storage which allows it to work with a smaller inductor. The above list illustrates that discontinuous mode is the most effective solution for small form factor dimmable SSL solutions. A BCM converter offers even more advantages because the discontinuous mode has a dead time during which the inductor is not used. It offers the smallest size and the lowest switching losses, and full dimmability. The ripple current at both the input and output is, however, higher and so more buffering and filtering is needed to reduce this and to reach mains conducted emission standards such as FCC15 and IEC55015. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 7 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 4. Key components design procedure This chapter offers guidance when designing a Boundary Conduction Mode buck converter for SSL applications: 4.1 Output current versus peak current A typical minimal buck application circuit driving one string of LEDs is shown in Figure 3. The starting parameters when designing such a circuit are the required LED current and the LED voltage. Assuming the converter operates in BCM, the relationship between output current and inductor peak current is straightforward: I peak = 2 I led (1) R1 L1 D1 L1 To mains L2 C1 C3 N D2 C4 D4 R4 C5 LED1..n L4 C6 D5 U1 VCC GND RC REG R6 1 8 2 7 3 6 4 5 C7 L3 DRAIN n.c. SRC AUX R5 019aaa870 Fig 3. Typical buck application Remark: The LED assembly in Figure 3 is connected above L3. This is to prevent the LEDs having a voltage variation equal to the drain voltage. Because the LED assembly is large with extended wires and a heatsink, it has substantial capacitive coupling to its surroundings. This capacitive coupling has a detrimental effect on efficiency and EMC. The same inductor (L3 in Figure 3) is used for charging and discharging energy, resulting in a direct dependency between 1 and 2, the LED forward voltage and the input voltage. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 8 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications Vi – Vo t 2 --------------------- = ------ = ---2t1 Vo 1 (2) 4.2 Inductor dimensioning Since there is a direct relationship between the sum of t1 and t2 and converter frequency, the inductor value can easily be derived when choosing the converter frequency: 1 f = --T (3) 1 + 2 = 1 (4) Vi – Vo I peak = 1 ----------------f L3 (5) Combining 1 to 5 results in Equation 6: 2 V0 – Vi Vo 1 L 3 = ------------------------- – ------------------------------------2 I led f Vi (6) Example: When f = 100 kHz, Iled = 700 mA, VI = 200 V and VO = 100 V, then 1 = 50 %, Ipeak = 1.4 A and L3 = 357 H. Applying this to formula 2, t1 = 5 s, t2 = 5 s. and: f = 100 kHz, Iled = 700 mA, VI = 200 V, VO = 10 V. Ipeak = 1.4 A, 1 = 5 %, 2 = 95 %, L3 = 67.8 H, t1 = 0.5 s, t2 = 9.5 s 4.3 Valley detect The next converter cycle starts after t2 has ended and the converter current has reached zero. As a result, the switch reactivates with a substantial voltage over it. There is a capacitance over the supply and the switch, which comprises several components: • The parallel capacitance of the inductor • The reverse charge of the freewheel diode • The drain-gate capacitance of the switch When discharging this capacitance, the energy stored is dissipated in the switch (Psw). 1 2 P sw = --- C p V sw1 f 2 (7) Example: If f = 100 kHz, Vsw1 = 200 V and Cp = 100 pF, then Psw = 200 mW. As a result, the switch heats up and the efficiency is decreased. To counter this, NXP converters incorporate a unique feature referred to as valley detection. This is special circuitry that senses when the voltage on the drain of the switch has reached its lowest value. Consequently, the next cycle is started and the switching losses are reduced significantly. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 9 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications There is, however, another effect, a time (t3) is introduced during which there is little current running in the inductor. t3 constitutes half the period of the resonant frequency: t valley = L p C p (8) Example: If Lp = L3 = 357 H and Cp = 100 pF, then tvalley = 0.594 s To be most effective, two conditions must be met: • The excitation voltage (Vo) must be close to half the input voltage • The LpCp combination must be under damped 1 V o = --- V i 2 and 2 2 R ser C p – 4 L p C p « 0 (9) Rser is the serial damping resistor within the Lp Cp circuit, and consists of coil resistance and magnetic losses. Example: If Vi = 200 V, Vo= 100 V which is 0.5 VI then the first condition is met. If Rser = 1 , Cp = 100 pF, Lp = 357 H, then the resultant damping factor is 1.43 x 10-13. This is smaller than 0, and so the second condition is also met. VGATE VO VD Vi Valley 0 Demagnetization Magnetization IL 1 0 t0 2 t1 3 t2 t3 ttotal Fig 4. AN10876 Application note 4 t00 019aaa871 Valley detect waveforms All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 10 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications However, in order to reach the same LED current, the peak value must be adjusted, and this in turn will alter the converter frequency. The average current towards the output is given in Equation 10: t1 + t2 I led = I peak --------------------------------------2 t1 + t2 + t3 (10) Vo = ----------------Vi – Vo (11) I peak L 3 t 2 = ----------------------Vo (12) I peak L 3 t 1 = ----------------------Vi – Vo (13) Combining Equation 10, Equation 11, Equation 12 and Equation 13 results in Equation 14: 2 2 I led I peak L 3 ------------------------- + 1 Vo = ---------------------------------------------------------I peak L 3 ---------------------- + 1 + t3 Vo (14) When Equation 14 is expounded, it gives Equation 15 2 0 = L 3 + 1 I peak – 2 I led + 1 L 3 I peak – 2 I led t 3 V o (15) This 2nd order function can be solved using the ABC formula: a = L3 + 1 (16) b = – 2 L 3 + 1 I led (17) c = – 2 t 3 V o I led (18) 2 –b b – 4 a c I peak = -------------------------------------------------2a (19) Example: When = 1, Iled = 700 mA, t3 = 0.594 s and Vo = 100 V, then a = 0.714 103; b = 1 103 and c = 83.1 x 10-6 with the result that Ipeak = 1.48 A. Applying these values in the preceding formulas, results in t1 = 5.28 s, t2 = 5.28 s, t3 = 0.594 s, f' = 89.6 kHz. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 11 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 4.4 Peak current limit In the example schematic (see Figure 3), resistor R5 limits the peak current. When the voltage level over this resistor reaches a threshold, the cycle will stop and the switch will stop conducting. This threshold can be used to control peak current. Using peak current control, the LED current is half the peak current in BCM mode. The tolerance on this detection is proportional to the tolerance on the LED current. The value of R5 is calculated using the threshold level Vocp in Equation 20. V ocp R 5 = ----------I peak (20) Example: If Ipeak = 1.48 A and Vocp = 0.52 V then R5 = 0.35 . 4.5 Ripple current calculation Capacitor C5 filters the current through the LEDs so that it will approach the average current through the inductor. The remaining variation is known as ripple and can be expressed as a percentage of the average current. If the current waveform is symmetrical, which is the case for buck converters, the ripple current is also symmetrical. Equation 21 provides an approximation of the ripple current. 1 1 C 5 = ------------ ---------------------------------------------2 f Ripple % R dyn (21) In Equation 21, Rdyn is the differential resistance of the LED string at the average rated current. This value is derived by taking the tangent of the UI graph as provided in the data sheet for the LED. This must not be confused with the division between voltage and current at the point of operation of the LED. Example: Ten LED's are used in series and are driven at 100 mA. Each LED has a dynamic resistance of 1 , resulting in a total dynamic resistance of 10 . With a ripple of 5 % and a frequency of 100 kHz, C5 will be 3.18 F. Use 3.3 F. or, alternatively, One LED is used at 1 A. It has a dynamic resistance of 0.1 . With a ripple of 1% and a frequency of 100 kHz, C5 will be 1.6 mF. The value calculated using this formula is intended to filter ripple current caused by converter operation. It is not intended to filter current variation due to input voltage fluctuations. The input voltage ripple often has an amplitude that does not allow the linear approximation as used in Equation 21, especially when rectifying and buffering 50 Hz or 60 Hz mains voltage. For mains buffer calculations, use Equation 22. 2 P tot t dis C3 + C4 = ----------------------------------------------------------2 2 V mainspeak – V buff min (22) where: Ptot = Pin + IC losses. C3 + C4 is equal to the input buffer capacity AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 12 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 4.6 Inductor design parameters In buck converter designs, the importance of the main inductor (L3) quality is often underestimated. To achieve a highly efficient solution, not only the inductance value, but also the resistive losses, saturation current, proximity losses, core losses, parasitic capacitance and stray magnetic fields are important. Not understanding the functionality and implementing without an optimized component, will result in either, inferior performance or an impractical design. Chapters Section 4.6.1 to Section 4.6.4 offer some guidelines concerning this. 019aaa861 400 3F3 PV (kW/m3) f (kHz) ^ B (mT) 200 100 400 50 25 100 200 100 300 200 100 0 0 40 80 120 T (°C) Fig 5. 3F3 specific power loss for several temperature/flux density combinations Manufacturers generally have their own code for core material and for applications between 50 kHz and 200 kHz, 3F3 (Ferroxcube), N87 (Epcos) or TP4 (TDG), are recommended. Select the material that has the optimal lowest loss at working temperature. A core material not suitable for the effective frequency of the converter will give high core losses. Table 2. AN10876 Application note Ferrite Core Comparative Geometry Considerations Aspect Pot Core; Double E core RM Core slab core Ec; ETD Cores core costs high high low medium high medium very low bobbin costs low low low medium high high none winding costs low low low low low low high winding flexibility good good excellent excellent good good fair assembly simple simple simple medium simple simple None mounting flexibility good Good good fair fair good poor heat dissipation poor good excellent good good poor good shielding excellent good poor poor fair excellent good All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 PQ Core EP Core Toroid © NXP B.V. 2011. All rights reserved. 13 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 4.6.1 Core type selection Core geometry depends on several factors such as cost, flexibility, shielding and utilization factors. A core can have an inner core that may result in a round or square winding. The stray inductance can vary with core shape. Core size is determined by the maximum stored energy in the inductor together with the required air gap. A core with a large air gap can store more energy than a core with a small air gap. In practice, for discontinuous mode converters, an optimum design is reached when core losses and winding losses (proximity and skin losses) are balanced. A compromise has to be made between high storable energy levels, low leakage inductance and small tolerances on the inductance. Using Equation 23, the maximum energy stored in the inductor can be calculated. 1 2 E = --- L 3 I p 2 (23) Example: If L3 = 357 H and Ip = 1.48 A, then E = 0.39 x 103 J. Table 3 shows the RM core types that can be applied: Table 3. Core selector Core type Material Ag (M) Ue (N/A2) Le (mm) Al (nH) Ae (mm2) RM4 3H3-A100 160 154 20.9 100 11.0 RM4/I 3F3-A160 110 215 23.3 160 13.8 RM5 3H3-A250 110 201 21.2 250 21.2 RM5/I 3F3-A250 130 186 23.1 250 24.8 RM6S 3H3-A315 120 221 26.8 315 31.4 RM7/I 3F3-A250 240 135 30.0 250 44.1 RM8 3H3-A630 90 342 35.6 630 52.0 RM10/I 3H3-A1000 110 367 44.6 1000 96.6 4.6.2 Calculate windings Al is often specified in the data sheet of the core material. It relates to the inductive value of a single turn on the selected core. Using this figure, and knowing the inductance, the calculation of winding number is quite straightforward, as shown in Equation 24: N L3 = L3 ----Al (24) Example: For core type RM8 3H3-A630 - if Al = 630 nH and L3 = 357 H then NL3 = 24 A practical value for NL3 can be obtained by approximating the calculated value to its nearest integer. As a double check, the maximum magnetic B-field is determined by the magnetic material. Note that the peak value of B-field reached during operation, has a substantial impact on core losses. Core losses are discussed in Section 5.5.3, but as a general guideline, the B-field in the magnetic material should remain below the specified Bmax of the material. The B-field can be estimated using Equation 25: N L3 I p B max = u e -------------------Le AN10876 Application note (25) All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 14 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications Example: For core type RM8 3H3-A630 - if NL3 = 24, Ip = 1.48 A, ue = 342 and Le = 35.6 mm, Bmax is calculated as follows: 1.48 B max = 342 24 ---------- = 341 mT 35.6 (26) 4.6.3 Auxiliary winding count The auxiliary winding can be used for two purposes. It can sense demagnetization of the inductor and also generate the required voltage to power the controller. If the winding is used for demagnetization only, the voltage generated can be much smaller than when using the winding to supply the Vcc. This affects the winding ratio. For demagnetization detection, both the negative and positive voltage should be larger than the threshold level. For Vcc generation using a single diode rectifier, it is most efficient to take the longest time of 1 and 2 and dimension the winding accordingly. For interval 2, Equation 27 applies: N aux V aux N L3 V aux = ----------- V o min N aux = -------------------------N L3 V o min (27) Example: If Vo(min) = 100 V, NL3 = 24 and Vaux = 14 V, then Naux = 3.36 (rounded up to the closest higher integer, in this case 4) Note that the voltage on the auxiliary winding should always be higher than the minimum Vcc voltage as required by the IC. There is voltage loss over the inductor and the rectifier diode, and there is ripple on the Vcc due to discharge. All these factors have to be taken into account. There is a direct relationship between the voltage on the auxiliary winding and the converter output voltage. The output voltage depends on the sum of the forward voltages of the attached LED's. Consequently, the minimum Vf should be taken as the starting point for checking if sufficient voltage is available on the auxiliary winding. 4.6.4 Wire diameter selection Wire diameter selection is a trade-off between the available winding area, resistive losses, proximity losses and skin losses. When using wire sizes below 0.6 mm diameter at operating frequencies below 200 kHz, the skin losses are normally negligible. Above 0.6 mm diameter, it is recommended that Litze wire, or multiple strands, are used. Skin depth can be calculated using Equation 28: = 2 ------------------------------------------------2 f eff u r u o (28) In which: uo = 0.4 106, = resistivity = 17 X 109 (copper). Ur (copper) = 1. Example: At 100 kHz sinusoidal current, using copper, the skin depth will be 0.21 mm. The effective frequency does not correspond to the converter frequency, but to the harmonics of the applied waveform. For a triangular wave current, the amplitude and frequency of the waveforms can be deducted using Fourier analyses. The amplitude of the coefficients depends on the ratio between 1 and 2. as can be seen in Table 4. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 15 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications Table 4. Harmonics amplitude coefficients Ratio 1st 2nd 3rd 4th 5th 6th 7th 0.05 0.334 0.165 0.108 0.078 0.060 0.048 0.039 0.2 0.372 0.151 0.067 0.023 0 0.010 0.003 0.5. 0.405 0 0.045 0 0.016 0 0.008 A higher converter ratio will also give more high order harmonics, as well as increased core and proximity losses in the transformer. These harmonics must be filtered in order to be EMC compliant and this requires either more or improved input and output filtering. The resistive losses depend on the peak currents in the wires. They can be estimated by simply calculating the wire resistance, and calculating the average power dissipation in the wire. As an approximation, the current density should be between 300 and 500 Circular Mills(CM)/Amp. Table 5 shows wire sizes related to current: Table 5. Wire selection table Diameter (mm) Nearest AWG Area (mm2) Area (CM) DC Res. (Ohm/m) Typical Current ll (A) 0.1 38 0.008 15 2.195 0.04 0.2 32 0.031 62 0.549 0.15 0.25 30 0.049 97 0.351 0.24 0.315 28 0.078 154 0.221 0.38 0.355 27 0.099 195 0.174 0.49 0.4 26 0.126 248 0.137 0.62 0.56 23 0.246 486 0.070 1.22 0.71 21 0.396 781 0.044 1.95 16 0.2 - 0.503 992 0.034 2.48 37 0.2 - 1.162 2294 0.015 5.73 61 0.2 - 1.916 3782 0.009 9.45 4.7 Vcc generation dimensioning. When the auxiliary winding is also used for Vcc generation, the following aspects must be taken into account: • At startup, the converter is not working and no voltage is generated in the auxiliary winding. There must always be a startup circuit present that is capable of providing sufficient current to the Vcc for the first few cycles. • The voltage on the auxiliary winding depends on the output voltage. As a result, worst case situations should be used to calculate whether minimum power demands are met and if dissipation and current values are within limits. • Voltage is only present during part of the cycle. The average current flowing towards the Vcc of the IC should be sufficient to drive the IC. Consequently, the peak current flowing should be higher than the average current that is required. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 16 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications Vbuf D3 C4 C5 LED L3 3 5 1 2 T1 D4 R12 U1 VCC GND RC C6 D5 REG 1 8 2 7 3 6 4 5 DRAIN R10 n.c. SRC AUX 019aaa872 Fig 6. VCC generation circuit Example 1: At Vaux = 14 V, Icc = 2 mA at 12 V, 2 = 46 %. V(R12) = 14 12 0.7 = 1.3 V, I(R12) = 2 mA / 0.46 = 4.34 mA. R12 = 1.3 V / 4.34 mA = 299 . Round down gives 270 . P(R12) = I2 R 2 = 2.4 mW. Example 2: At Vaux = 18 V, Icc = 2 mA at 12 V, 2 = 4 %. V(R12) = 18 12 0.7 = 5.3 V. I(R12) = 2 mA / 0.04 = 50 mA. R12 = 5.3 V / 50 mA = 106 . Rounding down gives 100 . P(R12) = 10 mW. If the circuit is dimmable, a recalculation must be made representing a worst case scenario. Some ICs, such as the SSL1523 and SSL2101, have internal HV generation. If sufficient drain voltage is available, the IC is capable of providing its own supply. Note that a smaller interval of current charge and a larger tolerance, leads to over-dimensioning of this circuit and increases the losses in the serial resistor (R12), diode (D4) and inductor. The margin might require additional protection against Vcc overvoltage and to accommodate this, a zener diode (D5) is included in the circuit. 4.7.1 Buffer capacitance C6 calculation: When Vcc is generated, the incoming current must be buffered to provide a continuous and stable voltage. The voltage drop over C6 should be such that Vcc does not drop below the minimum voltage. Equation 29 can be applied to determine the capacitor value: I cc t C 6 = -----------------V (29) Example: If V = 1.3 V, Icc = 2 mA and t = 6 s, then C6 will be at least 9.23 nF. In practice, the value chosen for C6 is much higher to reduce noise and capacitive coupling with the surroundings. Common values for C6 are between 1 F and 4.7 F. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 17 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 4.8 Demagnetization detection dimensioning Several NXP ICs have demagnetization detection functionality that uses a pin with minimum and maximum threshold voltages. The NXP range of LED drivers have levels that are set to 100 mV and +100 mV. There is also a negative and positive clamping diode with a threshold of 0.5 V. The clamping diodes have a maximum current level Idemag(max). When using an auxiliary winding, the current should be limited to a level where the threshold voltages are reached and the maximum current not exceeded. Example: If Vaux = 14 V and 100 A < Iaux < 5 mA, then Raux (R10) = 14 / 100 10-6 = 140 K. Note that the demagnetization detection is phase dependent and the winding direction should be opposite to the main inductor in order to start next cycle at low valley. Reversing the winding will result in switching at top detection. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 18 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 5. Power calculations The efficiency of a buck converter is one of the critical specifications for the design. One of the things to consider, is that efficiency is always relative. Some of the losses of a buck converter, such as the IC VCC generation, are fixed and depend on the IC. Because of fixed losses, efficiency tends to deteriorate with lower output power. The variable losses consist of a number of factors, and these are discussed in next sub-chapters. The formulas in these chapters will give the designer insight into the parameters that determine the losses for each component. 5.1 Resistive switch dissipation In addition to capacitive losses (see Equation 7), there are also resistive losses in the switch. The main parameters that determine these losses are the peak current and the resistance of the switch, which is expressed as RDSon for MOSFET switches. There is a momentary peak dissipation and an average dissipation. 2 P peak = I peak R DSon (30) For the duration of period t1, the total dissipation will be as shown in Equation 31 1 2 P = --- I peak R DSon 3 (31) For the total time period, the average resistive switch dissipation will be as shown in Equation 32: 1 2 P = --- t 1 f I peak R DSon 3 (32) Example: If f = 89.6 kHz, RDSon = 2.2 , Ipeak = 1.48 A and t1 = 5.28 s, then P = 0.76 W. 5.2 Capacitive switch dissipation The capacitive switch losses have already been discussed in Section 4.3 Equation 7. It is important to note that these losses are independent of the peak current and subsequently the LED current. By using valley detection and an output voltage that is half the input voltage, these capacitive switching losses can be avoided. Without this option, the balance between switch size causing lower RDSon losses, and capacitive switch losses will shift. A larger switch will have lower RDSon, but higher drain capacitance. In such a situation, the optimum has to be selected: For the following examples, Ipeak = 1.48 A, t1 = 5.28 s, Vsw1 = 100 V and f = 89.6 kHz. 1. If Id = 1.5 A, RDSon = 5.5 , C = 300 pF, PRDSon = 1.9 W and Pcsw = 0.13 W, then Ptot = 2.03 W 2. If Id = 3.5 A, RDSon = 2.2 , C = 550 pF, PRDSon = 0.76 W and Pcsw = 0.24 W, then Ptot = 1 W 3. If Id = 13 A, RDSon = 0.42 , C = 3.1 nF, PRDSon = 0.14 W and Pcsw = 1.39 W, then Ptot = 1.53 W Remark: Of the three previous examples, example 2 provides the best performance. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 19 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 5.3 Switching losses In addition to the capacitive losses, there are also losses due to hard switching. There is a switching slope time during which there is an overlap of the current and voltage, resulting in dissipation. I (A) I0 UT P(t) I(t) U(t) 0 Fig 7. time (s) tsw 019aaa869 Switching loss graph Assuming that the current drop and the voltage rise is linear, within a fixed time tsw, the dissipation can be calculated as follows: I0 t I t = I 0 – ------ t = I 0 1 – ------ t sw t sw (33) t U t = U t -----sw t sw (34) Using Equation 33 and Equation 34, results in Equation 35. t t P t = I t U t = I 0 1 – ------ U t ----- sw t sw t sw (35) t sw E = P t dt = U t sw I0 1 – t----- sw t 0 t sw E = 0 I0 Ut sw ------------------- t dt 2 t sw t sw – 0 t ------ dt t sw (36) I0 Ut 2 sw ------------------- t dt 2 t sw (37) I0 Ut 1 I 0 U t sw 2 1 3 sw E = --- ------------------- t sw – --- ------------------- t sw = 2 3 t sw 2 t (38) 1 --- I 0 U t t sw sw 6 (39) sw 1 P eff = --- I 0 U t f t sw sw 6 Example: tsw = 100 nS, Io = 1.5 A, Utsw = 200 V, f = 88 kHz. Peff = 0.44 W. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 20 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications The dissipation increases with the switching time. When using valley detection, these losses are reduced at switch-on but they are still present at switch-off. 5.4 Freewheel diode losses The freewheeling diode has two loss mechanisms, forward losses and the reverse charge losses. The forward, or conductive, losses can be estimated using the time with respect to current and voltage drop given in Equation 40: and Equation 41. P f = I led V f t2 f (40) 1 2 P rev = --- V I C rev f 2 (41) Example: If f = 89.6 kHz, Iled = 0.7 A, t2 = 5.28 s, Vf = 0.7 V, VI = 200 V and Crev = 10 pF then Pf = 230 mW and Prev = 18 mW. The forward voltage of the diode can be lowered using a Schottky diode, but these diodes are often difficult to obtain with reverse voltages above 100 V. Care should also be taken not to oversize this diode, as it does not appreciably lower the forward losses and the reverse charge is often directly related to the maximum current rating of the diode. 5.5 Inductor losses The inductor has several loss mechanisms. The calculation of these losses is very complex and there is much debate on the way these losses contribute to the total inductor losses. Section 5.5 simply illustrates a number of the loss mechanisms within the inductor. 5.5.1 Resistive losses The cause of resistive losses is a combination of wire length and its thickness. The calculation of the resistance and the losses can be derived from Equation 42 and Equation 43: 1 R DC = --A (42) t sw 2 P DC 1 = ------ t sw I 1 2 R DC dt = --- I p R DC 3 (43) 0 Example: For a wire length of 1 m with a diameter of 0.56 mm: If Cu = 17.2 109, A = R2 (= 0.246 x 106), RDC= 70 m and Ip = 1.48 A, then PDC = 51 mW. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 21 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 5.5.2 Proximity losses The full calculations for proximity losses are outside the scope of this application note. What should be made clear, however, it that they are closely related to the skin depth and number of windings. See Figure 8: 019aaa864 102 5 100 40 20 10 4 RAC RDC 3 2 10 n = 1 layer 1 10-1 1 10 h/δ Fig 8. Proximity loss graph Too many layers of wire with a radius that is close to, or below skin-depth, should be avoided. Normally, the proximity losses are calculated as a factor of the DC wire resistance: RAC = n x RDC. Maintaining low resistive losses helps to lower proximity losses which is another drawback of the CCM mode inductor. To achieve higher inductance, more windings are required, thereby increasing DC and AC resistance and countering the lower core losses. 5.5.3 Core losses The core losses in the magnetic material are determined by the magnetization curve and frequencies. The magnetic field in the core material is excited by the magnetic flux density for each converter cycle. This produces a highly non-linear curve. It has hysteresis and it shows saturation level. The surface area enclosed by the variation in B-field strength at a certain frequency determines the losses. A bigger core, a higher B-field and higher frequency, increase these losses. The loss per unit of volume of the core material, for given frequencies, is shown in the core material data sheet. Figure 10 displays such a curve. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 22 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications B μ H 019aaa862 Fig 9. BH curve magnetic material 019aaa863 1 Power loss density (W/cm3) 100 kHz 1 MHz 500 kHz 200 kHz 50 kHz 0.1 20 kHz 0.01 0.01 0.3 0.1 Tesla (Bmax) Fig 10. Material loss graph A simple empirical formula that calculates core loss is the Steinmetz equation as shown in Equation 44: P h = K h f B max V core (44) Kh and are dependent on core material. This formula can be improved by including the harmonics of a square waveform as shown in Equation 45: P nse = K h 2f B max D AN10876 Application note 1– + 1 – D 1– V core All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 (45) © NXP B.V. 2011. All rights reserved. 23 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications In Equation 45, D is duty cycle, Bmax the peak flux density, ‘f’ is the frequency of the fundamental and Vcore is the volume of the core. This demonstrates that a higher frequency, higher flux density, smaller duty-factor and bigger volume all increase core losses. A larger core might not always reduce core losses. If the B-field is already low, the increase in volume will counter the lower losses due to reduced flux density. Example: At a duty cycle of 50 %, with Kh = 0.05, f = 80 (kHz), = 1.8, Bmax = 100 mT, = 3 and Vcore = 2.4 cm3, the loss will be 0.05 (160 k)1.8 (0.1)3 3.58 2.46 = 1.36 W. 5.6 Sense resistor losses. For the sense resistor losses, Equation 32 can be applied. RDSon is replaced with sense resistor value. Example: t1 = 5.28 s, f = 89.6 kHz, Ipeak = 1.48 A, Rsense = 0.5 / 1.49 = 0.33 , Psense = 113 mW 5.7 Total system losses When undertaking buck power calculations, it is vital to consider the impact of each individual loss on the total converter efficiency. This aspect is illustrated by taking a single driver with a set current, a 200 V input voltage, and varying the output voltage in steps. The relationship between the input voltage and the output voltage is plotted on the X-axis as a ratio. Each loss mechanism is calculated, and the resultant driver efficiency plotted. Figure 11 illustrates the converter efficiency dropping at a low ratio. This is not caused by an excessive increase in losses, but by the relative decrease of useful output power. Some losses, such as the magnetic core losses and the resistive losses in the switch, are reduced. There is an increase in the forward losses in the freewheel diode, the capacitive switching losses and the losses due to hard switching. This is logical, as the conduction time t2 of the freewheel diode is large and the voltage drop over the switch is also large. It demonstrates that a very low resistance switch will be more helpful for a large ratio, such as 50 % to 90 %. Low switch capacitance, low forward voltage of the freewheel diode and fast switching are more effective for a small ratio, 5 % to 20 % for example. AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 24 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 019aaa866 100 (%) 90 80 70 60 0 20 40 60 80 100 Ratio (%) Fig 11. Buck converter efficiency 019aaa867 1.0 Watt (1) 0.8 0.6 (2) (4) 0.4 (5) (6) 0.2 (3) (7) (8) 0 0 20 40 60 80 100 Ratio (%) (1) = Prsw (2) = Pcsw (3) = Pcore (4) = Pforw (5) = Pfsw1 (6) = Pprox (7) = PRsense (8) = Pcontr Fig 12. Buck converter losses AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 25 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 6. Current tolerance and stability 6.1 Current tolerance In essence, there are only two main components that determine current tolerance. One is the spread on detection voltage and the second is the tolerance sense resistor. This can be derived from Equation 46: I led = I peak = V ocp + R 6 (46) Example: If Vocp(min) = 0.48 V, Vocp(avg) = 0.50 Vocp(max) = 0.52 V, Vocp = 4 % and R6 = 1 %, then Iled = 5 %. There is the possibility that the variation of Cp and Lp with valley detection will have some influence, but in practice, the time influenced is much smaller then the total cycle time. Example: If Lp = 10 % and 3 / ttotal = 0.052 then Iled = 0.5 Lp 0.05 = 0.25 %. 6.2 Current stability For the buck converter using peak current control, stability is seldom an issue. This is because the current is controlled per cycle and it is intrinsically stable. If some other means is used to stabilize the current, such as current mirror detection, accuracy might increase but the loop response must be calculated. The main component that determines response at peak current control, is the output capacitor C5. It has to be charged and discharged. At switch-on, the discharged capacitor will have to reach working voltage before any current flows through the LED's and light is produced. This time is equal to the charge time of Equation 47. V C5 t --------------------I CC (47) Example: With V = 100 V, ICC = 700 mA and C5 = 3.3 F, then t will be at least 471 s. At turn-off, the diode characteristic of the LED will be effective. Instead of a sudden drop, there will be an exponential drop of current, starting with the nominal current. The LED current will slowly fade until it is no longer visible. In practice, this can take several seconds. Since the LED's are placed in a self-rectification loop with the freewheel diode, any capacitive coupling on the drain side, or inductive coupling over the loop with an AC source will induce a current through the LEDs. Even a current as small as 100 A, could be visible. This can happen if large, ungrounded objects such as heat-sinks connected to phase, are in close proximity to the LEDs, AN10876 Application note All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 26 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 7. Summary This document provides an overview of operations and calculation of the buck converter in discontinuous conduction mode. It explains why valley detection is a key feature, and it shows how a number of key components can be calculated. It closes with a description of loss mechanisms in the converter, and how they contribute to driver efficiency. 8. Abbreviations Table 6. AN10876 Application note Abbreviations Acronym Description BCM Boundary Conduction Mode CCM Continuous Conduction Mode CM Circular Mills EMC ElectroMagnetic Compatibility DCM Discontinuous Conduction Mode IC Integrated Circuit LED Light Emitting Diode MOSFET Metal Oxide Semiconductor Field Effect Transistor SMPS Switch Mode Power Supply SSL Solid State Lighting All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 27 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 9. Legal information 9.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 9.2 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product AN10876 Application note design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose. 9.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 2 — 23 June 2011 © NXP B.V. 2011. All rights reserved. 28 of 29 AN10876 NXP Semiconductors Buck converter for SSL applications 10. Contents 1 2 2.1 2.2 2.3 3 4 4.1 4.2 4.3 4.4 4.5 4.6 4.6.1 4.6.2 4.6.3 4.6.4 4.7 4.7.1 4.8 5 5.1 5.2 5.3 5.4 5.5 5.5.1 5.5.2 5.5.3 5.6 5.7 6 6.1 6.2 7 8 9 9.1 9.2 9.3 10 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 General philosophy of the application note . . . 4 Related documents and tools. . . . . . . . . . . . . . 4 Theory of operation . . . . . . . . . . . . . . . . . . . . . . 5 Key components design procedure. . . . . . . . . 8 Output current versus peak current . . . . . . . . . 8 Inductor dimensioning . . . . . . . . . . . . . . . . . . . 9 Valley detect . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Peak current limit . . . . . . . . . . . . . . . . . . . . . . 12 Ripple current calculation . . . . . . . . . . . . . . . . 12 Inductor design parameters . . . . . . . . . . . . . . 13 Core type selection . . . . . . . . . . . . . . . . . . . . . 14 Calculate windings . . . . . . . . . . . . . . . . . . . . . 14 Auxiliary winding count . . . . . . . . . . . . . . . . . . 15 Wire diameter selection . . . . . . . . . . . . . . . . . 15 Vcc generation dimensioning. . . . . . . . . . . . . . 16 Buffer capacitance C6 calculation: . . . . . . . . . 17 Demagnetization detection dimensioning . . . . 18 Power calculations . . . . . . . . . . . . . . . . . . . . . 19 Resistive switch dissipation . . . . . . . . . . . . . . 19 Capacitive switch dissipation . . . . . . . . . . . . . 19 Switching losses . . . . . . . . . . . . . . . . . . . . . . . 20 Freewheel diode losses . . . . . . . . . . . . . . . . . 21 Inductor losses . . . . . . . . . . . . . . . . . . . . . . . . 21 Resistive losses . . . . . . . . . . . . . . . . . . . . . . . 21 Proximity losses . . . . . . . . . . . . . . . . . . . . . . . 22 Core losses. . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Sense resistor losses. . . . . . . . . . . . . . . . . . . 24 Total system losses. . . . . . . . . . . . . . . . . . . . . 24 Current tolerance and stability . . . . . . . . . . . . 26 Current tolerance . . . . . . . . . . . . . . . . . . . . . . 26 Current stability. . . . . . . . . . . . . . . . . . . . . . . . 26 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Legal information. . . . . . . . . . . . . . . . . . . . . . . 28 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 23 June 2011 Document identifier: AN10876

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