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AN11007
Single stage 5-6 GHz WLAN LNA with BFU730F
Rev. 2 — 20 November 2012
Application note
document information
Info
Content
Keywords
BFU730F, LNA, 802.11a & 802.11n MIMO WLAN
Abstract
The document provides circuit, layout, BOM and performance information
on 5-6 GHz band LNA equipped with NXP’s BFU730F wide band
transistor.
This Application note is related to evaluation board
OM7691/BFU730F,598 12nC 934065628598
AN11007
NXP Semiconductors
5-6 GHz LNA
Revision history
Rev
Date
Description
1
20110104
Initial document.
2
20121120
Chapter added about switching time.
Contact information
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For sales office addresses, please send an email to: salesaddresses@nxp.com
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1. Introduction
The BFU730F is a discrete HBT that is produced using NXP Semiconductors’ advanced
110 GHz fT SiGe:C BiCmos process. SiGe:C is a normal silicon germanium process with
the addition of Carbon in the base layer of the NPN transistor. The presence of carbon in
the base layer suppresses the boron diffusion during wafer processing. This allows
steeper and narrower SiGe HBT base and a heavier doped base. As a result, lower base
resistance, lower noise and higher cut off frequency can be achieved.
The BFU730F is one of a series of transistors made in SiGe:C.
BFU710F; BFU760 and BFU790 are the other types, BFU710 is intended for ultra low
current applications. The BFU760F and BFU790F are high current types and are
intended for application where linearity is key.
The BFU7XXF are ideal in all kind of applications where cost matters. It also gives
design flexibility.
2. Requirements and design of the 5-6 GHz WLAN LNA
The circuit shown in this application note is intended to demonstrate the performance of
the BFU730 in a 5-6 GHz LNA for e.g. 802.11 & 802.11n “MIMO” WLAN applications.
Key requirements for this application as are:
• NF
• Gain
• Turn on turn of time
• Linearity.
The target for this circuit is listed in table 1.
Table 1.
Target spec.
Target specification of the 5-6GHz LNA.
Vcc
Icc
NF
Gain
IRL
ORL
3
10
<2
>15
>10
>10
V
mA
dB
dB
dB
dB
3. Design
The 5-6 GHz LNA consists of one stage BFU730F amplifier. For this amplifier 12 external
components are used, for matching, biasing and decoupling.
The design has been conducted using Agilent’s Advanced Design System (ADS). The
2D EM Momentum tool has been used to co simulate the PCB see Fig 1. Results are
given in paragraph 4.5.
The LNA shows a Gain of 14 dB @5.5 GHz, NF of 1.3 dB, with only 10 mA it shows a
high input P1 dB compression of –7.5 dBm, as well as a input IP3 of +10 dBm.
Finally the LNA is unconditional stable 10 MHz-20 GHz.
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3.1 BFU730F 5-6 GHz-ADS Simulation circuit
Fig 1.
ADS simulation circuit for 5-6 GHz WLAN LNA
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3.2 BFU730F 5-6 GHz - ADS Gain and match simulation results
Fig 2.
ADS Gain and match simulation results for 5-6 GHz WLAN LNA
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3.3 BFU730F 5-6 GHz-ADS NF simulation
Fig 3.
ADS Noise Figure simulation results of 5-6 GHz WLAN LNA
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3.4 BFU730F 5-6 GHz-ADS Stability simulation
As K≥1 and Mu≥1, the LNA is unconditionally stable for the whole frequency band
Fig 4.
ADS stability simulation results of 5-6 GHz WLAN LNA
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4. Implementation
4.1 Schematic
R2
R3
C4
GND
Vcc
GND
R1
L3
C3
C5
L2
RF_INPUT
RF_OUTPUT
R4
C2
L4
C6
C1
C7
L1
Fig 5.
5-6 GHz LNA schematic (019aab113)
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4.2 Layout and assembly
Fig 6.
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Layout and assembly info of 5-6 GHz LNA
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Table 2.
Bill of materials
Designator Description
Size
Q1
2X2 mm
BFU730F
PCB
Value
Type
Note
NXP Semiconductors
HBT
20X35 mm
C1,C7
Capacitor
0402
3.9 pF
MurataGRM1555
input/output
match
C2,C6
Capacitor
0402
0.75 pF
MurataGRM1555
input/output
match
C3
Capacitor
0402
15 nF
MurataGRM1555
C4
Capacitor
0402
1.5 pF
MurataGRM1555
C5
Capacitor
0402
1.5 pF
MurataGRM1555
L1,L4
Inductor
0402
1.5 nH
Murata LQP15
input/output
match
L2
Inductor
0402
9.1 nH
Murata LQW15
input match
L3
Inductor
0402
5.1 nH
Murata LQW15
output match
R1
Resistor
0402
37 K
Bias Setting
R2
Resistor
0402
100 Ohm
Bias Setting
Hfe and
Temp spread
cancellation
R3
Resistor
0402
10 Ohm
Stability
R4
Resistor
0402
0 Ohm
NA
X1,X2
SMA RF
connector
-
Johnson, End launch SMA
142-0701-841
RF input/ RF
output
X3
DC header
-
Molex, PCB header, Right
Angle, 1 row, 3 way 901210763
Bias
connector
4.3 PCB layout.
A good PCB Layout is an essential part of an RF circuit design. The EVB of the BFU730
can serve as a guideline for laying out a board using either the BFU730 or one of the
other SiGe.C HBTs in the SOT343F package. Use controlled impedance lines for all high
frequency inputs and outputs. Bypass VCC with decoupling capacitors, preferable located
as close as possible to the device. For long bias lines it may be necessary to add
decoupling capacitors along the line further away from the device. Proper grounding the
emitters is also essential for the performance. Either connect the emitters directly to the
ground plane ore through vias, or do both.
The material that has been used for the EVB is FR4 using the stack shown in Fig 7.
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(1) Material supplier is Isola Duraver; Er=4.6-4.9 Tδ=0.02
Fig 7.
PCB material stack
4.4 LNA View
Fig 8.
AN11007
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5-6 GHz LNA EVB
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4.5 Measurement results
Table 3.
Typical measurement results measured on the evaluation board.
Temp=25 °C, frequency is 5.5 GHz unless otherwise specified.
Parameter
Symbol
Value
Unit
Supply Voltage
Vcc
3
V
Supply Current
Icc
10
mA
Noise Figure
NF
1.3
dB
15.8
dB
14.7
dB
13.7
dB
[1]
5.0 GHz
Power Gain
5.5 GHz
GP
6.0 GHz
Input return Loss
IRL
12
dB
Output return Loss
ORL
13.5
dB
Input 1 dB Gain compression Point
Pi1dB
-7.5
dBm
Output 1 dB Gain compression Point
Po1dB
+6.5
dBm
Input third order intercept point
IP3i
+10
dBm
Output third order intercept point
IP3o
+24
dBm
Ton
160
µs
Toff
28
ns
Remarks
Power settling time
[1]
The NF and Gain figures are being measured at the SMA connectors of the evaluation board, so the
losses of the connectors and the PCB of approximately 0.1dB are not subtracted.
4.5.1 Faster switching time. <1 µs
If no switching speed is required in the application, the recommendation is to keep the
BOM as is presented in this application not. However if the LNA is applied in e.g. a
WLAN application where power settling time is required to be <1 µs, the value of C3
should be changed to 67pF. This will result in a Ton power settling time of 890ns and the
Toff power settling time stays 28ns. However this change in capacitor values will result in
about 5dB of degradation of the IP3 figures reported in Table 3
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4.5.2 Gain and match – typical results
Fig 9.
Gain and match measured values
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4.5.3 NF and Gain- typical values
(1) NF is measured at SMA connectors so no correction was done.
Fig 10. Typical NF curve
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4.5.4 Stability
Fig 11. Stability typical measurement results
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4.5.5 1dB compression point- typical values.
(1) Pi1dB=-7.4 dBm Po1dB=6.5 dBm
Fig 12. Typical 1 dB compression point curve.
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4.5.6 Linearity IP3 – typical values
(1) IP3o=-6.2+((66.7-6.2)/2)=+24 dBm; IP3i= -20 dBm+60.5/2=-20+30.25=+10.25
Fig 13. IM3 - typical values
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4.5.7 Power settling time
(1)
Curve1 is power supply; curve 2 is output of the detector diode.
Fig 14. ton Power on settling time
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(1) curve1 is power supply; curve 2 is de output of the detection diode.
Fig 15. toff Power off settling time
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5. Legal information
5.1 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
5.2 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability
towards customer for the products described herein shall be limited in
accordance with the Terms and conditions of commercial sale of NXP
Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Evaluation products — This product is provided on an “as is” and “with all
faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
and their suppliers expressly disclaim all warranties, whether express,
implied or statutory, including but not limited to the implied warranties of noninfringement, merchantability and fitness for a particular purpose. The entire
risk as to the quality, or arising out of the use or performance, of this product
remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers be
liable to customer for any special, indirect, consequential, punitive or
incidental damages (including without limitation damages for loss of
business, business interruption, loss of use, loss of data or information, and
the like) arising out the use of or inability to use the product, whether or not
based on tort (including negligence), strict liability, breach of contract, breach
of warranty or any other theory, even if advised of the possibility of such
damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors, its
affiliates and their suppliers and customer’s exclusive remedy for all of the
foregoing shall be limited to actual damages incurred by customer based on
reasonable reliance up to the greater of the amount actually paid by
customer for the product or five dollars (US$5.00). The foregoing limitations,
exclusions and disclaimers shall apply to the maximum extent permitted by
applicable law, even if any remedy fails of its essential purpose.
5.3 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are property of their respective owners.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
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6. List of figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10.
Fig 11.
Fig 12.
Fig 13.
Fig 14.
Fig 15.
ADS simulation circuit for 5-6 GHz WLAN LNA 4
ADS Gain and match simulation results for 5-6
GHz WLAN LNA ............................................... 5
ADS Noise Figure simulation results of 5-6 GHz
WLAN LNA........................................................ 6
ADS stability simulation results of 5-6 GHz
WLAN LNA........................................................ 7
5-6 GHz LNA schematic (019aab113) .............. 8
Layout and assembly info of 5-6 GHz LNA ....... 9
PCB material stack ......................................... 11
5-6 GHz LNA EVB .......................................... 11
Gain and match measured values .................. 13
Typical NF curve ............................................. 14
Stability typical measurement results .............. 15
Typical 1 dB compression point curve. ........... 16
IM3 - typical values ......................................... 17
ton Power on settling time ............................... 18
toff Power off settling time ............................... 19
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7. List of tables
Table 1.
Table 2.
Table 3.
Target spec. ...................................................... 3
Bill of materials................................................ 10
Typical measurement results measured on the
evaluation board. ............................................ 12
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8. Contents
1.
2.
3.
3.1
3.2
3.3
3.4
4.
4.1
4.2
4.3
4.4
4.5
4.5.1
4.5.2
4.5.3
4.5.4
4.5.5
4.5.6
4.5.7
5.
5.1
5.2
5.3
6.
7.
8.
Introduction ......................................................... 3
Requirements and design of the 5-6 GHz WLAN
LNA ....................................................................... 3
Design .................................................................. 3
BFU730F 5-6 GHz-ADS Simulation circuit ......... 4
BFU730F 5-6 GHz - ADS Gain and match
simulation results ............................................... 5
BFU730F 5-6 GHz-ADS NF simulation .............. 6
BFU730F 5-6 GHz-ADS Stability simulation ...... 7
Implementation .................................................... 8
Schematic .......................................................... 8
Layout and assembly ......................................... 9
PCB layout. ...................................................... 10
LNA View ......................................................... 11
Measurement results ........................................ 12
Faster switching time. <1 µs............................. 12
Gain and match – typical results ...................... 13
NF and Gain- typical values ............................. 14
Stability ............................................................ 15
1dB compression point- typical values. ............ 16
Linearity IP3 – typical values ............................ 17
Power settling time ........................................... 18
Legal information .............................................. 20
Definitions ........................................................ 20
Disclaimers....................................................... 20
Trademarks ...................................................... 20
List of figures..................................................... 21
List of tables ...................................................... 22
Contents ............................................................. 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in the section 'Legal information'.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 20 November 2012
Document identifier: AN11007