AN10800 Using the BLF578 in the 88 MHz to 108 MHz FM band Rev. 01 — 13 October 2009 Application note Document information Info Content Keywords BLF578, performance, high-efficiency tuning set-up, high voltage LDMOS, amplifier implementation, Class-C CW, FM band, pulsed power Abstract This application note describes the design and the performance of the BLF578 for Class-C CW and FM type applications in the 88 MHz to 108 MHz frequency range. The major aim has been to illustrate tuning set-up performance which targets very high-efficiency operation at reduced output power AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band Revision history Rev Date Description 01 20091013 Initial version Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 2 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 1. Introduction The BLF578 is a new, 50 V, push-pull transistor using NXP Semiconductors’ 6th generation of high voltage LDMOS technology. The two push-pull sections of the device are completely independent of each other inside the package. The gates of the device are internally protected by the integrated ElectroStatic Discharge (ESD) diode. The device is unmatched and is designed for use in applications below 600 MHz where very high power and efficiency are required. Typical applications are FM/VHF broadcast, laser or Industrial Scientific and Medical (ISM) applications. Great care has been taken during the design of the high voltage process to ensure that the device achieves high ruggedness. This is a critical parameter for successful broadcast operations. The device can withstand greater than a 10:1 VSWR for all phase angles at full operating power. Another design goal was to minimize the size of the application circuit. This is important in that it allows amplifier designers to maximize the power in a given amplifier size. The design highlighted in this application note achieves over 1 kW in the 88 MHz to 108 MHz band in a space smaller than 50.8 mm × 101.6 mm (2 ” × 4 ”). The circuit only needs to be as wide as the transistor itself, enabling transistor mounting in the final amplifier to be as close as physically possible while still providing adequate room for the circuit implementation. This application note describes the design and the performance of the BLF578 for Class-C CW and FM type applications in the 88 MHz to 108 MHz frequency band. It must be noted that the device is very powerful and more than 1200 W of pulsed power has been generated at 225 MHz. This application note describes tuning set-up performance which targets very high-efficiency operation at somewhat reduced output powers. AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 3 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 2. Circuit diagrams and PCB layout 2.1 Circuit diagrams C8 C10 C12 R14 A C6 T1 B1 C7 Q3 C3 C15 RF in T2 C9 C11 C13 R13 R10 V bias in L1 B R15 R3 R2 R5 Q1 C1 C5 C2 R8 R1 D1 R6 R4 R12 R11 R7 Q2 R9 C14 C4 001aak522 Fig 1. BLF578 input circuit; 88 MHz to 108 MHz C16 C18 Q3 T4 C19 C20 T3 B2 C21 C24 RF out L2 C17 C22 C23 C25 Vd in + 001aak523 Fig 2. BLF578 output circuit; 88 MHz to 108 MHz AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 4 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 2.2 Bill Of Materials Table 1. Bill of materials for BLF578 input and output circuits PCB material: Taconic RF35; εr = 3.5; thickness 0.76 mm (30 mil). Figure 4 shows the BLF578 PCB layout. Designator Description Part number Manufacturer A/B connect jumper wire between points A and B - - B1 7.7 ” 086-50 semirigid through ferrite[1] BN-61-202 Amidon B2 6 ” 141-50 flexible coax cable - - C1, C2, C14 100 nF ceramic chip capacitor S0805W104K1HRN-P4 Multicomp C3 43 pF ceramic chip capacitor ATC100B430JT500X American Technical Ceramics C4, C5, C10, C11 1 µF ceramic chip capacitor GRM31MR71H105K88L MuRata C6, C7 4700 pF ceramic chip capacitor ATC700B472JT50X American Technical Ceramics C8, C9 10 µF ceramic chip capacitor GRM32ER7YA106K88L MuRata C12, C13 100 nF ceramic chip capacitor GRM21BR72A104K MuRata C15 620 pF ceramic chip capacitor ATC100B621JT500X American Technical Ceramics C16, C17 390 pF ceramic chip capacitor ATC100B391JT500X American Technical Ceramics C18, C19, C22 100 nF ceramic chip capacitor GRM32DR72E104KW01L MuRata C20, C21, C23 2.2 µF ceramic chip capacitor GRM32ER72A22KA35LX MuRata C24 18 pF ceramic chip capacitor ATC100B180JT500X American Technical Ceramics C25 1000 µF, 100 V electrolytic capacitor EEV-TG1V102M American Technical Ceramics D1 0805 Green SMT LED APT2012CGCK KingBright L1 ferroxcube bead 2743019447 Fair Rite L2 3 turns 14 gauge wire, ID = 0.310 ” - - Microstrip all microstrip sections [2] Vishay Dale Q1 7808 voltage regulator NJM#78L08UA-ND NJR Q2 SMT NPN transistor PMBT2222 NXP Semiconductors Q3 BLF578 BLF578 NXP Semiconductors R1 200 Ω potentiometer 3214W-1-201E Panasonic R2, R3 432 Ω resistor CRCW0805432RFKEA Bourns R4 2 kΩ resistor CRCW08052K00FKTA Vishay Dale R5 75 Ω resistor CRCW080575R0FKTA Vishay Dale R6, R8 1.1 kΩ resistor CRCW08051K10FKEA Vishay Dale R7 11 kΩ resistor CRCW080511K0FKEA Vishay Dale R9 5.1 Ω resistor CRCW08055R1FKEA Vishay Dale R10 499 Ω, 1⁄4 W resistor CRCW2010499RFKEF Vishay Dale R11 5.1 kΩ resistor CRCW08055K10FKTA Vishay Dale R12 910 Ω resistor CRCW0805909RFKTA Vishay Dale R13, R14, R15 9.1 Ω resistor CRCW08059R09FKEA Vishay Dale T1, T2 2.5 ” 062-18 semirigid through ferrite[1] BN-61-202 Amidon T3, T4 4 ” 120-22 flexible coax cable - - [1] The semirigid cable length is defined in Figure 3. AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 5 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band [2] Contact your local NXP Semiconductors’ salesperson for copies of the PCB layout files. semirigid cable length 001aak524 Fig 3. Cable length definition AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 6 of 23 xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x 2.3 BLF578 PCB layout Q3 C8 C3 C12 C6 R14 A C16 C10 C7 T1 C18 C24 B1 C15 R1 C19 T2 C20 R5 C13 R2 R13 C21 R3 R6 C17 L2 Q1 C25 R12 D1 C1 R15 L1 C2 R8 R10 R7 C5 C11 C9 R9 BLF574(1) input-rev 3 30RF35 C22 Q2 R11 C23 T3 C14 BLF574(1) output-rev 3 30RF35 001aak525 BLF578 PCB layout AN10800 7 of 23 © NXP B.V. 2009. All rights reserved. Fig 4. Using the BLF578 in the 88 MHz to 108 MHz FM band Rev. 01 — 13 October 2009 C4 R4 NXP Semiconductors AN10800_1 Application note B2 T4 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 2.4 PCB form factor Care has been taken to minimize board space for the design. Figure 5 shows how 1000 W can be generated in a space only as wide as the transistor itself. 001aak526 Fig 5. Photograph of the BLF578 circuit board 3. Amplifier design 3.1 Mounting considerations To ensure good thermal contact, a heatsink compound (such as Dow Corning 340) should be used when mounting the BLF578 in the SOT539A package to the heatsink. Improved thermal contact is obtainable when the devices are soldered on to the heatsink. This lowers the junction temperature at high operating power and results in slightly better performance. When greasing the part down, care must be taken to ensure that the amount of grease is kept to an absolute minimum. The NXP Semiconductors’ website can be consulted for application notes on the recommended mounting procedure for this type of device. 3.2 Bias circuit A temperature compensated bias circuit is used and comprises the following: An 8 V voltage regulator (Q1) supplies the bias circuit. The temperature sensor (Q2) must be mounted in good thermal contact with the device under test (Q3). The quiescent current is set using a potentiometer (R1). The gate voltage correction is approximately −4.8 mV/°C to −5.0 mV/°C. The VGS range is also reduced using a resistor (R2). AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 8 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band The −2.2 mV/°C at its base is generated by Q2. This is then multiplied up by the R11 : R12 ratio for a temperature slope (i.e. approximately −15 mV/°C). The multiplication function provided by the transistor is the reason it is used rather than a diode. A portion of the −15 mV/°C is summed into the potentiometer (R1). The amount of temperature compensation is set by resistor R4. The ideal value proved to be 2 kΩ. The values of R9, R13 and R14 are not important for temperature compensation. However, they are used for baseband stability and to improve IMD asymmetry at lower power levels. 3.3 Amplifier alignment There are several points in the circuit that allow performance parameters to be readily traded off against one another. In general, the following areas of the circuit have the most impact on the circuit performance. Effect of changing the output capacitors (C16 and C17): • This is a key tuning point in the circuit. This point has the strongest influence on the trade-off between efficiency and output power at 1 dB gain compression (PL(1dB)). Changing the frequency band: • A demonstration was done with the BLF578, but the frequency of operation was higher, at 128 MHz. Table 2 shows how the capacitors and baluns were modified to raise the frequency. This table can be used as a guide if the desired frequency band were to be lower as well, by making equivalent changes in the opposite direction. Table 2. Increasing the operating frequency Component 88 MHz to 108 MHz 128 MHz Capacitors connected to the FET drains 0 pF 18 pF C16, C17 390 pF 180 pF with 100 pF Capacitors connected to output 18 pF balun, C24 152.4 mm (6 ”) 50 Ω Output balun, B2 20 pF 101.6 mm (4 ”) 50 Ω The high efficiency tuning set-up can be traded off against the PL(1dB) tuning set-up as indicated in Table 3. Table 3. High-efficiency tuning set-up and PL(1dB) tuning set-up trade-off Component High-efficiency tuning set-up High PL(1dB) tuning set-up Capacitors connected to the FET drains 24 pF not placed C24 24 pF 18 pF AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 9 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band Table 4. Tuned efficiency and power performance Frequency 43 V[1] (MHz) High-efficiency High tuning set-up PL(1dB) tuning set-up 50 V[2] High-efficiency tuning set-up High PL(1dB) tuning set-up 88 3.3 dB 2.6 dB - - 98 2.5 dB 1.8 dB - - 108 2.0 dB 1.5 dB - - Efficiency at 800 W 88 80 % 78 % - - 98 80 % 77 % - - 108 81 % 78 % - - 88 - - 2.6 dB 1.0 dB 98 - - 1.2 dB 0.5 dB 108 - - 0.8 dB 0.3 dB Parameter Compression at 800 W Compression at 1 kW Efficiency at 1 kW 88 - - 75 % 77 % 98 - - 77 % 75 % 108 - - 78 % 76 % [1] In the 43 V case, the high-efficiency tuning set-up gets an extra 3 % efficiency at the expense of between 0.5 dB and 0.7 dB in compression performance. [2] In the 50 V case, trading in 2 % efficiency lessens the compression by more than 0.5 dB at 1 kW. 4. RF performance characteristics 4.1 Continuous wave This application explores two possible tuning compromises: • high-efficiency 43 V, 800 W • high PL(1dB), 50 V 1 kW A summary of the results for these tuning set-ups is shown in Table 5 and Table 6. Table 5. High-efficiency tuning set-up: 43 V, 800 W This table summarizes the performance of the high-efficiency tuning set-up at IDq = 200 mA and Th = 25 °C. Frequency (MHz) PL (W) G (dB) η (%) 88 800 24.1 81 98 800 24.8 80 108 800 25.5 81 AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 10 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band Table 6. PL(1dB) tuning set-up: 50 V, 1 kW This table summarizes the performance of the high PL(1dB) tuning set-up at IDq = 50 mA and Th = 25 °C. Frequency (MHz) PL (W) G (dB) η (%) 88 1000 26.5 77 98 1000 26.8 75 108 1000 26.3 75.5 4.2 Continuous wave graphics Figure 6 to Figure 11 illustrate the behavior and performance of the different tuning set-ups at the various supply voltages. The boards are tuned over a range of output powers and the relevant performance measurements are shown over the power range at low, middle and high frequencies. 001aak527 32 (1) (2) (3) GP (dB) ηD (%) ηD GP 28 90 70 (1) (2) (3) 24 50 20 30 16 0 200 400 10 800 600 PL(1dB) (W) VDD = 43 V; IDq = 200 mA. (1) 88 MHz. (2) 98 MHz. (3) 108 MHz. Fig 6. Typical CW data for the 43 V high-efficiency tuning set-up; 88 MHz to 108 MHz Figure 7 and Figure 8 show the gain and drain efficiency performance differences between the high-efficiency and high PL(1dB) tuning set-ups for the VDD = 43 V (bias condition). The difference in gain and drain efficiency between the two types of tuning set-up for a 50 V supply (VDD = 50 V) is shown in Figure 9 and Figure 10. AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 11 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 001aak528 30 G (dB) 28 (1) (2) (3) (4) (5) (6) 26 24 22 0 200 400 600 800 PL(1dB) (W) VDD = 43 V; IDq = 200 mA. (1) 88 MHz high PL(1dB). (2) 98 MHz high PL(1dB). (3) 108 MHz high PL(1dB). (4) 88 MHz high-efficiency. (5) 98 MHz high-efficiency (6) 108 MHz high-efficiency. Fig 7. Gain comparison: 43 V, high-efficiency to high PL(1dB) tuning set-up 001aak529 90 ηD (%) 70 (1) (2) (3) (4) (5) (6) 50 30 10 0 200 400 600 800 PL(1dB) (W) VDD = 43 V; IDq = 200 mA. (1) 88 MHz high PL(1dB). (2) 98 MHz high PL(1dB). (3) 108 MHz high PL(1dB). (4) 88 MHz high-efficiency. (5) 98 MHz high-efficiency. (6) 108 MHz high-efficiency. Fig 8. Efficiency comparison: 43 V, high-efficiency to high PL(1dB) tuning set-ups AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 12 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 001aak530 29 G (dB) 27 (1) (2) (3) (4) (5) (6) 25 23 21 0 200 400 600 800 1000 PL(1dB) (W) VDD = 50 V; IDq = 50 mA. (1) 88 MHz high PL(1dB). (2) 98 MHz high PL(1dB). (3) 108 MHz high PL(1dB). (4) 88 MHz high-efficiency. (5) 98 MHz high-efficiency. (6) 108 MHz high-efficiency. Fig 9. Gain comparison: 50 V, high-efficiency to high PL(1dB) tuning set-ups 001aak531 90 ηD (%) (4) (5) (6) 70 (1) (2) (3) 50 30 10 0 200 400 600 800 1000 PL(1dB) (W) VDD = 50 V; IDq = 50 mA. (1) 88 MHz high PL(1dB). (2) 98 MHz high PL(1dB). (3) 108 MHz high PL(1dB). (4) 88 MHz high-efficiency. (5) 98 MHz high-efficiency. (6) 108 MHz high-efficiency. Fig 10. Efficiency comparison: 50 V, high-efficiency to high PL(1dB) tuning set-ups AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 13 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band Table 7 shows the Input Return Loss (IRL) over the three frequencies for the high PL(1dB) tuning set-ups at 50 V. Table 7. Input return loss for the high PL(1dB) tuning set-up This table summarizes the input return loss of the high PL(1dB) tuning set-up at IDq = 50 mA and Th = 25 °C. Frequency (MHz) Output power (W) Input return loss (dB) 88 1000 −11 98 1000 −17 108 1000 −14 Figure 11 shows the 2nd and 3rd harmonic levels of the circuit. It can be seen from examining the 2nd harmonics that the push-pull action provides good cancellation. In addition, negligible power is present in the 2nd and 3rd harmonics, so that the power out of the circuit can be considered to be in the fundamental. 001aak532 0 α2H (dBc) 0 α3H (dBc) −10 −10 (1) (2) (3) α3H −20 −20 α2H −30 −30 (1) (2) (3) −40 0 200 400 600 −40 1000 800 PL(1dB) (W) VDD = 50 V; IDq = 50 mA. (1) 88 MHz. (2) 98 MHz. (3) 108 MHz. Fig 11. Second and third order harmonics as a function of output power against frequency AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 14 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 5. Input and output impedance The BLF578 input and output impedances are given in Table 8. These are generated from a first order equivalent circuit of the device and can be used to get the first-pass matching circuits. Table 8. Input and output impedance per section Frequency (MHz) Input Output Zi Zo 25 1.176 −j13.262 1.697 −j0.060 50 1.176 −j6.617 1.688 −j0.120 75 1.176 −j4.395 1.674 −j0.178 100 1.176 −j3.280 1.654 −j0.234 125 1.176 −j2.607 1.630 −j0.288 150 1.176 −j2.155 1.600 −j0.338 175 1.177 −j1.830 1.567 −j0.385 200 1.177 −j1.583 1.531 −j0.427 225 1.177 −j1.390 1.491 −j0.466 250 1.178 −j1.233 1.449 −j0.500 275 1.178 −j1.103 1.406 −j0.531 300 1.178 −j0.993 1.361 −j0.556 325 1.179 −j0.898 1.316 −j0.578 350 1.179 −j0.816 1.270 −j0.596 375 1.180 −j0.743 1.225 −j0.610 400 1.180 −j0.678 1.179 −j0.620 425 1.181 −j0.620 1.135 −j0.627 450 1.181 −j0.567 1.091 −j0.631 475 1.182 −j0.519 1.048 −j0.632 500 1.183 −j0.474 1.007 −j0.631 The convention for these impedances is shown in Figure 12. They indicate the impedances looking into half the device. Zo Zi 001aak541 Fig 12. Impedance convention AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 15 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 6. Base plate drawings 6.1 Input base plate P O F E Q M (2×) D N C (4×) (2×) B A A H I A G K A B L Unit A mm 0 C Unit O P Q mm 8 44.32 5.6 D J engraved letter "M" E F G H I J K L 10.922 37.211 45.847 65.278 76.200 6.350 9.068 12.573 71.120 3.505 6.223 M N 9 M2 001aak566 Fig 13. Input base plate drawing AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 16 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 6.2 Device insert M S D O C N (2×) P (2×) (2×) Q T B R A A A E F A G H A I J K A L U V engraved letter "M" Unit A mm 0 Unit mm O B C D E F G H I J K L 10.922 65.278 76.200 6.350 11.328 5.156 10.312 4.978 11.328 10.185 1.143 P Q R 72.644 59.309 23.749 3.556 S T 3.5 M2.5 U M N 8 M5(1) V 0.254 10.058 001aak567 (1) +0.5 mm. Fig 14. Device insert drawing AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 17 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 6.3 Output base plate O N F E L D M C (4×) (2×) B A A H I A G K A Unit A mm 0 B Unit N O mm 8 21 C D J engraved letter "M" E F G 10.922 37.211 45.847 65.278 76.200 6.350 H I J K 9.068 12.573 71.120 3.505 L M M5 M2 001aak568 Fig 15. Output base plate drawing 7. Reliability At first glance, it would seem that great strains would be put on a single device running at 800 W or even 1 kW of output power. Careful consideration to the die layout has helped minimize these stresses, resulting in very reliable performance. Time-to-Failure (TTF) is defined as the expected time elapsed until 0.1 % of the devices of a sample size fail. This is different from Mean-Time-to-Failure (MTBF), where half the devices would have failed and is orders of magnitude are shorter. The predominant failure mode for LDMOS devices is electromigration. The TTF for this mode is primarily dependant on junction temperature (Tj). Once the device junction temperature is measured and an in-depth knowledge is obtained for the average operating current for the application, the TTF can be calculated using Figure 16 and the related procedure. AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 18 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 7.1 Calculating TTF The first step is use the thermal resistance (Rth) of the device to calculate the junction temperature. The Rth from the junction to the device flange for the BLF578 is 0.145 K/W. If the device is soldered down to the heatsink, this same value can be used to determine Tj. If the device is greased down to the heatsink, the Rth(j-h) value becomes 0.3 K/W, as the thermal resistivity for the grease layer from the flange to the heatsink is approximately 0.15 K/W. Example: Assuming the device is running at 1 kW with the RF output power at 75 % efficiency on a heatsink (e.g. 40 °C). Tj can be determined based on the operating efficiency for the given heatsink temperature: • Dissipated power (Pd) = 333 W • Temperature rise (Tr) = Pd × Rth = 333 W × (0.3 °C/W) = 100 °C • Junction temperature (Tj) = Th + Tr = 40 °C + 100 °C = 140 °C Based on this, the TTF can be estimated using a device greased-down heatsink as follows: • The operating current is just above 26.5 A • Tj = 140 °C The curve in Figure 16 intersects the x-axis at 27 A. At this point, it can be estimated that it would take 80 years for 0.1 % of the devices to fail. AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 19 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 001aak550 105 TTF (y) 104 103 (1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) 102 10 1 0 10 20 30 40 50 II (A) (1) Tj = 100 °C. (2) Tj = 110 °C. (3) Tj = 120 °C. (4) Tj = 130 °C. (5) Tj = 140 °C. (6) Tj = 150 °C. (7) Tj = 160 °C. (8) Tj = 170 °C. (9) Tj = 180 °C. (10) Tj = 190 °C. (11) Tj = 200 °C. Fig 16. BLF578 time-to-failure AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 20 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 8. Test configuration block diagram SIGNAL GENERATOR SMIQ 03 SPECTRUM ANALYZER Rhode & Schwarz FSEB POWER METER E4419B POWER SENSOR HP8481A SPINNER SWITCH 3 dB PAD COUPLER HP778D RF COAXIAL ATTENUATOR Tenuline 30 dB 1 kW DUT DUAL COAXIAL DIRECTIONAL COUPLER Narda 3020A 10 dB PAD RF FILTER Bird 220 MHz POWER SENSOR HP8481A 001aak556 DRIVER AMPLIFIER Ophir 5127 Fig 17. BLF578 test configuration 9. PCB layout diagrams Please contact your local NXP Semiconductors’ salesperson for copies of the PCB layout files. 10. Abbreviations Table 9. Abbreviations Acronym Description CW Continuous Wave ESD ElectroStatic Discharge FM Frequency Modulation IMD InterModulation Distortion IRL Input Return Loss LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor PAR Peak-to-Average power Ratio PCB Printed-Circuit Board SMT Surface Mount Technology VHF Very High Frequency VSWR Voltage Standing Wave Ratio AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 21 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 11. Legal information 11.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 11.2 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 11.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. AN10800_1 Application note © NXP B.V. 2009. All rights reserved. Rev. 01 — 13 October 2009 22 of 23 AN10800 NXP Semiconductors Using the BLF578 in the 88 MHz to 108 MHz FM band 12. Figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. BLF578 input circuit; 88 MHz to 108 MHz . . . . . . .4 BLF578 output circuit; 88 MHz to 108 MHz . . . . . .4 Cable length definition . . . . . . . . . . . . . . . . . . . . . .6 BLF578 PCB layout . . . . . . . . . . . . . . . . . . . . . . . .7 Photograph of the BLF578 circuit board . . . . . . . .8 Typical CW data for the 43 V high-efficiency tuning set-up; 88 MHz to 108 MHz . . . . . . . . . . .11 Gain comparison: 43 V, high-efficiency to high PL(1dB) tuning set-up. . . . . . . . . . . . . . . . .12 Efficiency comparison: 43 V, high-efficiency to high PL(1dB) tuning set-ups . . . . . . . . . . . . . . . .12 Gain comparison: 50 V, high-efficiency to high PL(1dB) tuning set-ups . . . . . . . . . . . . . . . . . . . . . 13 Fig 10. Efficiency comparison: 50 V, high-efficiency to high PL(1dB) tuning set-ups. . . . . . . . . . . . . . . . 13 Fig 11. Second and third order harmonics as a function of output power against frequency. . . . . 14 Fig 12. Impedance convention . . . . . . . . . . . . . . . . . . . . 15 Fig 13. Input base plate drawing . . . . . . . . . . . . . . . . . . . 16 Fig 14. Device insert drawing . . . . . . . . . . . . . . . . . . . . . 17 Fig 15. Output base plate drawing. . . . . . . . . . . . . . . . . . 18 Fig 16. BLF578 time-to-failure . . . . . . . . . . . . . . . . . . . . . 20 Fig 17. BLF578 test configuration . . . . . . . . . . . . . . . . . . 21 13. Contents 1 2 2.1 2.2 2.3 2.4 3 3.1 3.2 3.3 4 4.1 4.2 5 6 6.1 6.2 6.3 7 7.1 8 9 10 11 11.1 11.2 11.3 12 13 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Circuit diagrams and PCB layout . . . . . . . . . . . 4 Circuit diagrams . . . . . . . . . . . . . . . . . . . . . . . . 4 Bill Of Materials . . . . . . . . . . . . . . . . . . . . . . . . 5 BLF578 PCB layout . . . . . . . . . . . . . . . . . . . . . 7 PCB form factor . . . . . . . . . . . . . . . . . . . . . . . . 8 Amplifier design. . . . . . . . . . . . . . . . . . . . . . . . . 8 Mounting considerations. . . . . . . . . . . . . . . . . . 8 Bias circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Amplifier alignment . . . . . . . . . . . . . . . . . . . . . . 9 RF performance characteristics . . . . . . . . . . . 10 Continuous wave . . . . . . . . . . . . . . . . . . . . . . 10 Continuous wave graphics . . . . . . . . . . . . . . . 11 Input and output impedance. . . . . . . . . . . . . . 15 Base plate drawings . . . . . . . . . . . . . . . . . . . . 16 Input base plate . . . . . . . . . . . . . . . . . . . . . . . 16 Device insert . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Output base plate . . . . . . . . . . . . . . . . . . . . . . 18 Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Calculating TTF . . . . . . . . . . . . . . . . . . . . . . . 19 Test configuration block diagram. . . . . . . . . . 21 PCB layout diagrams . . . . . . . . . . . . . . . . . . . . 21 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 13 October 2009 Document identifier: AN10800_1