PMDT670UPE 20 V, 550 mA dual P-channel Trench MOSFET

SO
T6
66
PMDT670UPE
20 V, 550 mA dual P-channel Trench MOSFET
Rev. 1 — 13 September 2011
Product data sheet
1. Product profile
1.1 General description
Dual P-channel enhancement mode Field-Effect Transistor (FET) in an ultra small and flat
lead SOT666 Surface-Mounted Device (SMD) plastic package using Trench MOSFET
technology.
1.2 Features and benefits
 Very fast switching
 ESD protection up to 2 kV
 Trench MOSFET technology
 AEC-Q101 qualified
1.3 Applications
 Relay driver
 High-side loadswitch
 High-speed line driver
 Switching circuits
1.4 Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj = 25 °C
-
-
-20
V
VGS
gate-source voltage
ID
drain current
Per transistor
VGS = -4.5 V; Tamb = 25 °C
[1]
-8
-
8
V
-
-
-550
mA
-
0.67
0.85
Ω
Static characteristics (per transistor)
RDSon
[1]
drain-source on-state
resistance
VGS = -4.5 V; ID = -400 mA; Tj = 25 °C
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm2.
PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
2. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
S1
source TR1
2
G1
gate TR1
3
D2
drain TR2
4
S2
source TR2
5
G2
gate TR2
6
D1
drain TR1
Simplified outline
6
5
Graphic symbol
D2
D1
4
G1
1
2
G2
3
SOT666
S1
S2
017aaa260
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PMDT670UPE
-
plastic surface-mounted package; 6 leads
SOT666
4. Marking
Table 4.
Marking codes
Type number
Marking code
PMDT670UPE
AG
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Tj = 25 °C
-
-20
V
-8
8
V
Per transistor
VDS
drain-source voltage
VGS
gate-source voltage
ID
drain current
VGS = -4.5 V; Tamb = 25 °C
[1]
-
-550
mA
VGS = -4.5 V; Tamb = 100 °C
[1]
-
-350
mA
-
-2.2
A
[2]
-
330
mW
[1]
-
390
mW
-
1090
mW
-
500
mW
IDM
peak drain current
Tamb = 25 °C; single pulse; tp ≤ 10 µs
Ptot
total power dissipation
Tamb = 25 °C
Tsp = 25 °C
Per device
total power dissipation
Tj
junction temperature
-55
150
°C
Tamb
ambient temperature
-55
150
°C
PMDT670UPE
Product data sheet
Tamb = 25 °C
[2]
Ptot
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Rev. 1 — 13 September 2011
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PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
Table 5.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Tstg
storage temperature
Conditions
Min
Max
Unit
-65
150
°C
Source-drain diode
source current
IS
Tamb = 25 °C
[1]
-
-370
mA
HBM
[3]
-
2000
V
ESD maximum rating
electrostatic discharge voltage
VESD
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm2.
[2]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
[3]
Measured between all pins.
017aaa123
120
Pder
(%)
Ider
(%)
80
80
40
40
0
−75
Fig 1.
017aaa124
120
−25
25
75
125
Tj (°C)
Normalized total power dissipation as a
function of junction temperature
PMDT670UPE
Product data sheet
0
−75
175
Fig 2.
−25
25
75
125
175
Tj (°C)
Normalized continuous drain current as a
function of junction temperature
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Rev. 1 — 13 September 2011
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3 of 16
PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
017aaa373
–10
ID
(A)
Limit RDSon = VDS/ID
–1
(1)
(2)
–10–1
(3)
(4)
(5)
–10–2
–10–1
–1
–10
–102
VDS (V)
IDM = single pulse
(1) tp = 1 ms
(2) tp = 10 ms
(3) DC; Tsp = 25 °C
(4) tp = 100 ms
(5) DC; Tamb = 25 °C; drain mounting pad 1 cm2
Fig 3.
Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source
voltage
6. Thermal characteristics
Table 6.
Thermal characteristics
Symbol
Parameter
Conditions
thermal resistance
from junction to
ambient
in free air
thermal resistance
from junction to
ambient
in free air
Min
Typ
Max
Unit
[1]
-
-
250
K/W
[1]
-
330
380
K/W
[2]
-
280
320
K/W
-
-
115
K/W
Per device
Rth(j-a)
Per transistor
Rth(j-a)
Rth(j-sp)
thermal resistance
from junction to solder
point
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and mounting pad for drain 1 cm2.
PMDT670UPE
Product data sheet
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Rev. 1 — 13 September 2011
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4 of 16
PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
017aaa064
103
duty cycle = 1
Zth(j-a)
(K/W)
0.75
0.5
102
0.33
0.25
0.2
0.1
0.05
0
0.02
0.01
10
1
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, standard footprint
Fig 4.
TR2: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
017aaa065
103
Zth(j-a)
(K/W)
duty cycle = 1
0.75
0.5
102
0.25
0.33
0.2
0.1
0.05
0
0.02
0.01
10
1
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, mounting pad for drain 1 cm2
Fig 5.
TR2: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PMDT670UPE
Product data sheet
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Rev. 1 — 13 September 2011
© NXP B.V. 2011. All rights reserved.
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PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
7. Characteristics
Table 7.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics (per transistor)
V(BR)DSS
drain-source
breakdown voltage
ID = -250 µA; VGS = 0 V; Tj = 25 °C
-20
-
-
V
VGSth
gate-source threshold
voltage
ID = -250 µA; VDS = VGS; Tj = 25 °C
-0.5
-0.8
-1.3
V
IDSS
drain leakage current
VDS = -20 V; VGS = 0 V; Tj = 25 °C
-
-
-1
µA
VDS = -20 V; VGS = 0 V; Tj = 150 °C
-
-
-10
µA
IGSS
gate leakage current
VGS = 8 V; VDS = 0 V; Tj = 25 °C
-
-
-2
µA
VGS = -8 V; VDS = 0 V; Tj = 25 °C
-
-
-2
µA
VGS = 4.5 V; VDS = 0 V; Tj = 25 °C
-
-
-0.5
µA
RDSon
gfs
drain-source on-state
resistance
forward
transconductance
VGS = -4.5 V; VDS = 0 V; Tj = 25 °C
-
-
-0.5
µA
VGS = -4.5 V; ID = -400 mA; Tj = 25 °C
-
0.67
0.85
Ω
VGS = -4.5 V; ID = -400 mA; Tj = 150 °C
-
1.1
1.4
Ω
VGS = -2.5 V; ID = -200 mA; Tj = 25 °C
-
1.2
1.5
Ω
VGS = -1.8 V; ID = -10 mA; Tj = 25 °C
-
1.8
2.8
Ω
VDS = -10 V; ID = -200 mA; Tj = 25 °C
-
610
-
mS
-
0.76
1.14
nC
-
0.28
-
nC
-
0.18
-
nC
-
58
87
pF
-
21
-
pF
-
12
-
pF
-
18
36
ns
Dynamic characteristics (per transistor)
QG(tot)
total gate charge
QGS
gate-source charge
QGD
gate-drain charge
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer
capacitance
td(on)
turn-on delay time
VDS = -10 V; ID = -400 mA;
VGS = -4.5 V; Tj = 25 °C
VDS = -10 V; f = 1 MHz; VGS = 0 V;
Tj = 25 °C
VDS = -10 V; RL = 250 Ω; VGS = -4.5 V;
RG(ext) = 6 Ω; Tj = 25 °C
tr
rise time
-
30
-
ns
td(off)
turn-off delay time
-
80
160
ns
tf
fall time
-
72
-
ns
-0.48
-0.84
-1.2
V
Source-drain diode (per transistor)
VSD
source-drain voltage
PMDT670UPE
Product data sheet
IS = -300 mA; VGS = 0 V; Tj = 25 °C
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PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
017aaa363
-0.5
-4.5 V
ID
(A)
-2.5 V
-2.0 V
017aaa364
-10-3
ID
(A)
-0.4
VGS = -1.8 V
-10-4
-0.3
(1)
(3)
(2)
-1.6 V
-0.2
-10-5
-1.4 V
-0.1
0.0
0
-1
-2
-3
VDS (V)
-4
-10-6
0.0
Tj = 25 °C
-0.5
-1.0
VGS (V)
-1.5
Tj = 25 °C; VDS = -5 V
(1) minimum values
(2) typical values
(3) maximum values
Fig 6.
Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 7.
017aaa365
4
RDSon
(Ω)
(2)
(1)
Sub-threshold drain current as a function of
gate-source voltage
017aaa366
4
RDSon
(Ω)
(3)
3
3
2
2
(4)
1
(1)
1
(5)
(2)
0
0.0
-0.1
-0.2
-0.3
-0.4
ID (A)
0
-0.5
0
-1
Tj = 25 °C
ID = -400 mA
(1) VGS = -1.5 V
(1) Tj = 150 °C
(2) VGS = -1.8 V
(2) Tj = 25 °C
-2
-3
-4
VGS (V)
-5
(3) VGS = -2.0 V
(4) VGS = -2.5 V
(5) VGS = -4.5 V
Fig 8.
Drain-source on-state resistance as a function
of drain current; typical values
PMDT670UPE
Product data sheet
Fig 9.
Drain-source on-state resistance as a function
of gate-source voltage; typical values
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PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
017aaa367
-0.5
ID
(A)
017aaa368
2.0
a
-0.4
1.5
-0.3
1.0
-0.2
(2)
(1)
0.5
-0.1
0.0
0.0
-0.5
-1.0
-1.5
VGS (V)
-2.0
0.0
-60
0
60
120
Tj (°C)
180
VDS > ID × RDSon
(1) Tj = 25 °C
(2) Tj = 150 °C
Fig 10. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
017aaa369
-1.5
Fig 11. Normalized drain-source on-state resistance as
a function of ambient temperature; typical
values
017aaa370
102
(1)
(1)
VGS(th)
(V)
C
(pF)
(2)
-1.0
(3)
(2)
10
(3)
-0.5
0.0
-60
0
60
120
Tj (°C)
180
1
-10-1
-1
ID = -0.25 mA; VDS = VGS
f = 1 MHz; VGS = 0 V
(1) maximum values
(1) Ciss
(2) typical values
(2) Coss
(3) minimum values
(3) Crss
Fig 12. Gate-source threshold voltage as a function of
junction temperature
PMDT670UPE
Product data sheet
-10
VDS (V)
-102
Fig 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
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PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
017aaa371
-5
VDS
VGS
(V)
-4
ID
VGS(pl)
-3
VGS(th)
-2
VGS
QGS1
QGS2
QGS
-1
QGD
QG(tot)
017aaa137
0
0.0
0.2
0.4
0.6
QG (nC)
0.8
ID = -0.4 A; VDD = -10 V; Tamb = 25 °C
Fig 14. Gate-source voltage as a function of gate
charge; typical values
Fig 15. Gate charge waveform definitions
017aaa372
-0.5
IS
(A)
-0.4
-0.3
-0.2
(1)
-0.1
0.0
0.0
-0.2
-0.4
(2)
-0.6
-0.8
-1.0
VSD (V)
VGS = 0 V
(1) Tamb = 150 °C
(2) Tamb = 25 °C
Fig 16. Source current as a function of source-drain voltage; typical values
PMDT670UPE
Product data sheet
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Rev. 1 — 13 September 2011
© NXP B.V. 2011. All rights reserved.
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PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
8. Test information
P
t2
duty cycle δ =
t1
t2
t1
t
006aaa812
Fig 17. Duty cycle definition
8.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
PMDT670UPE
Product data sheet
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20 V, 550 mA dual P-channel Trench MOSFET
9. Package outline
Plastic surface-mounted package; 6 leads
SOT666
D
E
A
X
Y S
S
HE
6
5
4
pin 1 index
A
1
2
e1
c
3
bp
w M A
Lp
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
bp
c
D
E
e
e1
HE
Lp
w
y
mm
0.6
0.5
0.27
0.17
0.18
0.08
1.7
1.5
1.3
1.1
1.0
0.5
1.7
1.5
0.3
0.1
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-11-08
06-03-16
SOT666
Fig 18. Package outline SOT666
PMDT670UPE
Product data sheet
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20 V, 550 mA dual P-channel Trench MOSFET
10. Soldering
2.75
2.45
2.1
1.6
solder lands
0.4
(6×) 0.25
(2×)
0.538
2
1.7 1.075
0.3
(2×)
0.55
(2×)
placement area
solder paste
occupied area
0.325 0.375
(4×) (4×)
Dimensions in mm
1.7
0.45
(4×)
0.6
(2×)
0.5
(4×)
0.65
(2×)
sot666_fr
Fig 19. Reflow soldering footprint for SOT666
PMDT670UPE
Product data sheet
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Rev. 1 — 13 September 2011
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20 V, 550 mA dual P-channel Trench MOSFET
11. Revision history
Table 8.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PMDT670UPE v.1
20110913
Product data sheet
-
-
PMDT670UPE
Product data sheet
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Rev. 1 — 13 September 2011
© NXP B.V. 2011. All rights reserved.
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PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
12. Legal information
12.1 Data sheet status
Document status [1] [2]
Product status [3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
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Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
PMDT670UPE
Product data sheet
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
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authorized or warranted to be suitable for use in life support, life-critical or
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malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
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Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
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Rev. 1 — 13 September 2011
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PMDT670UPE
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20 V, 550 mA dual P-channel Trench MOSFET
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PMDT670UPE
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 September 2011
© NXP B.V. 2011. All rights reserved.
15 of 16
PMDT670UPE
NXP Semiconductors
20 V, 550 mA dual P-channel Trench MOSFET
14. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
8.1
9
10
11
12
12.1
12.2
12.3
12.4
13
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2
Thermal characteristics . . . . . . . . . . . . . . . . . . .4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Test information . . . . . . . . . . . . . . . . . . . . . . . . .10
Quality information . . . . . . . . . . . . . . . . . . . . . .10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 11
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .13
Legal information. . . . . . . . . . . . . . . . . . . . . . . .14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Contact information. . . . . . . . . . . . . . . . . . . . . .15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 13 September 2011
Document identifier: PMDT670UPE