Addendum, SL2 ICS20, ICODE SLI Label IC, Bumped Wafer

INTEGRATED CIRCUITS
ADDENDUM
SL2 ICS 20
I?CODE SLI Label IC
Bumped Wafer Specification
Product Specification
Revision 3.0
Public
Philips
Semiconductors
December 2002
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
CONTENTS
1
SCOPE.......................................................................................................................................3
2
REFERENCE DOCUMENTS........................................................................................................3
2.1
Philips Documents.......................................................................................................................3
3
MECHANICAL SPECIFICATION ..................................................................................................3
3.1
Wafer..........................................................................................................................................3
3.2
Wafer Backside ...........................................................................................................................3
3.3
Chip Dimensions .........................................................................................................................3
3.4
Passivation..................................................................................................................................3
3.5
Au Bump.....................................................................................................................................3
4
FAIL-DIE IDENTIFICATION .........................................................................................................3
5
ORDERING INFORMATION ........................................................................................................3
5.1
Bumped die on sawn wafer ..........................................................................................................3
6
CHIP ORIENTATION AND BONDPAD LOCATIONS .....................................................................4
7
ELECTRICAL SPECIFICATIONS .................................................................................................5
7.1
ABSOLUTE MAXIMUM RATINGS
7.2
OPERATING CONDITIONS .........................................................................................................5
7.3
ELECTRICAL CHARACTERISTICS..............................................................................................6
8
FINAL WAFERTEST SPECIFICATION.........................................................................................7
9
HINTS FOR LABEL IC ENCAPSULATION....................................................................................8
9.1
Protection against Visible Light .....................................................................................................8
9.2
Protection against UV Light ..........................................................................................................8
9.3
Resistance to X-Rays ..................................................................................................................8
10
DEFINITIONS .............................................................................................................................9
11
DISCLAIMERS ............................................................................................................................9
11.1
Life support applications...............................................................................................................9
11.2
Licence Policy .............................................................................................................................9
12
REVISION HISTORY ................................................................................................................. 10
1, 2
............................................................................................5
2
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
1 SCOPE
3.5 Au Bump
This specification describes the electrical, physical
and dimensional properties of Au-bumped sawn
1
wafers on FFC of I•CODE SLI Label ICs on a
Philips C075EE process and is the base for delivery
of tested I•CODE SLI Label ICs.
•
•
•
•
•
2 REFERENCE DOCUMENTS
2.1 Philips Documents
•
•
•
•
•
•
•
•
•
•
•
MIL-STD 883D Method 3023
MIL-STD 883D Method 3015
SNW-FQ-627
PICTOH-QS007
General Specification for 8” Wafer
General Quality Specification
I•CODE SLI Label IC, Functional Specification
Application Note Coil Design Guide
Specification of the IBIS Wafermap
•
•
•
Bump material:
Bump hardness:
Bump shear strength:
Bump height:
Bump height uniformity:
within a die:
within a wafer:
wafer to wafer:
Bump flatness:
Bump size:
LA, LB
2
VSS , TESTIO
Pad size (no bump!)
LA, LB
3
VSS , TESTIO
Bump size variation:
Under bump metallisation:
> 99.9% pure Au
35 – 80 HV 0.005
> 70 MPa
18 µm
± 2 µm
± 3 µm
± 4 µm
± 1.5 µm
92 x 92 µm
62 x 62 µm
78 x 78 µm
48 x 48 µm
± 5 µm
sputtered TiW
4 FAIL-DIE IDENTIFICATION
3 MECHANICAL SPECIFICATION
Every die is electrically tested according to data
sheet. Identification of chips with electrical
parameters not conform with the data sheet is done
by inking and wafer mapping (all dies at wafer
periphery are identified as ‘FAIL’).
3.1 Wafer
•
•
•
Diameter:
Thickness:
Flatness:
8”
150 µm ± 15 µm
max. tbf
The ink information refers to unsawn wafers. At
sawn wafers (on FFC) additional ICs are be marked
as ‘FAIL’ in the wafer map if damaged during the
sawing process. These ICs will not be inked.
3.2 Wafer Backside
•
•
•
Material:
Treatment:
Roughness:
Si
ground + stress releave
Ra max. 0.5 µm
Rt max. 5 µm
4.1 Wafer Mapping
Wafer mapping for failed die information is available
on Floppy-Disk.
Format: IBIS format
3.3 Chip Dimensions
•
•
Chip size:
Scribe lines:
900 x 780 µm
80 / 80 µm
5 ORDERING INFORMATION
5.1 Bumped die on sawn wafer
3.4 Passivation
•
•
•
1
Type:
Material:
Thickness:
•
•
sandwich structure
PSG / Nitride (on top)
500 nm / 600 nm
I•CODE is a registered trademark of Philips Electronics N.V.
3
Order Code:
12NC:
SL2 ICS20 01DW/V4D
9352 716 15005
2
VSS is conntected to substrate.
3
VSS is conntected to substrate.
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
6 CHIP ORIENTATION AND BONDPAD LOCATIONS
Widths and lengths are measured from metal to metal.
PAD(center)
x [µm]
y [µm]
LA
0.0
0.0
LB
665.0
-30.0
TESTIO
687.0
-632.0
VSS
-93.0
-385.0
Y
(1)
(5)
(6)
(7)
LA
X
(8)
LB
(4)
(12)
VSS
(9)
TESTIO
(11)
(10)
(2)
Not to scale!
(3)
(1)
(2)
(3)
(4)
(5)
(6)
X-Scribeline width:
tbd µm
Y-Scribeline width:
tbd µm
Chip step, x-length:
X-Scribeline + 900 µm
Chip step, y-length:
Y-Scribeline + 780 µm
LA bump edge to chip edge, y-length:
39[+7] µm
LA bump edge to chip edge, x-length: 104[+7] µm
(7) LB bump edge to chip edge, y-length:
69[+7] µm
(8) LB bump edge to chip edge, x-length:
39[+7] µm
(9) TESTIO bump edge to chip edge, x-length: 32[+7] µm
(10) TESTIO bump edge to chip edge, y-length:32[+7] µm
(11) VSS bump edge to chip edge, y-length: 279[+7] µm
(12) VSS bump edge to chip edge, x-length:
26[+7] µm
[+7µm] ...for pad edge to chip edge!
Figure 1
4
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
7 ELECTRICAL SPECIFICATIONS
7.1 ABSOLUTE MAXIMUM RATINGS
SYMBOL
Tstg
Tj
VESD
1, 2
PARAMETER
TEST
CONDITIONS
RATING
UNIT
Storage Temperature Range
- 55 to +140
°C
Junction Temperature
- 55 to +140
°C
±2
kV peak
± 60
mApeak
ESD Voltage Immunity
MIL-STD-883D,
Method 3015.7,
Human Body Model
Imax LA-LB Maximum Input Peak Current
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any conditions other than those described in the Operating Conditions and
Electrical Characteristics section of this specification is not implied.
2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.
7.2 OPERATING CONDITIONS
SYMBOL
Tj op
ILA-LB
PARAMETER
TEST
CONDITIONS
Operating Junction Temperature
Input Current
MIN
TYP
1
- 25
2
MAX
UNIT
+ 85
°C
30
mArms
Minimum Supply Voltage
VLA-LB
fop
for READ/WRITE/EAS
Operating Frequency
3
± 2.5
± 2.6
± 2.9
Vrms
13.553
13.560
13.567
MHz
NOTES:
1. Typical ratings are not guaranteed. These values listed are at room temperature.
2. The voltage between LA and LB is limited by the on-chip voltage limitation circuitry (corresponding to parameter ILA-LB).
3. Bandwidth limitation (±7 kHz) according to ISM band regulations.
5
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
7.3 ELECTRICAL CHARACTERISTICS
Tjop = - 25 to +85 °C
SYMBOL
PARAMETER
Cres
Input Capacitance between LA - LB
Pmin
Minimum Operating Supply Power
m
tP sm
tD
R mod
tret
nwrite
2
TEST
CONDITIONS
VLA-LB = 2 Vrms
MIN
TYP
1
MAX
UNIT
22.3
23.5
24.7
pF
3
Modulation of RF Voltage for
Demodulator Response
280
Vmax - Vmin
m = Vmax + Vmin
Modulation Pulse Length
of RF Voltage
Demodulator Response Time
m ≥ 10 %, 100%
Load Modulation
EEPROM Data Retention
Tamb ≤ 55 °C
EEPROM Write Endurance
**
**
**
%
**
**
**
µs
**
**
**
µs
**
**
**
Ω
10
Years
100 000
Cycles
NOTES:
1. Typical ratings are not guaranteed. These values listed are at room temperature.
2. Measured with an HP4285A LCR meter at 13.56 MHz.
3. Including losses in resonant capacitor and rectifier.
** : refer to ISO/IEC 15693-2 and 15693-3 including pulse shapes and tolerances; proper coil design assumed
6
µW
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
8 FINAL WAFERTEST SPECIFICATION
•
•
Minimum yield per wafer: 30% of 35416 potential good dies.
Minimum yield per lot: 30%
7
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
9 HINTS FOR LABEL IC ENCAPSULATION
9.1 Protection against Visible Light
As a result of the ultra low power design of the I•CODE SLI Label IC some analogue circuits on the chip are
light sensitive. This means that common sun light can impact the operation of the label if the chip is not
protected against visible light radiation.
2
Measurements have shown that a radiation of Emax = 60 W/m (spectrum: 400 to 1000 nm) causes a reduced
operating range of the plain chip.
2
Measurements of direct sunlight in summer deliver values up to 260 W/m .
To ensure proper operation an expected minimum radiation reduction factor of approx. 9 (2 x 260/60 = 8.7)
must be provided by the encapsulation. That means special care has to be taken to ensure a sufficient light
protection of the I•CODE SLI Label IC (e.g. non translucent encapsulation or underfiller, ...) according to
application requirements.
9.2 Protection against UV Light
An EEPROM memory, as it is also used in the I•CODE SLI Label IC, has some principle sensitivity to UV
light (applies to EEPROM-technology in general).
Thus strong UV exposure in the production of inlets/labels has to be avoided. UV protection has to be
ensured using appropriate assembly methods.
9.3 Resistance to X-Rays
X-ray exposure on comparable Philips ICs (with even smaller feature size) caused neither a long term
influence on the behaviour of the ICs nor on the data retention of the EEPROMs.
8
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
10 DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be
published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress
above one or more of the limiting values may cause permanent damage to the device. These are stress
ratings only and operation of the device at these or at any other conditions above those given in the
Characteristics section of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
11 DISCLAIMERS
11.1 Life support applications
These products are not designed for use in life support appliances, devices, or systems where malfunction of
these products can reasonably be expected to result in personal injury. Philips customers using or selling
these products for use in such applications do so on their own risk and agree to fully indemnify Philips for
any damages resulting from such improper use or sale.
11.2 Licence Policy
Purchase of this Philips IC with a functionally according to ISO/IEC 15693 Standard does not convey an
implied license under any patent right on this standard. A license for the Philips portfolio of patents on the
ISO/IEC 15693 Standard can be obtained via the Philips Intellectual Property and Standards department.
For more information please contact the nearest Philips Semiconductors sales office.
9
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
12 REVISION HISTORY
Table 1 Bumped Wafer Specification SL2 ICS20 Revision History
REVISION
1.0
1.1
2.0
2.1
3.0
DATE
Sept.
2000
Feb.
2002
June
2002
Sept.
2002
Dec.
2002
CPCN
-
PAGE
DESCRIPTION
Initital version.
New die size and dimensions
Preliminary Specification
3
Include IBIS Wafermap
Product Specification
10
Philips Semiconductors
Product Specification Rev.3.0 December 2002
Bumped Wafer Specification
SL2 ICS 20
NOTES
11
Philips Semiconductors - a worldwide company
Contact Information
For additional information please visit http://www.semiconductors.philips.com.Fax: +31 40 27 24825
For sales offices addresses send e-mail to: [email protected]
© Koninklijke Philips Electronics N.V. 2002
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without any notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips
Semiconductors
12