TO -2 20A B TOPT16-800C0 TOPTriac 21 September 2015 Product data sheet 1. General description Planar passivated Temperature and Overload Protected Triac with high commutation performance in a SOT78 (TO-220AB) plastic package. This TOPTriac conveniently self protects by turning off in the event of excessive temperature. It is triggered negatively using continuous DC or current pulses. 2. Features and benefits • • • • • • • • Exclusive negative gate triggering Full cycle AC conduction Hi-Com technology gives maximum immunity to false triggering High immunity to false turn-on by dV/dt High minimum IGT for guaranteed immunity to gate noise Over-temperature self protection function Pin compatible with standard triacs Planar passivated for voltage ruggedness and reliability 3. Applications • • • • • Any circuit where protection against overload and/or over temperature is required Motor controls and starters – e.g. refrigeration compressors High power density motors – e.g. vacuum cleaners, window blinds, food processors Heating and cooking appliances Water boilers 4. Quick reference data Table 1. Quick reference data Symbol Parameter VDRM repetitive peak offstate voltage IT(RMS) RMS on-state current Conditions Min Typ Max Unit - - 800 V - - 16 A - - 140 A conducting mode - - 125 °C self-protection mode - - 150 °C full sine wave; Tmb ≤ 101 °C; Fig. 1; Fig. 2; Fig. 3 ITSM non-repetitive peak on- full sine wave; Tj(init) = 25 °C; state current tp = 20 ms; Fig. 4; Fig. 5 Tj junction temperature Scan or click this QR code to view the latest information for this product TOPT16-800C0 NXP Semiconductors TOPTriac Symbol Parameter Conditions Min Typ Max Unit VD = 12 V; IT = 0.1 A; LD+ G-; 5 - 35 mA 5 - 35 mA Static characteristics IGT gate trigger current Tj = 25 °C; Fig. 7 VD = 12 V; IT = 0.1 A; LD- G-; Tj = 25 °C; Fig. 7 IH holding current VD = 12 V; Tj = 25 °C; Fig. 9 - - 35 mA VT on-state voltage IT = 18 A; Tj = 25 °C; Fig. 10 - 1.3 1.5 V VDM = 536 V; Tj = 125 °C; (VDM = 67% 500 - - V/µs 15 - - A/ms Dynamic characteristics dVD/dt rate of rise of off-state voltage of VDRM); exponential waveform; gate open circuit dIcom/dt rate of change of commutating current VD = 400 V; IT(RMS) = 16 A; dVcom/ dt = 20 V/µs; (snubberless condition); gate open circuit 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 CM common 2 LD load 3 G gate mb LD mounting base; load Graphic symbol LD mb G CM 003aag918 1 2 3 TO-220AB (SOT78) 6. Ordering information Table 3. Ordering information Type number TOPT16-800C0 TOPT16-800C0 Product data sheet Package Name Description Version TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 2 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac 7. Marking Table 4. Marking codes Type number Marking code TOPT16-800C0 TOPT16-800C0 TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 3 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VDRM repetitive peak off-state voltage IT(RMS) RMS on-state current full sine wave; Tmb ≤ 101 °C; Fig. 1; Min Max Unit - 800 V - 16 A - 140 A - 150 A Fig. 2; Fig. 3 ITSM non-repetitive peak on-state current full sine wave; Tj(init) = 25 °C; tp = 20 ms; Fig. 4; Fig. 5 full sine wave; Tj(init) = 25 °C; tp = 16.7 ms I t I t for fusing tp = 10 ms; sine-wave pulse - 98 A²s dIT/dt rate of rise of on-state current IG = 70 mA - 100 A/µs IGM peak gate current - 2 A PGM peak gate power - 5 W PG(AV) average gate power - 0.5 W Tstg storage temperature -40 150 °C Tj junction temperature conducting mode - 125 °C self-protection mode - 150 °C 2 2 over any 20 ms period 003aab684 20 IT(RMS) (A) 16 003aab685 60 IT(RMS) (A) 50 40 12 30 8 20 4 0 -50 Fig. 1. 10 0 50 100 0 10-2 150 Tmb (°C) RMS on-state current as a function of mounting base temperature; maximum values Fig. 2. TOPT16-800C0 Product data sheet 1 10 surge duration (s) f = 50 Hz; Tmb = 101 °C RMS on-state current as a function of surge duration; maximum values All information provided in this document is subject to legal disclaimers. 21 September 2015 10-1 © NXP Semiconductors N.V. 2015. All rights reserved 4 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac aaa-019895 20 P tot (W) 15 10 conduction angle, α (degrees) form factor a 30 60 90 120 180 2.816 1.967 1.570 1.329 1.110 a = 180° α Tmb (max) (°C) 120° 107 90° 60° α 30° 113 119 5 0 101 0 2 4 6 8 10 12 14 IT(RMS)(A) 125 16 α = conduction angle a = form factor = IT(RMS) / IT(AV) Fig. 3. Total power dissipation as a function of RMS on-state current; maximum values 003aab671 103 ITSM (A) (1) 102 ITSM IT t 10 10-5 tp Tj(init) = 25 °C max 10-4 10-3 10-2 tp (s) 10-1 tp ≤ 20 ms (1) dIT/dt limit Fig. 4. Non-repetitive peak on-state current as a function of pulse duration; maximum values TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 5 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac 003aab668 160 ITSM (A) 120 80 ITSM IT 40 0 t 1/f Tj(init) = 25 °C max 1 102 10 number of cycles (n) 103 f = 50 Hz Fig. 5. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum values TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 6 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base full cycle; Fig. 6 - - 1.2 K/W Rth(j-a) thermal resistance from junction to ambient free air in free air - 60 - K/W aaa-019896 10 Zth(j-mb) (K/W) 1 10-1 PD 10-2 10-3 10-5 Fig. 6. tp 10-4 10-3 10-2 10-1 1 tp (s) t 10 Transient thermal impedance from junction to mounting base as a function of pulse duration TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 7 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit VD = 12 V; IT = 0.1 A; LD+ G-; 5 - 35 mA 5 - 35 mA - - 60 mA - - 50 mA Static characteristics IGT gate trigger current Tj = 25 °C; Fig. 7 VD = 12 V; IT = 0.1 A; LD- G-; Tj = 25 °C; Fig. 7 IL latching current VD = 12 V; IG = 0.1 A; LD+ G-; Tj = 25 °C; Fig. 8 VD = 12 V; IG = 0.1 A; LD- G-; Tj = 25 °C; Fig. 8 IH holding current VD = 12 V; Tj = 25 °C; Fig. 9 - - 35 mA VT on-state voltage IT = 18 A; Tj = 25 °C; Fig. 10 - 1.3 1.5 V VGT gate trigger voltage VD = 12 V; IT = 0.1 A; Tj = 25 °C; - 1.4 2.3 V 0.5 - - V VD = 800 V; Tj = 125 °C - 0.1 0.5 mA VDM = 536 V; Tj = 125 °C; (VDM = 67% 500 - - V/µs 15 - - A/ms Fig. 11 VD = 400 V; IT = 0.1 A; Tj = 125 °C; Fig. 11 ID off-state current Dynamic characteristics dVD/dt rate of rise of off-state voltage of VDRM); exponential waveform; gate open circuit dIcom/dt rate of change of commutating current VD = 400 V; IT(RMS) = 16 A; dVcom/ dt = 20 V/µs; (snubberless condition); gate open circuit Over-temperature protection characteristics Ttrip trip junction temperature see application information 125 - 150 °C VG(trip) trip gate voltage IG = 2 mA; see application information 0.3 - - V IG = 50 mA; see application information - - 0.9 V 0.5 - - mA - - 2 mA Operating requirement for pulsed gate triggering IG(bl) gate bleed current Tj = 25 °C; VG = VG(trip); circuit-applied current requirement; see application information section Tj < 150 °C; VG = VGT; circuit-applied current requirement; see application information section TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 8 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac aaa-019771 3 (2) IGT aaa-019772 3 IGT(25°C) IL IL(25°C) 2 2 (1) (1) (2) 1 1 0 -50 Fig. 7. 0 50 100 Tj (°C) 0 -50 150 0 50 100 Tj (°C) 150 (1) LD+ G(2) LD- G- (1) LD+ G(2) LD- G- Normalized gate trigger current as a function of Fig. 8. junction temperature Normalized latching current as a function of junction temperature aaa-019773 4 003aab666 50 IT (A) IH IH(25°C) 40 3 (1) 30 2 (2) (1) 20 1 0 -50 Fig. 9. (2) (3) 10 0 50 100 Tj (°C) 0 150 0 0.5 1 1.5 (1) LD+ G(2) LD- G- Vo = 1.024 V; Rs = 0.021 Ω Normalized holding current as a function of junction temperature (2) Tj = 125 °C; maximum values VT (V) 2 (1) Tj = 125 °C; typical values (3) Tj = 25 °C; maximum values Fig. 10. On-state current as a function of on-state voltage TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 9 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac aaa-019793 1.6 VGT VGT(25°C) 1.2 (2) (1) 0.8 0.4 -50 0 50 100 Tj (°C) 150 (1) LD+ G(2) LD- GFig. 11. Normalized gate trigger voltage as a function of junction temperature TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 10 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac 11. Application information TOPTriac is a three terminal device that will plug into existing triac circuits. There are some unique features that must be understood to gain its full benefits. 11.1 The Gate terminal is also a Feedback terminal TOPTriac can be triggered like any normal triac. In this conventional mode, the Gate acts as an input. However, the Gate can also be an output, since it provides voltage signatures that indicate the status of TopTriac. The controlling microcontroller can analyse the feedback and act upon it, according to the needs of the application. 11.2 Normal triggering TOPTriac is triggered with negative gate current and may be triggered from 5 V logic or higher voltage supply with suitable series gate resistor. VGT is higher than for standard triacs, so series gate resistors will be a little lower. For 35 mA IGT and 5 V trigger voltage, the current-limiting resistance will typically be 82 Ω instead of 100 Ω for standard triacs. DC gate triggering is the simplest method that automatically achieves safe latch-off after the over-temperature trip protection has been activated. Alternatively, pulse triggering may be applied to the gate in combination with a low level bleed current (IG(bl)), to sustain the trip condition after the over-temperature trip protection has been activated. 11.3 Over-temperature protection If an overload current or insufficient cooling causes the junction temperature to rise above Ttrip, TOPTriac will disable its gate drive to prevent further conduction before it loses control or becomes damaged. When the over-temperature trip is activated, the Gate-to-Common voltage VG-CM reduces from the VGT to the VG(trip) level (please refer to the VGT and VG(trip) characteristics). Continuous DC gate drive sustains continued safe latch-off even after TOPTriac temperature has dropped below Ttrip. This allows a controlled reset by removing and reapplying gate drive after the fault condition has been removed. Pulsed gate drive, which may be preferred for phase control or for efficiency reasons, is combined with a low level bleed current IG(bI) to sustain latch-off when the overtemperature trip is activated. (Please refer to the IG(bI) limiting values for the minimum and maximum allowable bleed current that may be applied during pulse triggering). 11.4 Resetting after over-temperature As long as continuous gate current is applied after over-temperature trip, TOPTriac will remain deactivated even after the TOPTriac temperature has dropped below Ttrip. This is the safest protection method that allows the removal of the fault condition before controlled reset is implemented. TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 11 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac The simplest reset is user-controlled, where TOPTriac will remain in the safe shutdown condition until gate drive or power is removed and reapplied. Automatic reset will not require user intervention, but it may be ‘unintelligent/dumb’ open loop that does not involve a feedback stimulus, or ‘intelligent/smart’ closed loop that does respond to gate feedback. User-controlled reset. The user removes and reapplies power to the application or presses a ‘reset’ button that momentarily removes the gate drive. Open loop automatic reset. If there is a known or predictable overload conditon in the application that may cause an occasional overheat, a periodic discontinuity may be programmed into the gate drive (e.g. at the end of the program stage, once per hour, day or week, depending on the application) that allows automatic reset. For DC gate drive, removal of the gate drive achieves reset. For pulsed gate drive, IG(bI) must be removed and reapplied. The previous two examples will work for applications that do not require immediate reaction to a fault conditon, hence gate feedback monitoring is not needed. Closed loop automatic reset. Applications where an immediate reaction to an overtemperature trip is needed will require monitoring of TOPTriac status. This is possible by monitoring VG-CM while gate drive is being applied. During normal conduction, the higher level VGT will be apparent with a square wave at mains frequency superimposed upon it. (The square wave on the gate results from the load current.) During the over-temperature trip condition, the lower level VG(trip) will be apparent and there will be no AC ripple because no load current is flowing. The difference can be detected by the microcontroller, which can take the appropriate action that has been programmed according to the needs of the application. The following four figures show oscilloscope current and voltage waveforms for the four principal operating modes of TOPTriac: DC triggering, normal conduction and overtemperature tripped; pulse triggering, normal conduction and over-temperature tripped. The pulse triggering waveforms show phase control at the peak of the mains sine wave at half power setting. Channel 1 shows gate current (20mA/div). Channel 2 shows load current (5A/div). Channel 3 shows gate voltage VG-CM (1V/div). Channel 4 shows load voltage VLD-CM (200V/div). TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 12 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac 003aaj331 003aaj330 Fig. 13. DC triggering, over-temperature tripped Fig. 12. DC triggering, normal conduction 003aaj332 Fig. 14. Pulse triggering, normal conduction 003aaj333 Fig. 15. Pulse triggering, over-temperature tripped 11.5 Important characteristics Ttrip is the junction temperature at which TOPTriac will disable itself. It will be above 125 °C and below 150 °C . VGT is the gate voltage characteristic during normal triggering. It is higher than for normal triacs. VGT is used in the calculation of RG to set the gate trigger current. VG(trip) is the gate voltage characteristic when in the over-temperature trip condition. It is lower than VGT. VG(trip) is used in the calculation of RG(bI) to set the gate bleed current IG(bI). IG(bI) is used during pulse triggering. It is the continuous DC bleed current that must flow out of the gate to achieve clean latch-off at the trip point and maintain this safe latch-off condition as TOPTriac cools down to ambient temperature. The min IG(bI) value is the minimum bleed current to sustain latch-off after cooling. TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 13 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac The max IG(bI) value is the maximum bleed current that will not trigger TOPTriac up to maximum trip temperature. 11.6 How to calculate the bleed resistor RG(bI) When pulse triggering it is critical that the bleed current is set correctly. If IG(bI) is too low (lower than 0.5 mA), TOPTriac may not be able to provide reliable overtemperature protection during continuous fault conditions. Normal trip may be achieved at Ttrip, but self-reset may occur as it cools, leading to on-off cycling. This constitutes a loss of control and should be avoided. If IG(bI) is too high (higher than 2 mA), TOPTriac may trigger uncontrollably at elevated temperature that is below the trip temperature (This is another form of loss of control that must not be allowed). However, it will still self-protect as intended above trip temperature. The following examples show how to calculate the minimum and maximum RG(bI). The chosen value should be approximately mid-way between the two extremes. Example 1 (3.3 V logic supply) Maximum IG(bI) is 2 mA. During normal conduction when IG(bI) must not be high enough to cause false triggering, VGT applies and should be used in our calculations. Minimum VGT @ Tj(max) is 0.5 V. Therefore minimum RG(bI): RG(bl) = (3.3 - 0.5) / 2 mA = 1.4 kOhm Minimum IG(bI) is 0.5 mA. When tripped, VG(trip) applies and should be used in our calculations. IG(bI) must remain high enough to maintain the trip condition, even when VG(trip) is at a maximum. Maximum VG(trip) is 0.9 V. Therefore maximum RG(bI): RG(bl) = (3.3 - 0.9) / 0.5 mA = 4.8 kOhm Suggested RG(bI) is 3 kΩ. Example 2 (5 V logic supply) Min RG(bI): RG(bl) = (5 - 0.5) / 2 mA = 2.25 kOhm Max RG(bI): RG(bl) = (5 - 0.9) / 0.5 mA = 8.2 kOhm Suggested RG(bI) is 5.1 kΩ. Example 3 (12 V auxiliary gate drive supply) Min RG(bI): RG(bl) = (12 - 0.5) / 2 mA = 5.75 kOhm Max RG(bI): RG(bl) = (12 - 0.9) / 0.5 mA = 22.2 kOhm TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 14 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac Suggested RG(bI) is 15 kΩ. 11.7 Application schematics The following schematics show possible implementations of TOPTriac. Gate trigger current is from a 5 V minimum logic supply. It is possible to trigger from a 3.3 V microcontroller by using a transistor level shifter to a higher voltage gate drive power supply, which may be 5 V minimum or the 12 V supply that may already be available for other loads such as lighting, indication and sounders. For DC triggering, reset is achieved by removing the gate drive at any time and reapplying it after TOPTriac temperature has dropped below Ttrip. For pulse triggering, reset is achieved by removing and reapplying the gate bleed current IG(bI) after TOPTriac temperature has dropped below Ttrip. IG(bI) is set by RG(bI). It is best derived directly from the low voltage microcontroller supply (up to 5V max) and will most likely be direct drive from the microcontroller output. In all of the following circuits, gate trigger and gate bleed current are applied by logic zero drive from the microcontroller. CM G 4.7 k * RG trigger 82 TOPTriacTM CM 0V G LD MICROCONTROLLER -5 V 0V trigger 82 TOPTriacTM LD 4.7 k * RG MICROCONTROLLER -5 V RG(bl) bleed current LOAD LOAD optional feedback *optional (depends on microcontroller output configuration) -5 V 5.1 k optional feedback *optional (depends on microcontroller output configuration) -5 V 003aaj326 Fig. 16. DC triggering from 5 V microcontroller CM TOPTriacTM LD 003aaj327 Fig. 17. Pulse triggering from 5 V microcontroller 4.7 k * G trigger CM 0V 4.7 k TOPTriacTM RG LD MICROCONTROLLER -5 V or greater 4.7 k * G trigger 4.7 k RG 0V MICROCONTROLLER -5 V or greater RG(bl) bleed current LOAD LOAD optional feedback *optional (depends on microcontroller output configuration) -3.3 V TOPT16-800C0 Product data sheet optional feedback *optional (depends on microcontroller output configuration) 003aaj328 Fig. 18. DC triggering from 3.3 V microcontroller 3k -3.3 V 003aaj329 Fig. 19. Pulse triggering from 3.3 V microcontroller All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 15 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac 12. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 E A A1 p q mounting base D1 D L1(1) L2(1) Q L b1(2) (3×) b2(2) (2×) 1 2 3 b(3×) e c e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1(2) b2(2) c D D1 E e L L1(1) L2(1) max. p q Q mm 4.7 4.1 1.40 1.25 0.9 0.6 1.6 1.0 1.3 1.0 0.7 0.4 16.0 15.2 6.6 5.9 10.3 9.7 2.54 15.0 12.8 3.30 2.79 3.0 3.8 3.5 3.0 2.7 2.6 2.2 Notes 1. Lead shoulder designs may vary. 2. Dimension includes excess dambar. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 08-04-23 08-06-13 Fig. 20. Package outline TO-220AB (SOT78) TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 16 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 13. Legal information 13.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Bitsound, CoolFlux, CoReUse, DESFire, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, MIFARE, MIFARE Plus, MIFARE Ultralight, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP Semiconductors N.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 18 / 19 TOPT16-800C0 NXP Semiconductors TOPTriac 14. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 3 8 Limiting values .......................................................4 9 Thermal characteristics .........................................7 10 Characteristics ....................................................... 8 11 11.1 11.2 11.3 11.4 11.5 11.6 11.7 Application information .......................................11 The Gate terminal is also a Feedback terminal .. 11 Normal triggering ................................................ 11 Over-temperature protection .............................. 11 Resetting after over-temperature ........................11 Important characteristics .................................... 13 How to calculate the bleed resistor RG(bI) .........14 Application schematics ....................................... 15 12 Package outline ................................................... 16 13 13.1 13.2 13.3 13.4 Legal information .................................................17 Data sheet status ............................................... 17 Definitions ...........................................................17 Disclaimers .........................................................17 Trademarks ........................................................ 18 © NXP Semiconductors N.V. 2015. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 21 September 2015 TOPT16-800C0 Product data sheet All information provided in this document is subject to legal disclaimers. 21 September 2015 © NXP Semiconductors N.V. 2015. All rights reserved 19 / 19