UESD6V85CT36 - Union Semiconductor

UESD6V85CT36
5 Line ESD Protection Diode Array
UESD6V85CT36 SC70-6/SC88/SOT363
General Description
The UESD6V85CT36 of TVS array is designed to protect sensitive electronics from damage or
latch-up due to ESD, for use in applications where board space is at a premium. It is unidirectional
device and may be used on lines where the signal polarities are above ground, each device will protect
up to five lines.
TVS diodes are solid-state devices feature large cross-sectional area junctions for conducting high
transient currents, specifically for transient suppression. It offers desirable characteristics for board
level protection including fast response time, low clamping voltage, and no device degradation.
The UESD6V85CT36 may be used to meet the ESD immunity requirements of IEC 61000-4-2, Level
4. The small package makes them ideal for use in portable electronics such as cell phones, PDAs,
notebook computers, and digital cameras.
Applications
Features









Cellular Handsets & Accessories
Cordless Phones
Personal Digital Assistants(PDAs)
Notebooks & Handhelds
Portable Instrumentation
Digital Cameras
Peripherals
MP3 Players
Top View
6
1
5
4
52C
M
Pin Configurations






Transient Protection for Data Lines to IEC
61000-4-2 (ESD) ±15kV (Air), ±8kV
(Contact)
Protects Five I/O Lines
Ultra-Small SC70-6/SC88/SOT363 Package
Working Voltages: 5V
Low Leakage Current
Low Operating and Clamping Voltage
Solid-State Silicon Avalanche Technology
6
2
5
3
4
Marking Pin 1 1
2
3
M: Month Code
UESD6V85CT36
SC70-6/SC88/SOT363
Ordering Information
Part Number
Working
Voltage
Packaging Type
Channel
Marking
Code
Shipping Qty
UESD6V85CT36
5.0V
SC70-6/SC88/SOT363
5
52C
3000pcs/7Inch
Tape & Reel
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UESD6V85CT36
Absolute Maximum Ratings
RATING
SYMBOL
VALUE
UNITS
Peak Pulse Power (tp = 8/20μs) @ TA≤25ºC
PPK
140
Watts
Thermal Resistance, Junction to Ambient
RθJA
325
ºC/W
TL
260 (10 sec.)
°C
Operating Temperature
Storage Temperature
TJ
TSTG
-55 to +125
-55 to +125
°C
°C
Maximum Junction Temperature
TJMAX
150
ºC
Lead Soldering Temperature
Electrical Characteristics
PARAMETER
Reverse Stand-Off
Voltage
Reverse Breakdown
Voltage
Reverse Leakage Current
Clamping Voltage
SYMBOL
CONDITIONS
MIN
TYP
VRWM
5
V
7.2
V
μA
It = 1mA
IR
VRWM = 5V, T=25°C
0.1
IPP =5A, tp = 8/20μs
9.1
IPP =11A, tp = 8/20μs
13
Junction Capacitance
CJ
Junction Capacitance
CJ
Pin 1, 3, 4, 5, 6 to 2
VR = 0V, f = 1MHz
Pin 1, 3, 4, 5, 6 to 2
VR = 2.5V, f = 1MHz
6.8
UNIT
VBR
VC
6
MAX
V
40
50
pF
30
40
pF
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UESD6V85CT36
Typical Operating Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
Clamping Voltage vs. Peak Pulse Current
Forward Voltage vs. Forward Current
Junction Capacitance vs. Reverse Voltage
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UESD6V85CT36
Application Information
UESD6V85CT36 ESD protection diode is designed to protect 5 data, I/O, or power supply line. The
device is unidirectional and may be used on lines where the signal polarity is above ground. The
cathode should be placed towards the line that is to be protected.
Device Connection for Protection of Quad Data Lines
The UESD6V85CT36 TVS diode array is designed to protect up to five unidirectional data lines. The
device as follows:
Unidirectional protection of five I/O lines is achieved by connecting pins 1, 3, 4, 5, and 6 to the data
lines. Pin 2 is connected to ground. The ground connection should be made directly to the ground
plane for best results. The path length is kept as short as possible to reduce the effects of parasitic
inductance in the board traces.
Circuit Board Layout Recommendations for Suppression of ESD
Good circuit board layout is critical for the suppression of ESD induced transients. The following
guidelines are recommended:
Place the TVS near the input terminals or connectors to restrict transient coupling.
Minimize the path length between the TVS and the protected line.
Minimize all conductive loops including power and ground loops.
The ESD transient return path to ground should be kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible. For multilayer printed-circuit boards, use ground vias.
Keep parallel signal paths to a minimum.
Avoid running protection conductors in parallel with unprotected conductor.
Minimize all printed-circuit board conductive loops including power and ground loops.
Avoid using shared transient return paths to a common ground point.
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UESD6V85CT36
Package Information
UESD6V85CT36 SC70-6/SC88/SOT363
Outline Drawing
D
θ
e1
Symbol
L
e
5
4
1
2
3
L1
E
E1
6
20
c
b
A
End View
A1
A2
Top View
Side View
A
A1
A2
b
c
D
E
E1
e
e1
L
L1
θ
DIMENSIONS
MILLIMETERS
Min
Max
0.900
1.100
0.000
0.100
0.900
1.000
0.150
0.350
0.080
0.150
2.000
2.200
1.150
1.350
2.150
2.450
0.650REF
1.200
1.400
0.525REF
0.260
0.460
0°
8°
INCHES
Min
Max
0.035
0.043
0.000
0.004
0.035
0.039
0.006
0.014
0.003
0.006
0.079
0.087
0.045
0.053
0.085
0.096
0.026REF
0.047
0.055
0.021REF
0.010
0.018
0°
8°
Land Pattern
1.94
1.30
0.80
NOTES:
1. Compound dimension: 2.10×1.25;
2. Unit: mm;
3.General tolerance ±0.05mm unless otherwise
specified;
4. The layout is just for reference.
0.35
52C
M
Tape and Reel Orientation
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UESD6V85CT36
IMPORTANT NOTICE
The information in this document has been carefully reviewed and is believed to be accurate.
Nonetheless, this document is subject to change without notice. Union assumes no
responsibility for any inaccuracies that may be contained in this document, and makes no
commitment to update or to keep current the contained information, or to notify a person or
organization of any update. Union reserves the right to make changes, at any time, in order to
improve reliability, function or design and to attempt to supply the best product possible.
Union Semiconductor, Inc
Add: Unit 606, No.570 Shengxia Road, Shanghai 201210
Tel: 021-51093966
Fax: 021-51026018
Website: www.union-ic.com
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