FDC655BN - Farnell

FDC655BN
tm
Single N-Channel, Logic Level, PowerTrench® MOSFET
30 V, 6.3 A, 25 mΩ
Features
General Description
„ Max rDS(on) = 25 mΩ at VGS = 10 V, ID = 6.3 A
This N-Channel Logic Level MOSFET is produced using
Fairchild Semiconductor’s advanced PowerTrench® process
that has been especially tailored to minimize the on-state
resistance and yet maintain superior switching performance.
„ Max rDS(on) = 33 mΩ at VGS = 4.5 V, ID = 5.5 A
„ Fast switching
„ Low gate charge
These devices are well suited for low voltage and battery
powered applicatoins where low in-line power loss and fast
switching are required.
„ High performance trchnology for extremely low rDS(on)
„ Termination is Lead-free and RoHS Compliant
D
D
D
D
G
S
MOSFET Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
-Continuous
ID
TA = 25°C
(Note 1a)
-Pulsed
PD
TJ, TSTG
Ratings
30
Units
V
±20
V
6.3
20
Power Dissipation
( Note 1a)
1.6
Power Dissipation
(Note 1b)
0.8
Operating and Storage Junction Temperature Range
A
W
-55 to + 150
°C
78
°C/W
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
Package Marking and Ordering Information
Device Marking
.55B
Device
FDC655BN
©2010 Fairchild Semiconductor Corporation
FDC655BN Rev.C2
Package
SSOT-6TM
1
Reel Size
7 ’’
Tape Width
8 mm
Quantity
3000 units
www.fairchildsemi.com
FDC655BN Single N-Channel, Logic Level, PowerTrench® MOSFET
January 2010
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 µA, VGS = 0 V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, referenced to 25°C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
1
µA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
3
V
30
V
25
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 µA
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 µA, referenced to 25°C
VGS = 10 V, ID = 6.3 A
21
25
rDS(on)
Static Drain to Source On Resistance
VGS = 4.5 V, ID = 5.5 A
26
33
VGS = 10 V, ID = 6.3 A, TJ = 125°C
30
36
VDS = 10 V, ID = 6.3 A
35
gFS
Forward Transconductance
1
1.9
-5
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 15 V, VGS = 0 V,
f = 1MHz
470
620
pF
100
130
pF
60
90
pF
Ω
3.0
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
VGS = 0 V to 10 V
Qg
Total Gate Charge
VGS = 0 V to 5 V
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
VDD = 15 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
VDD = 15 V,
ID = 6.3 A
6
11
ns
2
10
ns
15
26
ns
2
10
ns
9
13
nC
5
7
nC
1.4
nC
1.6
nC
Drain-Source Diode Characteristics
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Source-Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 1.3 A
1.3
(Note 2)
IF = 6.3 A, di/dt = 100 A/µs
A
0.8
1.2
V
15
26
ns
4
10
nC
Notes:
1: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθCA is determined by the user’s board design.
a. 78 °C/W when mounted on a 1 in2 pad of 2 oz copper on FR-4 board.
b. 156 °C/W when mounted on a minimum pad.
2: Pulse Test: Pulse Width<300 us, Duty Cycle<2.0%.
©2010 Fairchild Semiconductor Corporation
FDC655BN Rev.C2
2
www.fairchildsemi.com
FDC655BN Single N-Channel, Logic Level, PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
VGS = 10 V
VGS = 6 V
VGS = 4.5 V
ID, DRAIN CURRENT (A)
16
5
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
20
VGS = 3.5 V
12
8
VGS = 3 V
4
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
4
VGS = 3 V
3
VGS = 3.5 V
2
VGS = 4.5 V
1
0
0
0
0.5
1.0
1.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
2.0
8
rDS(on), DRAIN TO
1.2
1.0
0.8
0.6
-75
-50
-25
0
25
50
75
SOURCE ON-RESISTANCE (mΩ)
90
ID = 6.3 A
VGS = 10 V
1.4
12
16
20
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
4
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
80
ID = 6.3 A
70
60
50
TJ = 125 oC
40
30
20
TJ = 25 oC
10
100 125 150
2
TJ, JUNCTION TEMPERATURE (oC)
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
100
20
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
16
ID, DRAIN CURRENT (A)
VGS = 10 V
VGS = 6 V
VDS = 5 V
12
TJ = 150 oC
8
TJ = 25 oC
4
TJ = -55 oC
0
1.0
1.5
2.0
2.5
3.0
3.5
10
TJ = 150 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.2
4.0
VGS, GATE TO SOURCE VOLTAGE (V)
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2010 Fairchild Semiconductor Corporation
FDC655BN Rev.C2
VGS = 0 V
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDC655BN Single N-Channel, Logic Level, PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
1000
VGS, GATE TO SOURCE VOLTAGE (V)
10
ID = 6.3 A
Ciss
CAPACITANCE (pF)
8
VDD = 10 V
6
VDD = 15 V
4
VDD = 20 V
Coss
100
Crss
2
f = 1 MHz
VGS = 0 V
10
0.1
0
0
2
4
6
8
10
1
Figure 7. Gate Charge Characteristics
1000
P(PK), PEAK TRANSIENT POWER (W)
THIS AREA IS
LIMITED BY rDS(on)
ID, DRAIN CURRENT (A)
30
Figure 8. Capacitance vs Drain
to Source Voltage
100
10
1 ms
1
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
0.1
1s
Rθ JA = 156 oC/W
10 s
DC
TA = 25 oC
0.01
0.01
0.1
1
10
100
VGS = 10 V
100
SINGLE PULSE
RθJA = 156 oC/W
10
TA = 25 oC
1
0.1
-4
10
-3
10
VDS, DRAIN to SOURCE VOLTAGE (V)
2
1
0.1
-2
10
-1
10
1
100
10
1000
t, PULSE WIDTH (sec)
Figure 9. Forward Bias Safe
Operating Area
NORMALIZED THERMAL
IMPEDANCE, ZθJA
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 10. Single Pulse Maximum
Power Dissipation
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
0.01
t1
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 156 C/W
0.001
0.0003
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
©2010 Fairchild Semiconductor Corporation
FDC655BN Rev.C2
4
www.fairchildsemi.com
FDC655BN Single N-Channel, Logic Level, PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
tm
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I46
©2010 Fairchild Semiconductor Corporation
FDC655BN Rev.C2
5
www.fairchildsemi.com
FDC655BN Single N-Channel, Logic Level, PowerTrench® MOSFET
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