2N7002K N-Channel Enhancement Mode Field Effect Transistor Features • • • • • • • • Low On-Resistance Low Gate Threshold Voltage Low Input Capacitance Fast Switching Speed Low Input / Output Leakage Ultra-Small Surface Mount Package Pb Free / RoHS Compliant ESD HBM = 2000 V (Typical: 3000 V) as per JESD22 A114 and ESD CDM = 2000 V as per JESD22 C101 D D S G SOT-23 G Marking: 7K S Ordering Information Part Number Top Mark Package Packing Method 2N7002K 7K SOT-23 3L Tape and Reel Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted. Symbol Parameter Value Unit 60 V VDSS Drain-Source Voltage VDGR Drain-Gate Voltage (RGS ≤ 1.0 MΩ) 60 V VGSS Gate-Source Voltage ±20 V Continuous 300 Pulsed 800 ID Drain Current TJ Operating Junction Temperature Range -55 to +150 °C Storage Temperature Range -55 to +150 °C TSTG © 2009 Fairchild Semiconductor Corporation 2N7002K Rev. 1.1.0 mA www.fairchildsemi.com 2N7002K — N-Channel Enhancement Mode Field Effect Transistor September 2014 Values are at TA = 25°C unless otherwise noted. Symbol PD RθJA Parameter Value Unit Total Power Dissipation 350 mW Derate Above TA = 25°C 2.8 mW/°C Thermal Resistance, Junction-to-Ambient(1) 350 °C/W Note: 1. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch. Minimum land pad size. Electrical Characteristics Values are at TA = 25°C unless otherwise noted. Symbol Parameter Conditions Min. Max. Unit Off Characteristics(2) BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 10 μA VDS = 60 V, VGS = 0 V 1.0 IDSS Zero Gate Voltage Drain Current VDS = 60 V, VGS = 0 V, TJ = 125°C 500 IGSS Gate-Body Leakage VGS = ±20 V, VDS = 0 V ±10 μA 2.5 V 60 V μA On Characteristics(2) VGS(th) Gate Threshold Voltage RDS(ON) Static Drain-Source On-Resistance ID(ON) gFS VDS = VGS, ID = 250 μA 1.0 VGS = 10 V, ID = 0.5 A 2 VGS = 4.5 V, ID = 200 mA 4 Ω On-State Drain Current VGS = 10 V, VDS = 7.5 V 1.5 A Forward Transconductance VDS = 10 V, ID = 0.2 A 200 mS Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS= 0 V, f = 1.0 MHz 50 pF 15 pF 6 pF Switching Characteristics tD(ON) Turn-On Delay Time tD(OFF) Turn-Off Delay Time VDD = 30 V, IDSS = 200 mA, RG = 10 Ω, VGS = 10 V 5 ns 30 ns Note: 2. Short duration test pulse used to minimize self-heating effect. © 2009 Fairchild Semiconductor Corporation 2N7002K Rev. 1.1.0 www.fairchildsemi.com 2 2N7002K — N-Channel Enhancement Mode Field Effect Transistor Thermal Characteristics 3.0 VGS = 10V RDS(on), (Ω) DRANI-SOURCE ON-RESISTANCE ID. DRAIN-SOURCE CURRENT(A) 2.0 5V 1.5 4V 1.0 3V 0.5 2V 0.0 0 2 4 6 8 VGS = 3V 4.5V 2.0 6V 7V 5V 1.5 1.0 9V 10V 8V 0.5 0.0 10 4V 2.5 0.2 VDS. DRAIN-SOURCE VOLTAGE (V) 0.4 0.6 0.8 1.0 ID. DRAIN-SOURCE CURRENT(A) Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Gate Voltage and Drain Current RDS(on) (Ω) DRANI-SOURCE ON-RESISTANCE 3.0 VDS = 10V ID = 500 mA 2.5 2.0 1.5 1.0 0.5 -50 0 50 100 150 o TJ. JUNCTION TEMPERATURE( C) Figure 4. On-Resistance Variation with Gate-Source Voltage Figure 3. On-Resistance Variation with Temperature VDS = 10V 0.8 Vth, Gate-Source Threshold Voltage (V) ID. DRAIN-SOURCE CURRENT(A) 1.0 o 25( C) o TJ = -25( C) o 150( C) 0.6 o 125( C) 0.4 o 75( C) 0.2 0.0 2 3 4 5 VDS = VGS 1.8 ID = 1 mA 1.6 ID = 0.25 mA 1.4 1.2 1.0 -50 6 0 50 100 150 o VGS. GATE-SOURCE VOLTAGE (V) TJ. JUNCTION TEMPERATURE( C) Figure 6. Gate Threshold Variation with Temperature Figure 5. Transfer Characteristics © 2009 Fairchild Semiconductor Corporation 2N7002K Rev. 1.1.0 2.0 www.fairchildsemi.com 3 2N7002K — N-Channel Enhancement Mode Field Effect Transistor Typical Performance Characteristics VGS, GATE-SOURCE VOLTAGE (V) IS Reverse Drain Current, [mA] VGS = 0 V 100 o TA=150 C o 25 C 10 o -55 C 1 0.0 0.2 0.4 0.6 0.8 500mA 280mA 115mA 1.0 VSD, Body Diode Forward Voltage [V] Qg - Gate Charge Figure 7. Reverse Drain Current Variation with Diode Forward Voltage and Temperature Figure 8. Gate Charge Characteristics 1 100 μs ID, DRAIN CURRENT (A) 0.5 RDS(ON) LIMIT 0.05 1ms SINGLE PULSE RθJA = 350oC/W TA = 25oC 0.005 0.01 10ms 100ms 1s 10s DC 0.1 1 10 100 200 VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area © 2009 Fairchild Semiconductor Corporation 2N7002K Rev. 1.1.0 www.fairchildsemi.com 4 2N7002K — N-Channel Enhancement Mode Field Effect Transistor Typical Performance Characteristics (Continued) 2N7002K — N-Channel Enhancement Mode Field Effect Transistor Physical Dimensions 0.95 2.92±0.20 3 1.40 1.30+0.20 -0.15 1 2.20 2 0.60 0.37 (0.29) 0.95 0.20 1.00 A B 1.90 1.90 LAND PATTERN RECOMMENDATION SEE DETAIL A 1.20 MAX 0.10 0.00 (0.93) 0.10 C C 2.40±0.30 NOTES: UNLESS OTHERWISE SPECIFIED GAGE PLANE 0.23 0.08 A) REFERENCE JEDEC REGISTRATION TO-236, VARIATION AB, ISSUE H. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE INCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR EXTRUSIONS. D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M - 1994. E) DRAWING FILE NAME: MA03DREV10 0.25 0.20 MIN (0.55) SEATING PLANE SCALE: 2X Figure 10. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE © 2009 Fairchild Semiconductor Corporation 2N7002K Rev. 1.1.0 www.fairchildsemi.com 5 TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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