74LCX244MTC - Fairchild Semiconductor

74LCX244
Low Voltage Buffer/Line Driver with 5V Tolerant
Inputs and Outputs
Features
General Description
■ 5V tolerant inputs and outputs
The LCX244 contains eight non-inverting buffers with
3-STATE outputs. The device may be employed as a
memory address driver, clock driver and bus-oriented
transmitter/receiver. The LCX244 is designed for low
voltage (2.5V or 3.3V) VCC applications with capability of
interfacing to a 5V signal environment.
■ 2.3V to 3.6V VCC specifications provided
■ 6.5ns tPD max. (VCC = 3.3V), 10µA ICC max.
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal(1)
■ ±24mA output drive (VCC = 3.0V)
■ Implements proprietary noise/EMI reduction circuitry
■ Latch-up performance exceeds 500mA
The LCX244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.
■ ESD performance:
– Human body model > 2000V
– Machine model > 200V
■ Leadless DQFN package
Note:
1. To ensure the high-impedance state during power up
or down, OE should be tied to VCC through a pull-up
resistor: the minimum value or the resistor is
determined by the current-sourcing capability of the
driver.
Ordering Information
Order Number
74LCX244WM
74LCX244SJ
Package
Number
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX244BQX(2)
MLP20B
20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
JEDEC MO-241, 2.5 x 4.5mm
74LCX244MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
74LCX244MTC
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
December 2013
Pin Assignments for SOIC, SOP, SSOP, and TSSOP
Pad Assignments for DQFN
Truth Tables
Inputs
Outputs
OE1
In
(Pins 12, 14, 16, 18)
L
L
L
L
H
H
H
X
Z
Inputs
(Bottom View)
(Top Through View)
OE2
In
(Pins 3, 5, 7, 9)
L
L
L
L
H
H
H
X
Z
H = HIGH Voltage Level
L = LOW Voltage Level
Pin Description
Pin Names
Outputs
X = Immaterial
Z = High Impedance
Description
OE1, OE2
3-STATE Output Enable Inputs
I0–I7
Inputs
O0–O7
Outputs
DAP
No Connect
Note: DAP (Die Attach Pad)
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
2
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Logic Diagram
Connection Diagram
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VCC
Parameter
Rating
Supply Voltage
–0.5V to +7.0V
VI
DC Input Voltage
–0.5V to +7.0V
VO
DC Output Voltage
Output in 3-STATE
–0.5V to +7.0V
State(3)
–0.5V to VCC + 0.5V
IIK
DC Input Diode Current, VI < GND
–50mA
IOK
DC Output Diode Current
Output in HIGH or LOW
VO < GND
–50mA
VO > VCC
+50mA
IO
DC Output Source/Sink Current
ICC
DC Supply Current per Supply Pin
±100mA
IGND
DC Ground Current per Ground Pin
±100mA
TSTG
Storage Temperature
±50mA
–65°C to +150°C
Note:
3. IO Absolute Maximum Rating must be observed.
Recommended Operating Conditions(4)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC
Parameter
V
2.0
3.6
Data Retention
1.5
3.6
0
5.5
V
V
VO
Output Voltage
Δt / ΔV
Units
Operating
Input Voltage
TA
Max.
Supply Voltage
VI
IOH / IOL
Min.
3-STATE
0
5.5
HIGH or LOW State
0
VCC
Output Current
VCC = 3.0V–3.6V
±24
VCC = 2.7V–3.0V
±12
VCC = 2.3V–2.7V
±8
Free-Air Operating Temperature
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
mA
–40
85
°C
0
10
ns / V
Note:
4. Unused inputs must be held HIGH or LOW. They may not float.
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
3
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Absolute Maximum Ratings
TA = –40°C to +85°C
Symbol
VIH
VIL
VOH
VOL
Parameter
VCC (V)
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
2.3–2.7
1.7
2.7–3.6
2.0
Max.
0.7
2.7–3.6
0.8
IOH = –100µA
V
VCC – 0.2
2.3
IOH = –8mA
1.8
2.7
IOH = –12mA
2.2
3.0
IOH = –18mA
2.4
IOH = –24mA
2.2
V
IOL = 100µA
0.2
2.3
IOL = 8mA
0.6
2.7
IOL = 12mA
0.4
3.0
IOL = 16mA
0.4
IOL = 24mA
0.55
2.3–3.6
Units
V
2.3–2.7
2.3–3.6
LOW Level Output Voltage
Min.
Conditions
V
Input Leakage Current
2.3–3.6
0 ≤ VI ≤ 5.5V
±5.0
µA
IOZ
3-STATE Output Leakage
2.3–3.6
0 ≤ VO ≤ 5.5V,
VI = VIH or VIL
±5.0
µA
IOFF
Power-Off Leakage Current
0
VI or VO = 5.5V
10
µA
ICC
Quiescent Supply Current
µA
II
ΔICC
2.3–3.6
Increase in ICC per Input
2.3–3.6
VI = VCC or GND
10
3.6V ≤ VI, VO ≤ 5.5V(5)
±10
VIH = VCC – 0.6V
500
µA
Note:
5. Outputs disabled or 3-STATE only.
AC Electrical Characteristics
TA = –40°C to +85°C, RL = 500Ω
VCC = 3.3V ± 0.3V,
CL = 50pF
Symbol
Parameter
VCC = 2.7V,
CL = 50pF
VCC = 2.5V ± 0.2V,
CL = 30pF
Min.
Max.
Min.
Max.
Min.
Max.
Units
tPHL, tPLH
Propagation Delay,
Data to Output
1.5
6.5
1.5
7.5
1.5
7.8
ns
tPZL, tPZH
Output Enable Time
1.5
8.0
1.5
9.0
1.5
10.0
ns
tPLZ, tPHZ
Output Disable Time
1.5
7.0
1.5
8.0
1.5
8.4
ns
tOSHL, tOSLH
(6)
Output to Output Skew
1.0
ns
Note:
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate
outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-toLOW (tOSHL) or LOW-to-HIGH (tOSLH).
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
4
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
DC Electrical Characteristics
TA = 25°C
Typical
Unit
CL = 50pF, VIH = 3.3V, VIL = 0V
0.8
V
2.5
CL = 30pF, VIH = 2.5V, VIL = 0V
0.6
3.3
CL = 50pF, VIH = 3.3V, VIL = 0V
–0.8
2.5
CL = 30pF, VIH = 2.5V, VIL = 0V
–0.6
Symbol
Parameter
VCC (V)
VOLP
Quiet Output Dynamic Peak VOL
3.3
VOLV
Quiet Output Dynamic Valley VOL
Conditions
V
Capacitance
Symbol
Parameter
Conditions
Typical
Units
Input Capacitance
VCC = Open, VI = 0V or VCC
7.0
pF
COUT
Output Capacitance
VCC = 3.3V, VI = 0V or VCC
8.0
pF
CPD
Power Dissipation Capacitance
VCC = 3.3V, VI = 0V or VCC, f = 10MHz
25.0
pF
CIN
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
5
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Dynamic Switching Characteristics
Test
Switch
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH, tPHZ
GND
Figure 1. AC Test Circuit (CL includes probe and jig capacitance)
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and
Disable Times for Logic
trise and tfall
VCC
Symbol
3.3V ± 0.3V
2.7V
2.5V ± 0.2V
Vmi
1.5V
1.5V
VCC / 2
Vmo
1.5V
1.5V
VCC / 2
Vx
VOL + 0.3V
VOL + 0.3V
VOL + 0.15V
Vy
VOH – 0.3V
VOH – 0.3V
VOH – 0.15V
Figure 2. Waveforms (Input Characteristics; f = 1MHz, tr = tf = 3ns)
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
6
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
AC Loading and Waveforms (Generic for LCX Family)
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Schematic Diagram (Generic for LCX Family)
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
7
Tape Format for DQFN
Package Designator
Tape Section
Number of Cavities
Cavity Status
Cover Tape Status
BQX
Leader (Start End)
125 (typ.)
Empty
Sealed
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (typ.)
Empty
Sealed
Tape Dimension inches (millimeters)
Reel Dimensions inches (millimeters)
Tape Size
A
B
12mm
13.0 (330.0)
0.059 (1.50)
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
C
D
N
0.512 (13.00) 0.795 (20.20) 2.165 (55.00)
W1
W2
0.488 (12.4)
0.724 (18.4)
www.fairchildsemi.com
8
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Tape and Reel Specification
13.00
12.60
A
11.43
20
11
B
9.50
10.65 7.60
10.00 7.40
2.25
1
10
0.51
0.35
PIN ONE
INDICATOR
0.25
M
0.65
1.27
1.27
C B A
LAND PATTERN RECOMMENDATION
2.65 MAX
SEE DETAIL A
0.33
0.20
C
0.75
0.25
X 45°
0.10 C
0.30
0.10
SEATING PLANE
NOTES: UNLESS OTHERWISE SPECIFIED
(R0.10)
A) THIS PACKAGE CONFORMS TO JEDEC
MS-013, VARIATION AC, ISSUE E
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) CONFORMS TO ASME Y14.5M-1994
GAGE PLANE
(R0.10)
0.25
8°
0°
1.27
0.40
SEATING PLANE
(1.40)
DETAIL A
E) LANDPATTERN STANDARD: SOIC127P1030X265-20L
F) DRAWING FILENAME: MKT-M20BREV3
SCALE: 2:1
Figure 3. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
9
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued)
Figure 4. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
10
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued)
Figure 5. 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
11
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued)
Figure 6. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
12
74LCX244 — Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued)
Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
©1994 Fairchild Semiconductor Corporation
74LCX244 Rev. 1.12.2
www.fairchildsemi.com
13
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AccuPower¥
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SM
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Making Small Speakers Sound Louder
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®
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®
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SuperSOT¥-3
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®*
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative / In Design
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
Definition
Datasheet contains the design specifications for product development. Specifications may change
in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
Semiconductor reserves the right to make changes at any time without notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.
The datasheet is for reference information only.
Rev. I66
© Fairchild Semiconductor Corporation
www.fairchildsemi.com