www.fairchildsemi.com AN-9070 Smart Power Module Motion SPM® Products in SPM45H Packages Table of Contents Table of Contents ........................................................................................................................................ 1 Introduction ................................................................................................................................................. 2 Design Concept ....................................................................................................................................... 2 SPM45H Technology.............................................................................................................................. 2 Power Devices .................................................................................................................................... 2 IGBTs.................................................................................................................................................. 2 FRDs ................................................................................................................................................... 5 Gate Drive IC (HVIC, LVIC) ..................................................................................................................... 6 HVIC ....................................................................................................................................................... 6 LVIC ....................................................................................................................................................... 6 Package ................................................................................................................................................... 6 Outline & Pin Description .......................................................................................................................... 7 Outline Drawings .................................................................................................................................... 7 Descriptions of the Input and Output Pins ................................................................................................ 13 Internal Circuit .......................................................................................................................................... 13 Ordering Information ............................................................................................................................ 13 Key Parameter Design Guidance .............................................................................................................. 14 Short-Circuit Current Protection (SCP) ................................................................................................ 14 Selection of Shunt Resistor ....................................................................................................................... 15 Time Constant of Internal Time Delay ................................................................................................. 16 Soft Turn-Off ........................................................................................................................................ 17 Fault Output Circuit .............................................................................................................................. 19 Under-Voltage Lockout Protection (UVLO) ........................................................................................ 20 Circuit of Input Signal (VIN(H), VIN(L)) .................................................................................................. 21 Bootstrap Circuit Design....................................................................................................................... 22 Operation of Bootstrap Circuit.......................................................................................................... 22 Initial Charging of Bootstrap Capacitor ............................................................................................ 22 Selection of Bootstrap Capacitor .......................................................................................................... 24 Calculation Examples of Bootstrap Capacitance .............................................................................. 24 Built-in Bootstrap Diode ....................................................................................................................... 25 Circuit of NTC Thermistor (Monitoring of TC) .................................................................................... 26 General Application Circuit Example ....................................................................................................... 30 Print Circuit Board (PCB ) Layout Guidance ........................................................................................... 31 Packaging Specification ............................................................................................................................ 32 Related Resources ..................................................................................................................................... 34 © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com AN-9070 APPLICATION NOTE The detailed features and integrated functions are: Introduction Exceptionally small package size (WxD: 39mmx23mm) in three-phase inverter bridge module This application note supports the motion SPM® product in a SPM45H package. It should be used in conjunction with the motion SPM product datasheets, Fairchild’s SPM reference designs (RD-344, RD-345), and related application notes (AN-9071: Thermal Performance Information, AN-9072: Mounting Guidance). Advanced silicon technology IGBTs, FRDs for low power loss and high ruggedness Built-in NTC thermistor for sensing temperature of power chips Design Concept Easy PCB(print circuit board) layout due to built-in bootstrap diode and independent VS pin The key design objective of motion SPM product in the SPM45H package is to create minimized package and a low-power-consumption module with improved reliability. This is achieved by applying new three-in-one HVIC (gate-driving High-Voltage Integrated Circuit), new IGBT of advanced silicon technology, and improved ceramics substrate base transfer mold package. The new SPM45H package can achieve 40% reduction in size and improved reliability as compared with existing SPM3 package. 600V/5A to 20A ratings in one package (with identical mechanical layouts) High reliability due to advanced ceramic substrate transfer mold package Three-phase IGBT inverter bridge, including control ICs for gate drive and protection The second important design advantage is specialized inproduct line-up regarding each application. Target applications of motion SPM products in SPM45H packages are inverterized motor drives for household electric appliances such as air conditioners, washers, refrigerators, and fan motors. FNA4XX60X motion SPM specializes in slow switching frequency (under 5kHz) applications; such as refrigerators and air conditioners, due to low VCE(SAT) of IGBT. High-Side: UVLO (Under-Voltage Lockout) protection for control voltage without fault-out signal (VFO) - Low-Side: UVLO (Under-Voltage Lockout) and SCP (Short-circuit Current Protection) through external shunt resistor with fault-out signal (VFO) Soft turn-off function during protection functions Single-grounded power supply and opto-coupler-less interface due to built-in HVIC The FNB4XX60X motion SPM specializes in fast switching frequency (over 5kHz) applications; such as washing machines, dish washers, and fan motor drives; due to the low switching loss (ESW(ON), ESW(OFF)) of IGBTs/FRDs. Customers can choose the product option that best meets the design specifications. Minimized standby current of drive IC (HVIC/LVIC) for energy regulation Active-HIGH input signal logic resolves the startup and shutdown sequence restriction between VCC (control supply voltage) and signal input, providing fail-safe operation with direct connection between the motion SPM product and a 3.3V MCU or DSP without additional external sequence logic The third design advantage is the integrated NTC thermistor for temperature measuring of power chips (e.g. IGBTs, FRDs) on the same substrate. Most customers want to know the temperature of power chips precisely due to the impact on quality, reliability, and lifetime improvement. This desire is restricted because integrated power chips (e.g. IGBTs, FRD) inside modules are operated in high-voltage conditions. Therefore, instead of directly sensing the temperature of power chips, external NTC thermistors have been used for sensing the temperature of module or heatsink. Although this method doesn’t accurately reflect the temperature of power components; it is a simple and costeffective method. However, the NTC thermistor of the SPM45H package is integrated with power chips on the same ceramic substrate to more accurately measure the temperature of power chips. © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 - Isolation voltage rating of 2000Vrms for one minute due to minimized package size SPM45H Package Technology Power Devices The SPM45H package performance improvement is primarily the result of the technological advancement of the power devices (i.e., IGBT and FRD) in the three-phase inverter circuit. The design goal is reduction of power loss and increment of current density of the power devices. IGBTs The SPM45H package includes Fairchild's new technology. Through advanced NPT (non-punch-through) technology of IGBT, the package keeps a suitable SOA (Safe Operating Area) for each motor control application, while dramatically reducing the on-state conduction loss or turn-on/off switching losses. www.fairchildsemi.com 2 AN-9070 APPLICATION NOTE In the FNA4XX60X series, low VCE(SAT) is achieved by sacrificing turn-off switching power loss (ESW(OFF), IGBT turn off switching loss ) because there is a trade-off between VCE(SAT) (collector-to-emitter voltage) and ESW(OFF). Table 1 and Figure 1 show that the advanced NPT IGBT of FNA4XX60X series achieves almost 30% chip shrink with the same DC performance as compared with previous PT (Punch Through) IGBT and NPT (Non Punch Through) IGBT. The improved silicon technology enables the chip size to shrink while maintaining performance. The switching loss of the advanced NPT IGBT (especially, turnoff switching loss) is increased 60% as compared with that of NPT IGBT. Therefore, the main application of the FNA4XX60X series (applied advanced NPT IGBT) is low switching frequency applications, such as air conditioners and refrigerators. In the FNB4XX60X series, minimization of turn-on/off switching power loss (ESW(ON), ESW(OFF)) is accomplished by maximizing fast switching speed of the existing NPT IGBT. Table 1. Collector-Emitter Saturation Voltage & IGBT Turn-On/Off Switching Loss IGBT Chip Size [pu] PT IGBT 10A VCE(SAT) [V] at IC=10A, VCC=15V o ESW(OFF) [µJ], IC=10A, VCC=15V TJ=25 C TJ=125°C TJ=25°C TJ=125°C 1.3 1.90 2.00 520 760 NPT IGBT 10A 1.3 1.60 1.85 240 330 Advanced NPT IGBT 10A 1.0 1.60 1.75 360 580 Figure 1. Typical VCE(SAT) (Collector-to-Emitter Voltage) Comparison of IGBT Figure 2. Typical Turn-Off Switching Power Loss (at TJ=25°C, 125°C) Comparison of IGBT © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 3 AN-9070 APPLICATION NOTE TJ = 25oC VIN(VH) : 5V/div TJ = 125oC IC : 2A/div VCE : 100V/div PT IGBT 10A NPT IGBT 10A Adv. NPT IGBT 10A PT IGBT 10A NPT IGBT 10A Adv. NPT IGBT 10A Figure 3. Turn-Off Switching Waveform of Advanced NPT IGBT and Existing IGBTs Figure 4. IGBT Switching Test Circuit Diagram (Switching Conditions: VDC=300V, VCC=15V, CVBS=6.8μF, CVCC=220μF, Total Stray L<200nH) IGBT Turn-On Waveform VIN(VH) : 5V/div VCE : 100V/div IGBT Turn-Off Waveform VIN(VH) : 5V/div VCE : 100V/div IC : 5A/div IC : 5A/div Time : 200ns/div Time : 200ns/div Figure 5. FNA41060 Typical Turn-On, Turn-Off Waveform at TJ=125°C © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 4 AN-9070 APPLICATION NOTE FRDs The FRD apply an advanced STEALTH™ diode that has a low forward voltage drop and high breakdown voltage along with soft recovery characteristics. Advanced STEALTH™ diodes exhibit a low reverse recovery current (IRM(REC)) and exceptionally soft recovery under typical operation conditions. Table 2 shows the advantage of an advanced STEALTH™ diode in the SPM45H package, compared with the existing version of ultrafast diode in the existing SPM3 package. The advanced STEALTH diode is optimized to low loss performance in high-frequency hard-switched conditions. Table 2. Characteristics Comparison between Ultrafast Diode and Advanced STEALTHTM Diode Ultrafast Diode Advanced STEALTHTM Diode Test Conditions (TJ=125°C) trr [ns] ta [ns] tb [ns] Softness Factor Irr [A] IF=1A, dIF/dt=100A/μs, VR=30V 170.23 54.52 115.71 2.12 0.77 IF=15A, dIF/dt=100A/μs, VR=390V 147.44 52.75 94.69 1.80 5.43 IF=1A, dIF/dt=100A/μs, VR=30V 168.54 49.09 119.45 2.43 0.67 IF=15A, dIF/dt=100A/μs, VR=390V 188.25 45.44 142.81 3.14 4.40 Figure 6. trr Test Circuit Figure 7. trr Waveforms and Definitions Figure 8. trr Waveform Comparison between Ultrafast Diode and Advanced STEALTH™ Diode Figure 9. FRD Typical VF (Forward Drop Voltage) Comparison © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 5 AN-9070 APPLICATION NOTE Gate Drive IC (HVIC, LVIC) Package The HVIC (gate-driving high-voltage integrated circuits) and LVIC (gate-driving low-voltage integrated circuits) were designed as to have only the minimum necessary functionality required for low-power inverter drives. Since heat dissipation is an important factor that limits the power module’s current capability, the heat dissipation characteristics are critical in determining the SPM45H package performance. A trade-off exists among heat dissipation characteristics, package size, and isolation characteristics. The key to a good package technology lies in the accomplishment of optimization package size while maintaining outstanding heat dissipation characteristics without compromising the isolation rating. HVIC The SPM45H package three-in-one HVIC includes the functions of three HVICs for optimized package design. The HVIC has a built-in high-voltage level-shift function that enables the ground referenced PWM signal to be sent directly to the motion SPM product’s assigned high-side IGBT gate circuit, which enables opto-coupler-less interface and simplifies system design. The HVIC has built-in UVLO (under-voltage lockout) protection for VBS. Because the bootstrap charge-pump circuit interconnects to the low-side VCC bias external to the motion SPM product, the high-side gate drive power can be obtained from a single 15V control supply referenced to control ground. It is not necessary to have three isolated voltage sources for the high-side IGBT gate drive, as is required in inverter systems using conventional power modules. Recent progress in the HVIC technology includes chip downsizing through the introduction of wafer fine process technology. Logic input of HVIC is compatible with standard 3.3/5.0V CMOS/LSTTL outputs. HVIC’s high-voltage process and common-mode noise cancellation technique provide stable operation in the high-side driver under high-dv/dt noise circumstances. All HVIC include prevention functions of malfunctions, such as latch by high-dv/dt. In the SPM45H package, technology was developed in which bare ceramic with good heat dissipation characteristics is attached directly to the lead frame. This technology already applied in SPM3, but was improved through new adhesion methods. This made it possible to achieve improved reliability and heat dissipation, while maintaining cost effectiveness. Figure 10 shows the package outline and the cross sections of the SPM45H package. LVIC The new LVIC of SPM45H package’s low standby current and logic input of LVIC are compatible with standard 3.3/5.0V CMOS/LSTTL outputs. The LVIC has built-in UVLO (under-voltage lockout) for VCC and SCP (Shortcircuit Current Protection), as well as OCP (Over-Current Protection) for internal power components. Cu Wiring B/D Al Wiring Lead Frame IC IGBT FRD Ceramic (Isolation material) Adhesive material EMC(Epoxy Molding Compound) Figure 10. Vertical Structure of SPM45H Package © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 6 AN-9070 APPLICATION NOTE Outline & Pin Description Outline Drawings Figure 11. SPM26-AAA, Short-Lead & Normal Forming Option © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 7 AN-9070 APPLICATION NOTE Figure 12. SPM26-AAB, Short-Lead & Signal and N terminal Double Forming Option © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 8 AN-9070 APPLICATION NOTE Figure 13. SPM26-AAC, Long-Lead & Normal Forming Option © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 9 AN-9070 APPLICATION NOTE Figure 14. SPM26-AAD, Long-Lead & Signal N terminal Double Forming Option © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 10 AN-9070 APPLICATION NOTE Descriptions of the Input and Output Pins Table 3 defines the input and output pins of the motion SPM product in the SPM45H package. Pin # Name Pin Description 22 VB(W) High-Side Bias Voltage for W Phase IGBT Driving 23 VS(V) High-Side Bias Voltage Ground for V Phase IGBT Driving 24 VB(V) High-Side Bias Voltage for V Phase IGBT Driving 25 VS(U) High-Side Bias Voltage Ground for U Phase IGBT Driving 26 VB(U) High-Side Bias Voltage for U Phase IGBT Driving High-Side Bias Voltage Pins for Driving the IGBT/HighSide Bias Voltage Ground Pins for Driving the IGBTs ►Pins: VB(U)-VS(U), VB(V)-VS(V), VB(W)-VS(W) Figure 15. Pin Configuration Table 3. Pin Descriptions Pin # Name 1 VTH Thermistor Bias Voltage RTH Series Resistor for the Use of Thermistor (Temperature Detection) 2 These are drive power supply pins for providing gate drive power to the high-side IGBTs. The virtue of the ability to bootstrap the circuit scheme is that no external power supplies are required for the high-side IGBTs. Pin Description 3 P Positive DC-Link Input 4 U Output for U Phase 5 V Output for V Phase Each bootstrap capacitor is charged from the VCC supply during the on-state of the corresponding lowside IGBT. To prevent malfunctions caused by noise and ripple in supply voltage, a good quality (low ESR, low ESL) filter capacitor should be mounted close to these pins. 6 W Output for W Phase 7 NU Negative DC-Link for U Phase Low-Side Bias Voltage Pin / High-Side Bias Voltage Pins 8 NV Negative DC-Link for V Phase ►Pins: VCC(L), VCC(H) 9 NW Negative DC-Link for W Phase These are control supply pins for the built-in ICs. 10 CSC Capacitor (Low-Pass Filter) for ShortCircuit Current Detection Input These two pins should be connected externally. 11 VFO Fault Output 12 IN(WL) Signal Input for Low-Side W Phase 13 IN(VL) Signal Input for Low-Side V Phase 14 IN(UL) Signal Input for Low-Side U Phase To prevent malfunctions caused by noise and ripple in the supply voltage, a good quality (low ESR, low ESL) filter capacitor should be mounted close to these pins. Low-Side Common Supply Ground Pin ►Pin: COM 15 COM Common Supply Ground 16 VCC(L) Low-Side Common Bias Voltage for IC and IGBTs Driving The motion SPM product common pin connects to the control ground for the internal ICs. 17 VCC(H) High-Side Common Bias Voltage for IC and IGBTs Driving Important! To avoid noise influences, the main power circuit current should not be allowed to blow through this pin. 18 IN(WH) Signal Input for High-Side W Phase 19 IN(VH) Signal Input for High-Side V Phase 20 IN(UH) Signal Input for High-Side U Phase 21 VS(W) High-Side Bias Voltage Ground for W Phase IGBT Driving © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 11 AN-9070 APPLICATION NOTE Signal Input Pins Thermistor Bias Voltage ►Pins: IN(UL), IN(VL), IN(WL), IN(UH), IN(VH), IN(WH) ►Pin: VTH These pins control the operation of the built-in IGBTs. This is the bias voltage pin of the internal thermistor. It should be connected to the 5V logic power supply. They are activated by voltage input signals. The terminals are internally connected to a Schmitt-trigger circuit composed of 5V-class CMOS. Series Resistor for the Use of Thermistor (Temperature Detection) The signal logic of these pins is active HIGH. The IGBT associated with each of these pins is turned ON when a sufficient logic voltage is applied to these pins. ►Pin: RTH For case temperature (TC) detection, this pin should be connected to an external series resistor. The wiring of each input should be as short as possible to protect the motion SPM product against noise influences. The external series resistor should be selected to meet the detection range matched for the specification of each application (for details, refer to Figure 42). To prevent signal oscillations, an RC coupling is recommended as illustrated in Figure 32. Positive DC-Link Pin ►Pin: P Short-Circuit Current Detection Pins This is the DC-link positive power supply pin of the inverter. ►Pin: CSC The current-sensing shunt resistor should be connected between the low-pass filter before the pin CSC and the low-side ground COM to detect short-circuit current (reference Figure 20). It is internally connected to the collectors of the highside IGBTs. To suppress the surge voltage caused by the DC-link wiring or PCB pattern inductance, connect a smoothing filter capacitor close to this pin (typically, metal film capacitors are used). The shunt resistor should be selected to meet the detection levels matched for the specific application. An RC filter should be connected to the CSC pin to eliminate noise. Negative DC-Link Pin The connection length between the shunt resistor and CSC pin should be minimized. ►Pins: NU, NV, NW These are the DC-link negative power supply pins (power ground) of the inverter. Fault Output Pin ►Pin: VFO These pins are connected to the low-side IGBT emitters of the each phase. This is the fault output alarm pin. An active LOW output is given on this pin for a fault state condition in the SPM. Inverter Power Output Pin ►Pins: U, V, W The alarmed conditions are SCP (Short-Circuit Current Protection) or low-side bias UVLO (Under Voltage Lockout) operation. Inverter output pins for connecting to the inverter load (e.g. motor). The VFO output is open-drain configured. The VFO signal line should be pulled up to the 5V logic power supply with approximately 4.7kΩ resistance. © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 12 AN-9070 APPLICATION NOTE Internal Circuit Ordering Information Figure 16 illustrates the block diagram of the motion SPM in SPM45H. Note that the motion SPM consists of a threephase IGBT inverter circuit power block, two drive ICs for control functions, one NTC thermistor for temperature detection, and three bootstrap diodes. FNA41060XXX Customer Option Lead-Forming Option NC : SPM26-AAA (Short-Lead & Normal Forming) 1 : SPM26-AAB (Short-Lead & Double Forming) 2 : SPM26-AAC (Long-Lead & Normal Forming) 3 : SPM26-AAD (Long Lead & Double Forming) 4~9 : Other Lead Option Silicon Technology NC(B) : Planar NPT IGBT F : Planar Field-Stop IGBT T : Trench Field-Stop IGBT S : SuperFET Voltage Rating 60 : 600V rating Current Rating 05 : 5A rating 08 : 8A rating 10 : 10A rating 15 : 15A rating 20 : 20A rating 4 : SPM45H Package Package Option (refer to right table) Product Category N : Inverter module P : Converter Module with PFC M : CI module (Converter+Inverter) F : Fairchild Semiconductor Figure 17. Top Mark Information Table 4. Package Options Suffix Substrate NTC Thermistor Product Option A Ceramic Yes Normal B Ceramic Yes Fast D Ceramic No Normal E Ceramic No Fast Figure 16. Internal Block Diagram © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 13 AN-9070 APPLICATION NOTE Key Parameter Design Guidance Short-Circuit Current Protection (SCP) SPM45H packages use an external shunt resistor for the short-circuit current detection, as shown in Figure 18. The LVIC has built-in short-circuit current protection that senses the voltage to the CSC pin and, if this voltage exceeds the VSC(REF) (the threshold voltage trip level of the short-circuit) specified in the devices datasheets(VSC(REF),Typ. is 0.5V), a fault signal is asserted and the all lower arm IGBTs are turned off. Typically the maximum short-circuit current magnitude is gate voltage dependent. A higher gate voltage (VCC & VBS) results in a larger short-circuit current. To avoid this potential problem, the maximum short-circuit trip level is generally set to below 1.7 times the nominal rated collector current. The LVIC short-circuit current protectiontiming chart is shown in Figure 19. Figure 18. Operation of Short-Circuit Current Protection Figure 19. Timing Chart of Short-Circuit Current Protection Function Notes: C1. Normal operation: IGBT ON and carrying current C2. Short-circuit current detection (SC trigger) C3. Hard IGBT gate interrupt C4. IGBT turns OFF C5. Fault output timer operation start: Fault-out width (tFOD) = min. 30μs C6. Input “L”: IGBT OFF state C7. Input “H”: IGBT ON state; but during the active period of fault output, the IGBT doesn’t turn ON C8. IGBT OFF state © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 14 AN-9070 APPLICATION NOTE Selection of Shunt Resistor Table 5. Figure 20 shows an example circuit of the SC protection using one shunt resistor. The line current on the N-side DClink is detected and the protective operation signal is passed through the RC filter. If the current exceeds the SC reference level, all the gates of the N-side three-phase IGBTs are switched to OFF state and the FO fault signal is transmitted to MCU. Since SC protection is non-repetitive, IGBT operation should be immediately halted when the FO fault signal is given. Specification for SCP Level (VSC(ref)) Conditions Min. Typ. Max. Unit Specification at o TJ =25 C, VCC =15V 0.45 0.50 0.55 V Table 6. Operating Short-Circuit Current Range (RSHUNT=24.4mΩ (min.)(1), 25.7mΩ (typ.), 27.0mΩ (max.)) Conditions Min.(2) Typ.(3) Max.(4) Unit Operating SC Level at TJ =25oC 16.66 19.43 22.50 A Notes: 1. RSHUNT(min): VSC(max)/ISC(max) = 0.55 / 22.5 = 24.4mΩ. 2. ISC(min): VSC(min)/RSHUNT(max) = 0.45 / (0.0244/0.95x1.05) = 16.66A. 3. ISC(typ): VSC(typ)/RSHUNT(typ) = 0.50 / (0.0244/0.95) = 19.43A. 4. Maximum SC trip level: 1.5 x IC = 1.5 x 15 = 22.5A. Power rating of shunt resistor calculation examples: Maximum load current of inverter (Irms): 5Arms Figure 20. Example of Short-Circuit Current Protection Circuit with One Shunt Resistor Shunt resistor value at TC=25oC (RSHUNT): 24.8mΩ Derating ratio of shunt resistor at TSHUNT=100oC: 70% (refer to Figure 21) The value of shunt resistor is calculated by the following equations. Safety margin: 20% Maximum SC current trip level: ISC(max)=1.5 x IC(rated current) PSHUNT : (I2rms X RSHUNT X Margin)/Derating Ratio = (52 X 0.0248 X 1.2)/0.7 = 1.1W (1) SC trip referenced voltage: VSC=min. 0.45V, typ. 0.5V, max. 0.55V (7) Therefore, the proper power rating of shunt resistor is over 2.0W. (2) Shunt resistance: ISC(max)=VSC(max)/RSHUNT(min) RSHUNT(min)=VSC(max)/ISC(max) (3) If the deviation of shunt resistor is limited below ±5%: RSHUNT(typ) = RSHUNT(min)/0.95, RSHUNT(max) = RSHUNT(typ) X 1.05 (4) And the actual SC trip current level becomes: ISC(typ)=VSC(typ) / RSHUNT(typ), ISC(min) = VSC(min) / RSHUNT(max) (5) The power rating of shunt resistor is calculated by the following equation: PSHUNT = (I2RMS X RSHUNT X Margin) / Derating Ratio (6) Maximum load current of inverter (Irms) Figure 21. Derating Curve Example of Shunt Resistor (from RARA ELEC.) o Shunt resistor typical value at TC=25 C (RSHUNT) Derating ratio of shunt resistor at TSHUNT=100oC (from datasheet of shunt resistor) Safety margin (determined by customer) The value of shunt Resistor calculation Examples: FNA41560, Shunt Resistor dispersion: ±5%. © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 15 AN-9070 APPLICATION NOTE Time Constant of Internal Time Delay VIN: Voltage of Input Signal VCSC: Voltage of CSC Pin LOUT: VGE of Low-Side IGBT ISC: Short-Circuit Current VFO: Voltage of VFO Pin An RC filter (reference RFCSC in Figure 20) is necessary to prevent noise-related SCP (Short-circuit Current Protection) circuit malfunction. The RC time constant is determined by the applied noise time and the SCWT (Short-circuit Current Withstanding Time) of motion SPM products. When the external shunt resistor voltage drop exceeds the SCP level, this is applied to the CSC pin via the RC filter. The RC filter delay time (T1) is the time required for the CSC pin voltage to rises to the referenced SCP level, Table 7 shows the specification of the SCP level. The LVIC has an internal filter time (logic filter time for noise elimination: T2). Therefore, considered this filter time when designing the RC filter of VCSC. Table 7. Specification for SCP level (VSC(ref)) Conditions Min. Typ. Max. Unit 0.45 0.50 0.55 V o Specification at TJ =25 C, VCC =15V Figure 22. Timing Diagram Notes: T1: Filtering time of RC filter of VCSC T2: Filtering time of CSC. If VCSC width is less than T2, SCP does not operate. T3: Delay from CSC triggering to gate-voltage down T4: Delay from CSC triggering to short-circuit current T5: Delay from CSC triggering to fault-out signal Table 8. Timetable on Short-Circuit Conditions: VCSC to LOUT, ISC, VFO DUT FNA40860 Typ. at TJ=25oC Typ. at TJ=150oC T2 = 0.40μs T2 = 0.30μs T3 = 0.65μs T3 = 0.60μs T4 = 0.80μs T4 = 0.75μs T5 = 1.20μs T5 = 1.75μs Max. at TJ=25oC Considering ±20% Dispersion, T4=1.0μs Notes: 5. To guarantee safe short-circuit protection under all operating conditions, CSC should be triggered within 1.0μs after the o short-circuit occurs (SCWT < 2.0μs, Conditions: VDC=400V VCC=16.5V, TJ=150 C, from datasheet of FNA40860). 6. It is recommended that the time delay from short-circuit to CSC triggering should be minimized. © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 16 AN-9070 APPLICATION NOTE Figure 23 and Figure 24 show operating waveforms of SCP (Short-Circuit Current Protection) function. Normally, T (Tau, time constant of RC filter of CSC) doesn’t accurately operate due to fast di/dt of ISC (short-circuit current). Therefore, consider this kind of situation when deciding time constant of RC filter of CSC. Normally, T (time constant of RC filter of CSC) accurately operates in OCP (Over-Current Protection). Soft Turn-Off The LVIC has a soft turn-off function to protect low-side IGBTs from over voltage of VPN (supply voltage) by shortcircuit hard off. “Short-circuit hard off” means IGBTs are turned off by short input signal before operation of SCP (Short-circuit Current Protection) function under shortcircuit condition. In this case, VPN (supply voltage) rapidly raises di/dt of ISC (short-circuit current). This kind of rapid rise of VPN causes destruction of IGBT by over voltage. The soft-off function prevents IGBT rapid turning off by slow discharging of VGE (gate to emitter voltage of IGBT). Block diagrams of LVIC and the operation sequence of the soft turn-off function are shown in Figure 25 and Figure 26. There are two internal protection functions, UVLO and SCP. When IGBT is turned off in normal conditions, LVIC turns off the IGBT immediately by a turn-off gate signal (VIN_L) via gate driver block (pre-driver turn-on output buffer of gate driver block, path ① in Figure 26). However, when IGBT is turned off by a protection function, the gate driver is disabled by the protection function signal via the output of the protection circuit (disable output buffer, highZ). Output of the protection circuit turns on the switch of soft-off function. Therefore, VGE is discharged slowly via circuit of soft-off. (path ② in Figure 26). Figure 23. Waveform of SCP (Short-Circuit Current Protection) Function (Time Constant of RC Filter: 2μs (RSC=62[Ω], CSC=33[nF]), RSHUNT=40[mΩ]) Figure 24. Waveform of SCP (Short-Circuit Current Protection) Function (Time Constant of RC Filter: 2μs (RSC=62[Ω], CSC=33[nF]), RSHUNT=40[mΩ]) Figure 25. Internal Block Diagram Therefore, the TTOTAL (total time) from the detection of the SC trip current to the gate off of the IGBT becomes: tTOTAL=RC filter delay time (T1) + Delay from CSC trigger to (8) ISC (T4) Therefore, total delay time (tTOTAL) should be less than SCWT: SCWT > tTOTAL (T1 + T4) (9) where SCWT = Short Circuit Withstanding Time. It is recommended that the time constant of RC filter should be set in the range of 1.0 ~ 2.0μs to protect from destruction under most operating conditions. Figure 26. Operation Sequence of Soft Turn-Off © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 17 AN-9070 APPLICATION NOTE Figure 27 shows that the normal turn-off switching operations can be performed satisfactorily at a VPN=450V, TJ=25, 150oC, with the surge voltage between P and N pins (VPN(Surge)) limited to under 500V. VPN(SURGE) @ TJ=25o C VPN(SURGE) @ TJ=150o C The difference between the hard and soft turn-off switching operation is shown in Figure 28. The hard turn-off of the IGBT makes a large overshoot (up to 100V). Hence, the DC-link capacitor supply voltage should be limited to 400V to protect the motion SPM product. A hard turn-off, with a duration of less than approximately 2μs, may occur in the case of a short-circuit fault. For a normal short-circuit fault, the protection circuit becomes active and the IGBT is turned off softly to prevent excessive overshoot voltage. An overshoot voltage of 40~70V occurs for this conditions. IC=2.0[A/div] IC @ TJ=25o C IC @ TJ=150o C VPN =100[V/div] Figure 27and Figure 28 are the experimental results of the safe operating area test. However, it is strongly recommended that the motion SPM product should not be operated under these conditions. Time [200ns/div] Figure 27. Normal Current Turn-Off Waveform of o FNA40860 at VPN=450V, TJ=25, 150 C TJ=150 [o C] VPN(SURGE) @ Hard-Off, ΔVPN =100V VPN(SURGE) @ Soft-Off, ΔVPN =70V VPN =100[V/div] IC @ Hard-Off IC @ Soft-Off IC=20[A/div] Time [200ns/div] Figure 28. Short-Circuit Current Turn-Off Waveform of FNA40860 at VPN=400V, TJ=150oC © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 18 AN-9070 APPLICATION NOTE Table 9. Detailed Description of Absolute Maximum Ratings (FNA40860 Case, see Datasheet) Item Symbol Rating Supply Voltage VPN 450V Supply Voltage (Surge) VPN(surge) 500V Collector-Emitter Voltage VCES 600V Each IGBT Collector Current ±IC 8A Junction Temperature TJ -40~150oC Self Protection Supply Voltage Limit (ShortCircuit Protection Capability) VPN(PROT) 400V Description The maximum steady-state (non-switching mode) voltage between P-N. A brake circuit is necessary if P-N voltage exceeds this value. The maximum surge voltage (switching mode) between P-N. A snubber circuit is necessary if P-N surge voltage exceeds this value. The sustained collector-emitter voltage of built-in IGBT The maximum allowable DC continuous IGBT collector current o at TC=25 C The maximum junction temperature rating of the power chips o integrated within the motion SPM is 150 C. However, to ensure safe operation of the motion SPM, average junction temperature should be limited to 125oC. Although IGBT and FRD chip are not damaged immediately at TJ=150oC, its power cycles come to be decreased. Under the conditions where VCC=13.5 ~ 16.5V, non-repetitive, less than 2μs. The maximum supply voltage for safe IGBT turnoff under SC (Short-Circuit Current) or OC (Over Current) condition. The power chip may be damaged if supply voltage exceeds this specification. Fault Output Circuit Table 10. Fault-Output Maximum Ratings Item Symbol Condition Rating Unit Fault Output Voltage VFO Applied between VFO-COM -0.3~VCC+0.3 V Fault Output Current IFO Sink Current at VFO Pin 1.0 mA Table 11. Electric Characteristics Item Fault Output Voltage Symbol Conditions Min. VFOH VSC=0V, VFO Circuit: 4.7kΩ to 5V Pull-Up 4.5 VFOL VSC=1V, VFO Circuit: 4.7kΩ to 5V Pull-Up Typ. Max. Unit V 0.5 V 0.30 o TJ=150[ C] Because the VFO terminal is an open-drain type, it should be pulled up to 5V or 15V via a pull-up resistor. The resistor has to satisfy the above specifications. 0.25 VFO [V] 0.20 0.15 0.10 0.05 0.00 0.0 0.2 0.4 IFO [mA] 0.6 0.8 1.0 Figure 29. Voltage-Current Characteristics of VFO Terminal © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 19 AN-9070 APPLICATION NOTE Under-Voltage Lockout Protection (UVLO) The LVIC has an under-voltage lockout protection function to protect low-side IGBTs from operation with insufficient gate driving voltage. A timing chart for this protection is shown in Figure 30. Figure 30. Timing Chart of Low-Side Under-Voltage Protection Function Notes: a1. Control supply voltage rise: After the voltage rises UVCCR, the circuits start to operate when next input is applied. a2. Normal operation: IGBT ON and carrying current a3. Under-voltage detection (UVCCD) a4. IGBT OFF in spite of control input condition a5. Fault output operation starts a6. Under-voltage reset (UVCCR) a7. Normal operation: IGBT ON and carrying current The HVIC has an under-voltage lockout function to protect the high-side IGBT from insufficient gate driving voltage. A timing chart for this protection is shown in Figure 31. A FO alarm is not given for low HVIC bias conditions. Figure 31. Timing Chart of High-Side Under-Voltage Protection Function Notes: b1. Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied. b2. Normal operation: IGBT ON and carrying current b3. Under-voltage detection (UVBSD) b4. IGBT OFF in spite of control input condition, but there is no fault output signal. b5. Under-voltage reset (UVBSR) b6. Normal operation: IGBT ON and carrying current © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 20 AN-9070 APPLICATION NOTE Table 12. Specification for UVLO (Under-Voltage Lockout) Function Item Parameter UVCCD UVCCR UVBSD Supply Circuit Under-Voltage Protection UVBSR Conditions Min. Max. Unit Detection Level 10.5 13.0 V Reset Level 11.0 13.5 V Detection Level 10.0 12.5 V Reset Level 10.5 13.0 V Circuit of Input Signal (VIN(H), VIN(L)) Figure 32 shows the I/O interface circuit between the MCU and motion SPM products. Because the motion SPM input logic is active HIGH and there are built-in pull-down resistors, external pull-down resistors are not needed. Figure 33. Internal Structure of Signal Input Terminal The SPM45H employs active-HIGH input logic. This removes the sequence restriction between the control supply and the input signal during startup or shutdown operation. Therefore, it makes the system fail-safe. In addition, pulldown resistors are built-in to each input circuit. External pull-down resistors are not needed, reducing external components. The input noise filter inside the motion SPM product suppresses short pulse noise and prevents the IGBT from malfunction and excessive switching loss. Furthermore, by lowering the turn-on and turn-off threshold voltages of the input signal, as shown in Table 14, a direct connection to 3.3V-class MCU or DSP is possible. Figure 32. Recommended CPU I/O Interface Circuit Table 13. Maximum Ratings of Input and FO Pins Item Symbol Condition Rating Unit Control Supply Voltage VCC Applied between VCC(H)-COM, VCC(L)-COM 20 V Input Signal Voltage Fault Output Supply Voltage VIN VFO Table 14. Input Threshold Voltage Ratings (at VCC=15V, TJ=25oC) Applied between IN(UH), IN(VH), -0.3 ~ VCC IN(WH)-COM +0.3 IN(UL), IN(VL), IN(WL)-COM V Applied between -0.3 ~ VCC VFO-COM +0.3 V The input and fault output maximum rating voltages are shown in Table 13. Since the fault output is open-drain configured, its rating is VCC+0.3V, 15V supply interface is possible. However, it is recommended that the fault output be configured with the 5V logic supply, which is the same as the input signals. It is also recommended that the decoupling capacitors be placed at both the MCU and motion SPM ends of the VFO and the signal line as close as possible to each device. The RC coupling at each input (parts shown dotted in Figure 32 might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s PCB layout. © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 Item Symbol Condition Min. Max. Unit Turn-On Threshold Voltage VIN(ON) 2.6 Turn-Off Threshold Voltage VIN(OFF) IN(UH), IN(VH), IN(WH)-COM IN(UL), IN(VL), IN(WL)-COM 0.8 V V As shown in Figure 33, the input signal section of µMini DIP package family in motion SPM products integrates a 5kΩ (typical) pull-down resistor. Therefore, when using an external filtering resistor between the MCU output and the motion SPM input, attention should be given to the signal voltage drop at the motion SPM input terminals to satisfy the turn-on threshold voltage requirement. For instance, R=100Ω and C=1nF for the parts shown dotted in Figure 32. www.fairchildsemi.com 21 AN-9070 APPLICATION NOTE Initial Charging of Bootstrap Capacitor Adequate on-time duration of the low-side IGBT to fully charge the bootstrap capacitor is required for initial bootstrap charging. The initial charging time (tcharge) can be calculated from the following equation: Bootstrap Circuit Design Operation of Bootstrap Circuit The VBS voltage, which is the voltage difference between VB(U,V,W) and VS(U,V,W), provides the supply to the HVIC within the SPM45H family of motion SPM products. This supply must be in the range of 13.0V~18.5V to ensure that the HVIC can fully drive the high-side IGBT. The SPM45H package includes an under-voltage lockout protection for the VBS to ensure that the HVIC does not drive the high-side IGBT, if the VBS voltage drops below a specific voltage (refer to the datasheet). This function prevents the IGBT from operating in a high-dissipation mode. t ch arg e CBS R BS VCC 1 (10) In VCC VBS(min) VF VLS where: VF = forward voltage drop across the bootstrap diode; VBS(min) = minimum value of the bootstrap capacitor; VLS = voltage drop across the low-side IGBT or load; and δ = duty ratio PWM. The VBS floating supply can be generated a number of ways, including the bootstrap method described here (refer to Figure 34). This method has the advantage of being simple and inexpensive; however, the duty cycle and on-time are limited by the need to refresh the charge in the bootstrap capacitor. The bootstrap supply is formed by a combination of bootstrap diode, resistor, and capacitor as shown in Figure 35and Figure 36. The current flow path of the bootstrap circuit is show in Figure 35. When VS is pulled down to ground (either through the low-side or the load), the bootstrap capacitor CBS) is charged through the bootstrap diode (DBS) and the resistor (RBS) from the VCC supply. Figure 35. Bootstrap Circuit VPN 0V VCC 0V VBS 0V Figure 34. Bootstrap Circuit for the Supply Voltage (VBS) of a HVIC ON VIN(L) 0V VIN(H) 0V Section of charge pumping for VBS : Switching or Full Turn on Start PWM OFF Figure 36. Timing Chart of Initial Bootstrap Charging Figure 37 and Figure 38 show real waveforms of the initial bootstrap capacitor charging. © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 22 AN-9070 APPLICATION NOTE Figure 37. Each Part Initial Operating Waveform of Bootstrap Circuit (Conditions: VDC=300V, VCC=15V, CBS=22μF, LS IGBT Turn-on Duty=200μs) Figure 38. Each Part Operating Waveform of Bootstrap Circuit (Conditions: VDC=300V, VCC=15V, CBS=22μF, LS IGBT Full Turn-on) © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 23 AN-9070 APPLICATION NOTE Selection of Bootstrap Capacitor Calculation Examples of Bootstrap Capacitance The bootstrap capacitance can be calculated by: ILeak = 2.0mA (recommendation value) C BS I Leak t V BS ΔVBS = 0.1V (recommendation value) (11) Δt = 0.2ms (depends on user system) where: Δt = maximum on pulse width of high-side IGBT; ΔVBS = the allowable discharge voltage of the CBS (voltage ripple); and ILeak = maximum discharge current of the CBS. C BS _ min ILeak t 2mA 0 .2ms 4 .0 10 6 VBS 0 .1V (12) → More than 2~3 times → 8µF. Note: 7. This capacitance value can be changed according to the switching frequency, capacitor used, and recommended VBS voltage of 13.0~18.5V (from datasheet). The above result is just a calculation example. This value can be changed according to the actual control method and lifetime of component. Mainly via the following mechanisms: Gate charge for turning the high-side IGBT on… Quiescent current to the high-side circuit in the HVIC Level-shift charge required by level-shifters in HVIC Leakage current in the bootstrap diode CBS capacitor leakage current (ignored for nonelectrolytic capacitors) Bootstrap diode reverse recovery charge. Practically, 2mA of ILeak is recommended for SPM45H family in motion SPM products. By taking consideration of dispersion and reliability, the capacitance is generally selected to be 2~3 times of the calculated one. The CBS is only charged when the high-side IGBT is off and the VS voltage is pulled down to ground. Therefore, the on-time of the low-side IGBT must be sufficient to ensure that the charge drawn from the CBS capacitor can be fully replenished. Hence, there is an inherent minimum on-time for the low-side IGBT (or off-time of the high-side IGBT). © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 Figure 39. Capacitance of Bootstrap Capacitor on Variation of Switching Frequency www.fairchildsemi.com 24 AN-9070 APPLICATION NOTE Built-in Bootstrap Diode When the high-side IGBT or FRD conducts, the bootstrap diode (DBS) supports the entire bus voltage. Hence, a withstand voltage of more than 600V is recommended. It is important that this diode be fast recovery (recovery time < 100ns) to minimize the amount of charge fed back from the bootstrap capacitor into the VCC supply. One role of the bootstrap resistor (RBS) is to slow down the dVBS/dt and limit initial charging current (Icharge) of bootstrap capacitor. o BOOTSTRAP DIODE VF-IF CHARACTERISTICS, TJ=25 C 1.4 1.2 IF [A] 1.0 Normally, bootstrap circuits consists of bootstrap diode (DBS), bootstrap resistor (RBS), and bootstrap capacitor (CBS). The built-in bootstrap diode of SPM45H package has bootstrap resistor characteristic by special VF characteristics (refer to Figure 40). Therefore, circuit engineers only need external bootstrap capacitor for bootstrap circuit. 0.8 0.6 0.4 SPM BOOTSTRAP DIODE 1N4937 1N4937 + 13ohm 1N4937 + 15ohm 0.2 0.0 0 2 4 6 8 VF The characteristics of the built-in bootstrap diode in the SPM45H family are: 10 12 14 16 [V] Figure 40. V-I Characteristics of Bootstrap Diode in SPM45H Package Fast recovery diode: 600V/0.5A trr: 80ns (typical) Have a equivalent resistor characteristic (approximately 15Ω) Table 15. Specification for Bootstrap Diode Symbol VF trr Parameter Forward Drop Voltage Reverse Recovery Time © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 Conditions Min. Typ. Max. Unit o ~ 2.5 ~ V o ~ 80 ~ ns IF=0.1A, TC=25 C IF=0.1A, TC=25 C www.fairchildsemi.com 25 AN-9070 APPLICATION NOTE Circuit of NTC Thermistor (Monitoring of TC) The SPM45H package in the motion SPM family include a NTC (Negative Temperature Coefficient) thermistor for module case temperature (TC) sensing. This thermistor is located in ceramic substrate with the power chip (IGBT/FRD). Therefore, the thermistor can accurately reflect the temperature of the power chip (see Figure 41). Figure 41. Location of NTC Thermistor in SPM45H Package R-T Curve 600 MIN TYP MAX 550 500 Resistance[k] 450 400 350 300 250 200 150 100 50 0 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 Temperature TTH[¡É] Figure 42. R-T Curve of NTC Thermistor in SPM45H Package © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 26 AN-9070 APPLICATION NOTE Normally, circuit designers use two kinds of circuit for temperature protection (monitoring) by NTC thermistor. One is circuit by ADC (Analog-Digital Converter). The other is circuit by comparator. Figure 43 and Figure 44 show examples of application circuits with an NTC thermistor. Figure 43. Over-Temperature Protection Circuit by MCU with NTC Thermistor Figure 44. Over-Temperature Protection Circuit by Comparator with NTC Thermistor V-T Curve at VDD=5.0, 3.3V, RTH=6.8kohm 5 Output Voltage of RTH [V] VOUT(min) VOUT(typ) 4 VOUT(max) VDD=5.0V 3 VDD=3.3V 2 1 0 20 30 40 50 60 70 80 90 100 110 120 o Temperature TThermistor[ C] Figure 45. V-T Curve of Figure 43 © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 27 AN-9070 APPLICATION NOTE Table 16. R-T Table of NTC Thermistor (1-1)] TNTC(℃) Rmin(kΩ) Rcent(kΩ) Rmax(kΩ) T(℃) Rmin(kΩ) Rcent(kΩ) Rmax(kΩ) 0 153.8063 158.2144 162.7327 30 37.1428 37.6431 38.1463 1 146.0956 150.1651 154.3326 31 35.5329 36.0351 36.5408 2 138.8168 142.5725 146.4152 32 34.0011 34.5041 35.0111 3 131.9431 135.4081 138.9502 33 32.5433 33.0462 33.5534 4 125.4497 128.6453 131.9091 34 31.1555 31.6573 32.164 5 119.3135 122.2594 125.2655 35 29.834 30.3339 30.8392 6 113.5129 116.2273 118.9947 36 28.576 29.0734 29.5764 7 108.0276 110.5275 113.0739 37 27.3776 27.8717 28.372 8 102.8388 105.1398 107.4814 38 26.2356 26.726 27.2228 9 97.9288 100.0454 102.1974 39 25.1472 25.6332 26.1261 10 93.2812 95.2267 97.2031 40 24.1094 24.5907 25.0792 11 88.8803 90.6673 92.481 41 23.1198 23.596 24.0796 12 84.7119 86.3519 88.0148 42 22.1759 22.6466 23.1249 13 80.7624 82.2661 83.7894 43 21.2753 21.7401 22.2129 14 77.019 78.3963 79.7903 44 20.4158 20.8746 21.3416 15 73.47 74.7302 76.0043 45 19.5953 20.0478 20.5088 16 70.1042 71.2558 72.4189 46 18.812 19.258 19.7126 17 66.9112 67.962 69.0224 47 18.0638 18.5032 18.9514 18 63.8812 64.8386 65.8039 48 17.3492 17.7818 18.2234 19 61.005 61.8759 62.753 49 16.6663 17.0921 17.5269 20 58.2739 59.0647 59.8601 50 16.0137 16.4325 16.8605 21 55.6798 56.3961 57.116 51 15.3899 15.8016 16.2227 22 53.2152 53.8628 54.5127 52 14.7934 15.1981 15.6122 23 50.8732 51.4569 52.0422 53 14.223 14.6205 15.0277 24 48.6469 49.1715 49.6969 54 13.6773 14.0677 14.4678 25 46.53 47 47.47 55 13.1552 13.5385 13.9316 26 44.4567 44.936 45.4159 56 12.6556 13.0318 13.4178 27 42.4868 42.9737 43.4618 57 12.1774 12.5465 12.9255 28 40.6147 41.1075 41.6021 58 11.7195 12.0815 12.4536 29 38.8351 39.3323 39.8319 59 11.281 11.6361 12.0011 30 37.1428 37.6431 38.1463 60 10.861 11.2091 11.5673 © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 28 AN-9070 APPLICATION NOTE Table 17. R-T Table of NTC Thermistor (1-2) TNTC(℃) Rmin(kΩ) Rcent(kΩ) Rmax(kΩ) T(℃) Rmin(kΩ) Rcent(kΩ) Rmax(kΩ) 61 10.4594 10.8007 11.152 91 3.6675 3.8463 4.0334 62 10.0746 10.4091 10.7536 92 3.5505 3.7253 3.9084 63 9.7058 10.0336 10.3714 93 3.4377 3.6087 3.7879 64 9.3522 9.6734 10.0046 94 3.329 3.4963 3.6716 65 9.0133 9.3279 9.6525 95 3.2242 3.3878 3.5593 66 8.6882 8.9963 9.3145 96 3.1235 3.2836 3.4515 67 8.3764 8.6782 8.9899 97 3.0264 3.183 3.3473 68 8.0773 8.3727 8.6782 98 2.9328 3.086 3.2468 69 7.7902 8.0795 8.3787 99 2.8425 2.9923 3.1497 70 7.5147 7.7979 8.091 100 2.7553 2.9019 3.0559 71 7.2496 7.5268 7.8138 101 2.6712 2.8146 2.9654 72 6.995 7.2663 7.5474 102 2.5901 2.7303 2.8779 73 6.7505 7.016 7.2913 103 2.5117 2.6489 2.7933 74 6.5157 6.7755 7.045 104 2.436 2.5703 2.7117 75 6.2901 6.5443 6.8082 105 2.363 2.4943 2.6327 76 6.0739 6.3227 6.581 106 2.2921 2.4206 2.556 77 5.8662 6.1096 6.3624 107 2.2236 2.3493 2.4819 78 5.6665 5.9046 6.1521 108 2.1575 2.2805 2.4102 79 5.4745 5.7075 5.9498 109 2.0936 2.2139 2.3409 80 5.2899 5.5178 5.7549 110 2.0319 2.1496 2.2739 81 5.1129 5.3358 5.568 111 1.9725 2.0877 2.2094 82 4.9426 5.1607 5.3879 112 1.9151 2.0278 2.147 83 4.7788 4.9921 5.2145 113 1.8596 1.9699 2.0866 84 4.6211 4.8299 5.0475 114 1.806 1.9139 2.0282 85 4.4694 4.6736 4.8866 115 1.7541 1.8598 1.9716 86 4.3228 4.5226 4.731 116 1.7042 1.8076 1.9171 87 4.1817 4.3771 4.5811 117 1.6559 1.7572 1.8644 88 4.0459 4.2369 4.4366 118 1.6092 1.7083 1.8134 89 3.915 4.1019 4.2973 119 1.564 1.6611 1.7639 90 3.789 3.9717 4.1629 120 1.5203 1.6153 1.7161 © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 29 AN-9070 APPLICATION NOTE General Application Circuit Example Figure 46 shows a general application circuitry of interface schematic with control signals connected directly to an MCU. Figure 46. General Application Circuitry for SPM45H Package (One-SHUNT Solution) © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 30 AN-9070 APPLICATION NOTE Print Circuit Board (PCB) Layout Guidance Figure 47. PCB Layout Guidance © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 31 AN-9070 APPLICATION NOTE Packaging Specification Figure 48. SPM26-AAA Packaging Specification © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 32 AN-9070 APPLICATION NOTE Figure 49. SPM26-AAB Packaging Specification © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 www.fairchildsemi.com 33 AN-9070 APPLICATION NOTE Related Resources FNA40560 — Smart Power Module Motion SPM® FNA40860 — Smart Power Module Motion SPM® FNA41060 — Smart Power Module Motion SPM® FNA41560 — Smart Power Module Motion SPM® FNB40560 — Smart Power Module Motion SPM® FNB41060 — Smart Power Module Motion SPM® FNB41560 — Smart Power Module Motion SPM® AN-9071 — Smart Power Module Motion SPM® in SPM45H Thermal Performance Information AN-9072 — Smart Power Module Motion SPM® in SPM45H Mounting Guidance RD-344 — Reference Design for FNA41560 (One Shunt Solution) RD-345 — Reference Design for FNA41560 (Three Shunt Solution) Motion Control Design Tool at http://www.fairchildsemi.com/design_tools/motion_control_design_tool/ NOTE: In this and other Fairchild documentation and collateral, the following terms are interchangeable: DIP = SPM2, Mini-DIP = SPM3, Tiny-DIP = SPM5, and µMini-DIP = SPM45 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. © 2009 Fairchild Semiconductor Corporation Rev. 2.0.2 • 8/29/12 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 34