RENESAS M37754M6C

To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi
Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi
Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.
Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been
made to the contents of the document, and these changes do not constitute any alteration to the
contents of the document itself.
Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices
and power devices.
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
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M37754M6C-XXXGP
M37754M6C-XXXHP
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SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
DESCRIPTION
The M37754M6C-XXXGP and M37754M6C-XXXHP are single-chip
microcomputers designed with high-performance CMOS silicon gate
technology. This is housed in a 100-pin plastic molded QFP.
This microcomputer has a CPU and a bus interface unit. The CPU is
a 16-bit parallel processor that can also be switched to perform 8-bit
parallel processing, and the bus interface unit enhances the memory
access efficiency to execute instructions fast.
In addition to the 7700 Family basic instructions, the M37754M6CXXXGP and M37754M6C-XXXHP has 6 special instructions which
contain instructions for signed multiplication/division; these added instructions improve the servo arithmetic performance to control hard
disk drives and so on.
This microcomputer also include the ROM, RAM, multiple-function
timers, motor control function, serial I/O, A-D converter, D-A converter, and so on.
DISTINCTIVE FEATURES
• Number of basic machine instructions .................................... 109
•
APPLICATION
Control devices for personal computer peripheral equipment such as
CD-ROM drives, hard disk drives, high density FDD, printers
Control devices for office equipment such as copiers and facsimiles
Control devices for industrial equipment such as communication and
measuring instruments
Control devices for equipment required for motor control such as inverter air conditioner and general purpose inverter
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
↔ P00/A0
↔ P01/A1
↔ P02/A2
↔ P03/A3
↔ P04/A4
↔ P05/A5
↔ P06/A6
↔ P07/A7
↔ P10/A8
↔ P11/A9
↔ P12/A10
↔ P13/A11
↔ P14/A12
↔ P15/A13
↔ P16/A14
↔ P17/A15
↔ P20/A16
↔ P21/A17
↔ P22/A18
↔ P23/A19
↔ P27/A23
↔ P100/D0/LA0
↔ P101/D1/LA1
↔ P102/D2/LA2
↔ P103/D3/LA3
↔ P104/D4/LA4
↔ P105/D5/LA5
↔ P106/D6/LA6
↔ P107/D7/LA7
↔ P110/D8
M37754M6C-XXXGP PIN CONFIGURATION (TOP VIEW)
P87/TXD1 ↔
P86/RXD1 ↔
P85/CLK1 ↔
P84/CTS1/RTS1/DA1/INT4 ↔
P83/TXD0 ↔
P82/RXD0/CLKS0 ↔
P81/CLK0 ↔
P80/CTS0/RTS0/CLKS1/DA0 ↔
VCC
AVCC
VREF →
AVSS
VSS
P77/AN7/ADTRG ↔
P76/AN6 ↔
P75/AN5 ↔
P74/AN4 ↔
P73/AN3 ↔
P72/AN2 ↔
P71/AN1 ↔
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
M37754M6C-XXXGP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
•
•
•
•
•
•
(three-phase motor drive waveform or pulse motor control waveform output)
Serial I/O (UART or clock synchronous) ..................................... 2
10-bit A-D converter ............................................ 8-channel inputs
8-bit D-A converter ............................................ 2-channel outputs
12-bit watchdog timer
Programmable input/output
(ports P0—P11) ......................................................................... 87
Small package [M37754M6C-XXXHP]
................................. 100-pin fine pitch QFP (read pitch : 0.5 mm)
P70/AN0 ↔
P95/INT3/KI4 ↔
P94/CS4/RTP13 ↔
P93/CS3/A22/RTP12 ↔
P92/CS2/A21/U/RTP11 ↔
P91/CS1/A20/V/RTP10 ↔
P90/CS0 ↔
P67/TB2IN ↔
P66/TB1IN ↔
P65/TB0IN ↔
P64/INT2 ↔
P63/INT1 ↔
P62/INT0 ↔
P61/TA4IN ↔
P60/TA4OUT ↔
P57/TA3IN/KI3 ↔
P56/TA3OUT/KI2 ↔
P55/TA2IN/KI1 ↔
P54/TA2OUT/KI0 ↔
P53/TA1IN/W/RTP03 ↔
P52/TA1OUT/U/RTP02 ↔
P51/TA0IN/V/RTP01 ↔
P50/TA0OUT/W/RTP00 ↔
P47 ↔
P46 ↔
P45 ↔
P44 ↔
P43 ↔
P42/φ1 ↔
P41/RDY ↔
•
(103 basic instructions of 7700 Family + 6 special instructions)
Memory size
ROM ................................................ 48 Kbytes
RAM ................................................2048 bytes
Instruction execution time
The fastest instruction at 40 MHz frequency ...................... 100 ns
• Single power supply ....................................................... 5V ±10 %
• Low power dissipation (at 40 MHz frequency) ....... 125 mW (Typ.)
• Interrupts ............................................................ 21 types, 7 levels
• Multiple-function 16-bit timer ................................................... 5+3
Outline 100P6S-A
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
↔ P111/D9
↔ P112D10
↔ P113/D11
↔ P114/D12
↔ P115/D13
↔ P116/D14
↔ P117/D15
↔ P30/WR
↔ P31/BHE
↔ P32/ALE
↔ P33/HLDA
VCC
VSS
→ E/RD
→ XOUT
← XIN
← RESET
CNVSS
← BYTE
↔ P40/HOLD
MI
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MITSUBISHI MICROCOMPUTERS
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M37754M6C-XXXGP
M37754M6C-XXXHP
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SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
75 ↔ P03/A3
74 ↔ P04/A4
73 ↔ P05/A5
72 ↔ P06/A6
71 ↔ P07/A7
70 ↔ P10/A8
69 ↔ P11/A9
68 ↔ P12/A10
67 ↔ P13/A11
66 ↔ P14/A12
65 ↔ P15/A13
64 ↔ P16/A14
63 ↔ P17/A15
62 ↔ P20/A16
61 ↔ P21/A17
60 ↔ P22/A18
59 ↔ P23/A19
58 ↔ P27/A23
57 ↔ P100/D0/LA0
56 ↔ P101/D1/LA1
55 ↔ P102/D2/LA2
54 ↔ P103/D3/LA3
53 ↔ P104/D4/LA4
52 ↔ P105/D5/LA5
51 ↔ P106/D6/LA6
M37754M6C-XXXHP PIN CONFIGURATION (TOP VIEW)
P02/A2 ↔ 76
P01/A1 ↔ 77
P00/A0 ↔ 78
P87/TXD1 ↔ 79
P86/RXD1 ↔ 80
P85/CLK1 ↔ 81
P84/CTS1/RTS1/DA1/INT4 ↔ 82
P83/TXD0 ↔ 83
P82/RXD0/CLKS0 ↔ 84
P81/CLK0 ↔ 85
P80/CTS0/RTS0/CLKS1/DA0 ↔ 86
87
VCC
88
AVCC
VREF → 89
90
AVSS
91
VSS
P77/AN7/ADTRG ↔ 92
P76/AN6 ↔ 93
P75/AN5 ↔ 94
P74/AN4 ↔ 95
P73/AN3 ↔ 96
P72/AN2 ↔ 97
P71/AN1 ↔ 98
P70/AN0 ↔ 99
P95/INT3/KI4 ↔ 100
P94/CS4/RTP13 ↔ 1
P93/CS3/A22/RTP12 ↔ 2
P92/CS2/A21/U/RTP11 ↔ 3
P91/CS1/A20/V/RTP10 ↔ 4
P90/CS0 ↔ 5
P67/TB2IN ↔ 6
P66/TB1IN ↔ 7
P65/TB0IN ↔ 8
P64/INT2 ↔ 9
P63/INT1 ↔ 10
P62/INT0 ↔ 11
P61/TA4IN ↔ 12
P60/TA4OUT ↔ 13
P57/TA3IN/KI3 ↔ 14
P56/TA3OUT/KI2 ↔ 15
P55/TA2IN/KI1 ↔ 16
P54/TA2OUT/KI0 ↔ 17
P53/TA1IN/W/RTP03 ↔ 18
P52/TA1OUT/U/RTP02 ↔ 19
P51/TA0IN/V/RTP01 ↔ 20
P50/TA0OUT/W/RTP00 ↔ 21
P47 ↔ 22
P46 ↔ 23
P45 ↔ 24
P44 ↔ 25
M37754M6C-XXXHP
Outline 100P6Q-A
Differences between M37754M6C-XXXGP and M37754M6C-XXXHP
Product
M37754M6C-XXXGP
M37754M6C-XXXHP
2
Package
100-pin QFP (100P6S-A)
100-pin fine pitch QFP
(100P6Q-A)
50 ↔ P107/D7/LA7
49 ↔ P110/D8
48 ↔ P111/D9
47 ↔ P112/D10
46 ↔ P113/D11
45 ↔ P114/D12
44 ↔ P115/D13
43 ↔ P116/D14
42 ↔ P117/D15
41 ↔ P30/WR
40 ↔ P31/BHE
39 ↔ P32/ALE
38 ↔ P33/HLDA
37
VCC
36
VSS
35 → E/RD
34 → XOUT
33 ← XIN
32 ← RESET
31
CNVSS
30 ← BYTE
29 ↔ P40/HOLD
28 ↔ P41/RDY
27 ↔ P42/φ1
26 ↔ P43
MI
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MITSUBISHI MICROCOMPUTERS
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M37754M6C-XXXGP
M37754M6C-XXXHP
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Not e para
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SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Input/Output
port P0
Data Bus(Odd)
Data Buffer DBH(8)
P0 (8)
Data Bus(Even)
Bus width
select input
BYTE
PR
P5(8)
P6(8)
P7(8)
Input/Output Input/Output Input/Output Input/Output
port P3
port P2
port P1
port P10
Input/Output
port P11
Input/Output
port P4
P11(8)
P4(8)
D-A0 Converter(8)
A-D Converter(10)
UART 0(9)
Timer TB0(16)
Timer TB2(16)
Input/Output
port P8
Input/Output
port P9
Arithmetic Logic
Unit(16)
P8(8)
Accumulator A(16)
P9(6)
Accumulator B(16)
ROM
48 Kbytes
Clock Generating Circuit
Index Register X(16)
RAM
2048 Bytes
Index Register Y(16)
Timer TA2(16)
Stack Pointer S(16)
WatchdogTimer
Direct Page Register DPR(16)
Timer TA4(16)
Reset input
RESET
Processor Status Register PS(11)
Timer TA3(16)
(5V)
VCC
Data Bank Register DT(8)
Input Buffer Register IB(16)
Clock output Enable output
XOUT
E
Timer TA0(16)
Program Bank Register PG(8)
Clock input
XIN
UART 1(9)
(0V)
VSS
Incrementer/Decrementer(24)
Program Counter PC(16)
BLOCK DIAGRAM
Timer TB1(16)
CNVSS
Data Address Register DA(24)
Timer TA1(16)
D-A1 Converter(8)
Program Address Register PA(24)
Input/Output
port P5
(0V)
AVSS
Address Bus
Incrementer(24)
P3 (4)
P2 (5)
Instruction Queue Buffer Q2(8)
Input/Output
port P6
Instruction Queue Buffer Q1(8)
Input/Output
port P7
P1 (8)
Instruction Queue Buffer Q0(8)
P10 (8)
Instruction Register(8)
(5V)
AVCC
Reference
voltage input
VREF
Data Buffer DBL(8)
3
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M37754M6C-XXXGP
M37754M6C-XXXHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
FUNCTIONS OF M37754M6C-XXXGP
Parameter
Number of basic machine instructions
Instruction execution time
ROM
Memory size
RAM
P0, P1, P4–P8, P10, P11
P2
Input/Output ports
P3
P9
TA0, TA1, TA2, TA3, TA4
Multiple-function timers
TB0, TB1, TB2
Serial I/O
A-D converter
D-A converter
Watchdog timer
Dead-time timer
Interrupts
Clock generating circuit
Supply voltage
Power dissipation
Input/Output characteristic
Memory expansion
Operating temperature range
Device structure
Package
4
Input/Output withstand voltage
Output current
Functions
109
100 ns (the fastest instruction at external clock 40 MHz frequency)
48 Kbytes
2048 bytes
8-bit × 9
5-bit × 1
4-bit × 1
6-bit × 1
16-bit × 5
16-bit × 3
(UART or clock synchronous serial I/O) × 2
10-bit × 1 (8 channels)
8-bit × 2
12-bit × 1
8-bit × 3
5 external types, 16 internal types
(Each interrupt can be set to priority levels 0–7.)
Built-in (externally connected to a ceramic resonator or quartz crystal resonator)
5 V±10 %
125 mW(at external clock 40 MHz frequency)
5V
5 mA
Maximum 16 Mbytes
–20 to 85 °C
CMOS high-performance silicon gate process
100-pin plastic molded QFP
MI
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MITSUBISHI MICROCOMPUTERS
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NAR
M37754M6C-XXXGP
M37754M6C-XXXHP
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tion hange
c
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pec ject to
s
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SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PIN DESCRIPTION (MICROCOMPUTER MODE)
Pin
Name
Input/
Output
VCC, VSS
CNVSS
Power supply
CNVSS input
Input
RESET
Reset input
Input
XIN
Clock input
Input
XOUT
Clock output
Output
E
Enable output
Output
BYTE
(Note)
Bus width select input
AVCC ,
AVSS
VREF
P00–P07
Analog supply input
P10–P17
I/O port P1
I/O
P20–P23 ,
P27
P30–P33
I/O port P2
I/O
I/O port P3
I/O
P40–P47
I/O port P4
I/O
P50–P57
I/O port P5
I/O
P60–P67
I/O port P6
I/O
P70–P77
I/O port P7
I/O
P80–P87
I/O port P8
I/O
P90–P95
I/O port P9
I/O
Reference voltage input
I/O port P0
Input
Input
I/O
Functions
Supply 5 V±10 % to VCC and 0 V to VSS.
This pin controls the processor mode. Connect to VSS for single-chip mode or
memory expansion mode. Connect to VCC for microprocessor mode.
This is reset input pin. The microcomputer is reset when supplying “L” level to this
pin.
These are I/O pins of internal clock generating circuit. Connect a ceramic or quartzcrystal resonator between XIN and X OUT. When an external clock is used, the clock
source should be connected to the XIN pin and the XOUT pin should be left open.
This pin outputs enable signal E, which indicates access state of data bus for
single-chip mode.
This pin outputs RD signal for memory expansion mode or microprocessor mode.
This pin determines whether the external data bus is 8-bit width or 16-bit width for
memory expansion mode or microprocessor mode. The width is 16 bits when “L”
signal inputs and 8 bits when “H” signal inputs.
Power supply for the A-D converter and the D-A converter. Connect AVCC to VCC
and AVSS to VSS externally.
This is reference voltage input pin for the A-D converter and the D-A converter.
In single-chip mode, port P0 is an 8-bit I/O port. This port has an I/O direction
register and each pin can be programmed for input or output. These ports are in
the input mode when reset. Address (A 0–A7 ) is output in memory expansion mode
or microprocessor mode.
In single-chip mode, these pins have the same functions as port P0. Address (A 8–
A15) is output in memory expansion mode or microprocessor mode.
In single-chip mode, these pins have the same functions as port P0. Address (A 16–
A19, A23 ) is output in memory expansion mode or microprocessor mode.
In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or microprocessor mode, WR, BHE , ALE, and HLDA signals are
output.
In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or microprocessor mode, P40, P41 , and P42 become HOLD and
RDY input pins, and clock φ1 output pin respectively. Functions of other pins are the
same as in single-chip mode. In memory expansion mode, P4 2 can be programmed as I/O port.
In addition to having the same functions as port P0 in single-chip mode, these pins
also function as I/O pins for timer A0, timer A1, timer A2, timer A3, output pins for
motor drive waveform, and input pins for key input interrupt.
In addition to having the same functions as port P0 in single-chip mode, these pins
also function as I/O pins for timer A4, input pins for external interrupt input INT0 ,
INT1, and INT2, and input pins for timer B0, timer B1, and timer B2.
In addition to having the same functions as port P0 in single-chip mode, these pins
also function as input pins for A-D converter.
In addition to having the same functions as port P0 in single-chip mode, these pins
also function as I/O pins for UART0, UART1, output pins for D-A converter, and
input pin for INT4.
In addition to having the same functions as port P0 in single-chip mode, these pins
also function as input pin for INT3, output pins for motor drive waveform.
In memory expansion mode and microprocessor mode, these pins can be
programmed as address (A20–A22) or output pins for CS0–CS 4.
Note: It is impossible to change the input level of the BYTE pin in each bus cycle. In other words, bus width cannot be switched dynamically. Fix the input
level of the BYTE pin to “H” or “L” according to the bus width used.
5
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M37754M6C-XXXGP
M37754M6C-XXXHP
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Pin
Name
P100 – P107 I/O port P10
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Input/
Output
I/O
Functions
In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or microprocessor mode, these pins become data I/O pins and
operate as follows:
(1) When using 16-bit width as external data bus width:
Accessing external memory
<When reading>
Pins’ value is input into low-order internal data bus (DB 0 to DB7).
<When writing>
Value of low-order internal data bus (DB0 to DB 7) is output to these pins.
Accessing internal memory
<When reading>
These pins become high impedance.
<When writing>
Value of internal data bus is output to these pins.
•
•
(2) When using 8-bit width as external data bus width:
Accessing external memory
<When reading>
Pins’ value is input into internal data bus. The value is input into low-order
internal data bus (DB 0 to DB7) when accessing an even address; it is input
into high-order internal data bus (DB8 to DB 15) when accessing an odd
address.
<When writing>
Value of internal data bus is output to these pins. The value of low-order
internal data bus (DB 0 to DB7) is output when accessing an even address;
the value of high-order internal data bus (DB8 to DB 15) is output when
accessing an odd address.
Accessing internal memory
<When reading>
These pins become high impedance.
<When writing>
Value of internal data bus is output to these pins.
When the external bus width is 8 bits, the mode where low-order address
(LA0 to LA7) is output when RD or WR output is “H” and data (D0 to D7) is
input/output when RD or WR output is “L” can be selected in specified
external memory area access cycle.
•
•
P110 – P117 I/O port P11
I/O
In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or microprocessor mode, these pins operate as follows:
(1) When using 16-bit width as external data bus width
Accessing external memory
<When reading>
The value is input into high-order internal data bus (DB8 to DB 15) when
accessing an odd address; these pins enter high impedance state when not
accessing an odd address.
<When writing>
Value of high-order internal data bus (DB8 to DB 15) is output to these pins.
Accessing internal memory
<When reading>
These pins enter high impedance state.
<When writing>
Value of internal data bus is output to these pins.
(2) When using 8-bit width as external data bus width
These pins become I/O port P110 – P117.
•
•
6
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M37754M6C-XXXGP
M37754M6C-XXXHP
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SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
BASIC FUNCTION BLOCKS
The M37754M6C-XXXGP and M37754M6C-XXXHP has the same
functions as the M37754M8C-XXXGP and M37754M8C-XXXHP except for the following :
(1) The ROM size is different.
(2) The function of ROM area modification is not available.
Therefore, refer to the section on the M37754M8C-XXXGP.
MEMORY
The memory map is shown in Figure 1. The address space is 16
Mbytes from addresses 016 to FFFFFF 16. The address space is divided into 64-Kbyte units called banks. The banks are numbered
from 016 to FF16.
Internal ROM, internal RAM, and control registers for internal peripheral devices are assigned to bank 016.
Bank 016
Bank 116
•
•
•
•
•
•
•
•
•
•
•
•
•


















00000016
The 48-Kbyte area from addresses 400016 to FFFF16 is the internal
ROM.
Addresses FFD2 16 to FFFF16 are the RESET and interrupt vector
addresses and contain the interrupt vectors. Refer to the section on
interrupts for details.
The 2048-byte area from addresses 8016 to 87F16 contains the internal RAM. In addition to storing data, the RAM is used as stack during
a subroutine call, or interrupts.
Assigned to addresses 0 16 to 7F 16 are peripheral devices such as
I/O ports, A-D converter, D-A converter, UART, timer, and interrupt
control registers.
A 256-byte direct page area can be allocated anywhere in bank 016
using the direct page register DPR. In direct page addressing mode,
the memory in the direct page area can be accessed with two words
thus reducing program steps.
00000016
00007F16
00008016
00000016
Peripherai devices
control registers
Internal RAM
2048 bytes
00FFFF16
01000016
see Fig. 2 for
further information
00007F16
00087F16
Interrupt vector table
00FFD216
INT4
INT3
A-D
01FFFF16
 FE000016



Bank FE16 



 FEFFFF16
 FF000016



Bank FF16 



 FFFFFF16
UART1 transmit
00400016
UART1 receive
UART0 transmit
UART0 receive
Timer B2
Timer B1
Timer B0
Timer A4
Timer A3
Timer A2
Internal ROM
48 Kbytes
Timer A1
Timer A0
INT2
INT1
INT0
Watchdog timer
DBC
BRK instruction
Zero divide
00FFFF16
00FFFE16
RESET
Note: Internal ROM area can be modified. (Refer to the section on ROM area modification function.)
Fig. 1 Memory map
7
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ion. hange
icat
ecif ct to c
p
s
al
bje
a fin are su
not
s
is is ric limit
h
T
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ice:
Not e para
Som
PR
Address (Hexadecimal notation)
000000
000001
Port P0 register
000002
Port P1 register
000003
000004
Port P0 direction register
000005
Port P1 direction register
000006
Port P2 register
000007
Port P3 register
000008
Port P2 direction register
000009
Port P3 direction register
Port P4 register
00000A
Port P5 register
00000B
Port P4 direction register
00000C
Port P5 direction register
00000D
Port P6 register
00000E
Port P7 register
00000F
Port P6 direction register
000010
Port P7 direction register
000011
Port P8 register
000012
Port P9 register
000013
Port P8 direction register
000014
Port P9 direction register
000015
Port P10 register
000016
Port P11 register
000017
000018
Port P10 direction register
Port P11 direction register
000019
00001A
Waveform output mode register
00001B
Dead-time timer
00001C
Pulse output data register 1
Pulse output data register 0
00001D
A-D control register 0
00001E
A-D control register 1
00001F
000020
A-D register 0
000021
000022
A-D register 1
000023
000024
A-D register 2
000025
000026
A-D register 3
000027
000028
A-D register 4
000029
00002A
A-D register 5
00002B
00002C
A-D register 6
00002D
00002E
A-D register 7
00002F
UART0 transmit/receive mode register
000030
UART0 baud rate register
000031
000032
UART0 transmit buffer register
000033
UART0 transmit/receive control register 0
000034
UART0 transmit/receive control register 1
000035
000036
UART0 receive buffer register
000037
UART1 transmit/receive mode register
000038
UART1 baud rate register
000039
00003A
UART1 transmit buffer register
00003B
UART1 transmit/receive control register 0
00003C
UART1 transmit/receive control register 1
00003D
00003E
UART1 receive buffer register
00003F
MITSUBISHI MICROCOMPUTERS
M37754M6C-XXXGP
M37754M6C-XXXHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Address (Hexadecimal notation)
Count start register
000040
000041
One-shot start register
000042
000043
Up-down register
000044
000045
Timer A write register
000046
Timer A0 register
000047
000048
Timer A1 register
000049
00004A
Timer A2 register
00004B
00004C
Timer A3 register
00004D
00004E
Timer A4 register
00004F
000050
Timer B0 register
000051
000052
Timer B1 register
000053
000054
Timer B2 register
000055
Timer A0 mode register
000056
Timer A1 mode register
000057
Timer A2 mode register
000058
Timer A3 mode register
000059
Timer A4 mode register
00005A
Timer B0 mode register
00005B
Timer B1 mode register
00005C
Timer B2 mode register
00005D
Processor mode register 0
00005E
Processor mode register 1
00005F
Watchdog timer register
000060
Watchdog timer frequency select register
000061
Chip select control register
000062
Chip select area register
000063
Comparator function select register
000064
Reserved area (Note)
000065
Comparator result register
000066
Reserved area (Note)
000067
D-A register 0
000068
000069
D-A register 1
00006A
00006B
Particular function select register 0
00006C
Particular function select register 1
00006D
INT4 interrupt control register
00006E
INT3 interrupt control register
00006F
A-D interrupt control register
000070
UART0 trasmit interrupt control register
000071
UART0 receive interrupt control register
000072
UART1 trasmit interrupt control register
000073
UART1 receive interrupt control register
000074
Timer A0 interrupt control register
000075
Timer A1 interrupt control register
000076
Timer A2 interrupt control register
000077
Timer A3 interrupt control register
000078
Timer A4 interrupt control register
000079
Timer B0 interrupt control register
00007A
Timer B1 interrupt control register
00007B
Timer B2 interrupt control register
00007C
INT0 interrupt control register
00007D
INT1 interrupt control register
00007E
INT2 interrupt control register
00007F
Note: Do not write to this address.
Fig. 2 Location of peripheral devices and interrupt control registers
8
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tion hange
c
ifica
pec ject to
s
l
fina
sub
ot a its are
is n
his tric lim
T
:
me
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Not e para
Som
PR
MITSUBISHI MICROCOMPUTERS
M37754M6C-XXXGP
M37754M6C-XXXHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
ELECTRICAL CHARACTERISTICS
The M37754M6C-XXXGP and M37754M6C-XXXHP have the same
function as the M37754M8C-XXXGP and M37754M8C-XXXHP in
the following :
(1) ABSOLUTE MAXIMUM RATINGS
(2) RECOMMENDED OPERATING CONDITIONS
(3) ELECTRICAL CHARACTERISTICS
(4) PERIPHERAL DEVICE INPUT/OUTPUT TIMING
(5) TIMING REQUIREMENTS
(6) SWITCHING CHARACTERISTICS
Therefore, refer to the correponding section on the M37754M8CXXXGP.
ADDRESSING MODES AND INSTRUCTION SET
The M37754M6C-XXXGP and M37754M6C-XXXHP have 29 powerful addressing modes; 1 addressing mode is added to the basis of
the 7700 series. Refer to the “7751 Series Software Manual” for the
details.
INSTRUCTION SET
The M37754M6C-XXXGP and M37754M6C-XXXHP have the extended instruction set; 6 instructions are added to the instruction set
of 7700 series. The object code of this extended instruction set is
upwards compatible to that of 7700 series instruction set.
Refer to the “7751 Series Software Manual” for the details.
SHORTENING NUMBER OF INSTRUCTION
EXECUTION CYCLES
Shortening number of instruction execution cycles is realized in the
M37754M6C-XXXGP and M37754M6C-XXXHP owing to modifications of the instruction execution algorithm and the CPU circuit, and
others.
Refer to the “7751 Series Software Manual” about the number of
instruction execution cycles.
DATA REQUIRED FOR MASK ROM ORDERING
Please send the following data for mask orders:
<M37754M6C-XXXGP>
(1) M37754M6C-XXXGP mask ROM order confirmation form
(2) 100P6S mark specification form
(3) ROM data (EPROM 3 sets)
<M37754M6C-XXXHP>
(1) M37754M6C-XXXHP mask ROM order confirmation form
(2) 100P6Q mark specification form
(3) ROM data (EPROM 3 sets)
9
GZZ–SH00–84B<85A0>
Mask ROM number
7700 FAMILY MASK ROM ORDER CONFIRMATION FORM
SINGLE-CHIP 16-BIT MICROCOMPUTER
M37754M6C-XXXGP
M37754M6C-XXXHP
MITSUBISHI ELECTRIC
Receipt
Date:
Section head Supervisor
signature
signature
TEL
(
Company
name
Customer
Date
issued
)
Date:
Issuance
signatures
Note : Please fill in all items marked
Responsible
officer
Supervisor
1. Confirmation
Specify the name of the product being ordered.
Three sets of EPROMs are required for each pattern (Check @ in the appropriate box).
If at least two of the three sets of EPROMs submitted contain the identical data, we will produce masks based on this data.
We shall assume the responsibility for errors only if the mask ROM data on the products we produce differ from this data.
Thus, the customer must be especially careful in verifying the data contained in the EPROMs submitted.
Checksum code for entire EPROM areas
(hexadecimal notation)
EPROM Type :
27512
0000
0010
4000
48K
DATA
(1) Set “FF16 ” in the shaded area.
27101
00000
00010
(2) Address 016 to 10 16 are the area for storing the data
on model designation and options.This area must be
written with the data shown below.
14000
Details for option data are given next in the section
describing the STP instruction option.
Address and data are written in hexadecimal notation.
48K
DATA
FFFF
1FFFF
4D
33
37
37
35
34
4D
36
Address
0
1
2
3
4
5
6
7
43
2D
FF
FF
FF
FF
FF
FF
Address
Address
Option data 10
8
9
A
B
C
D
E
F
2. STP instruction option
One of the following sets of data should be written to the option data address (1016 ) of the EPROM you have ordered.
Check @ in the appropriate box.
STP instruction enable
STP instruction disable
0116
0016
Address 1016
Address 1016
3. Mark specification
Mark specification must be submitted using the correct form for the type of package being ordered fill out the appropriate
100P6S Mark Specification Form (for M37754M6C-XXXGP), 100P6Q Mark Specification Form (for M37754M6C-XXXHP)
and attach to the Mask ROM Order Confirmation Form.
4. Comments
100P6S (100-PIN QFP) MARK SPECIFICATION FORM
Mitsubishi IC catalog name
Please choose one of the marking types below (A, B, C), and enter the Mitsubishi catalog name and the special mark (if needed).
A. Standard Mitsubishi Mark
80
51
81
50
Mitsubishi IC catalog name
Mitsubishi lot number
(6-digit or 7-digit)
31
100
1
30
B. Customer’s Parts Number + Mitsubishi catalog name
80
51
81
50
31
100
1
Customer’s Parts Number
Note : The fonts and size of characters are standard Mitsubishi type.
Mitsubishi IC catalog name
Note1 : The mark field should be written right aligned.
2 : The fonts and size of characters are standard Mitsubishi type.
3 : Customer’s Parts Number can be up to 14 characters : Only 0 ~
9, A ~ Z, +, –, /, (, ), &, , (periods), (commas) are usable.
.
,
30
C. Special Mark Required
80
51
81
50
100
31
1
Note1 : If the Special Mark is to be Printed, indicate the desired
layout of the mark in the left figure. The layout will be
duplicated as close as possible.
Mitsubishi lot number (6-digit or 7-digit) and Mask ROM
number (3-digit) are always marked.
2 : If the customer’s trade mark logo must be used in the
Special Mark, check the box below.
Please submit a clean original of the logo.
For the new special character fonts a clean font original
(ideally logo drawing) must be submitted.
30
Special logo required
Keep safety first in your circuit designs!
•
Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of
substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.
•
These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer’s application; they do not convey any license under any
intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party.
Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party’s rights, originating in the use of any product data, diagrams, charts or circuit application examples
contained in these materials.
All information contained in these materials, including product data, diagrams and charts, represent information on products at the time of publication of these materials, and are subject to change by Mitsubishi
Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor
product distributor for the latest product information before purchasing a product listed herein.
Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact
Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for
transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials.
If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the
approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.
Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein.
Notes regarding these materials
•
•
•
•
•
•
© 1999 MITSUBISHI ELECTRIC CORP.
New publication, effective Apr. 1999.
Specifications subject to change without notice.
REVISION DESCRIPTION LIST
Rev.
No.
1.0
M37754M6C-XXXGP/HP DATA SHEET
Revision Description
First Edition
Rev.
date
971114
1.01 The following are added:
980528
•MASK ROM ORDER CONFIRMATION FORM
•MARK SPECIFICATION FORM
2.00
(1) For the “timer A write flag (address 4516)”, it’s name is corrected:
• New register name: timer A write register
• Related page: page 8
(1/1)
990428