RT9829 Dual Push-Button Reset with Push-Button Controlled Output Delay General Description Features The RT9829 has two combined delayed reset inputs (SR0, SR1) with a user selectable delayed setup time (tSRC) option of either 7.5s or 12.5s (typ.), selectable via the dual-state DSR input pin. When DSR is connected to ground, tSRC = 7.5s (typ.); when connected to VCC, tSRC = 12.5s (typ.). There are two reset outputs which become active simultaneously after both of the reset inputs are held active for the selected tSRC delay time. The outputs remain asserted until either or both inputs go to inactive logic level (for this device the output reset pulse duration is fully push-button controlled, meaning neither fixed nor minimum reset pulse width, nor power on reset pulse is implemented). The first reset output, RST1, is active low, open drain; the second reset output, RST2, is active high, push-pull. The device fully operates over a broad VCC range from 1.65V to 5.5V. Below 1.575V (typ.), the inputs are ignored and the outputs are de-asserted. The de-asserted reset output levels are then valid down to 1V. z The RT9829 is available in a tiny WDFN-8L 2x2 (COL) package. z z z z z z z z z z Applications z z Ordering Information z RT9829 z Package Type QW : WDFN-8L 2x2 (COL) Lead Plating System G : Green (Halogen Free and Pb Free) Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Dual Reset Push-Button Inputs ` User Selectable Delay Setup Time : 7.5s and 12.5s (typ.) Push-Button Controlled Reset Pulse Duration ` No Fixed nor Minimum Pulse Width Guaranteed No Power On Reset Dual Reset Outputs ` RST1 : Active Low, Open-Drain ` RST2 : Active High, Push-Pull Fixed Reset Input Logic Voltage Levels Broad Operating Voltage Range : 1.65V to 5.5V ` Inactive Reset Output Levels Valid Down to 1V 2μ μA Low Supply Current Operating Temperature : −40°°C to 85°°C Small Thermally Enhanced 8-Lead WDFN Package RoHS Compliant and Halogen Free Mobile phones, Smartphones e-Books MP3 Players Games Portable Navigation Devices Pin Configurations (TOP VIEW) RST2 VSS SR1 RST1 1 8 2 7 3 6 4 5 VCC SR0 NC DSR WDFN-8L 2x2 (COL) Suitable for use in SnPb or Pb-free soldering processes. Marking Information 56 : Product Code 56W W : Date Code DS9829-00 July 2011 www.richtek.com 1 RT9829 Typical Application Circuit Typical Operation : VBAT RT9829 8 VCC MCU System ASIC C1 0.1µF 5 DSR RST2 1 2 RST1 4 RESET Sys_Reset VSS 7 SR0 3 SR1 Power On Powerkey Operation with Regulator : Regulator EN RT9829 VBAT 5 DSR RST2 2 RST1 MCU System ASIC 8 VCC C1 0.1µF 1 4 RESET Sys_Reset VSS 7 SR0 3 SR1 Power On Powerkey www.richtek.com 2 DS9829-00 July 2011 RT9829 Timing Diagrams 1.65V 1.65V 1V 1V VBAT END Timer Start Timer Push-Button Controlled Output N Seconds SR0 Glitch Immunity tSRC SR1 RST1 RST2 Figure 1. Timing Diagram 5V VCC 1.575V 0V 5V SR0 0V 5V SR1 0V 5V RST2 0V 5V RST1 0V tSRC Time (s) Figure 2. Under Voltage Condition DS9829-00 July 2011 www.richtek.com 3 RT9829 Functional Pin Description Pin No. Pin Name Pin Function 1 RST2 Second Reset Output (Active High, Push-Pull). 2 VSS Ground. 3 SR1 Secondary Push-Button Reset Input (Active Low). 4 RST1 First Reset Output (Active Low, Open-Drain). 5 DSR Dual-State Reset Input Delay Selection Pin. When connected to ground, tSRC = 7.5s (typ.); when connected to VCC, tSRC = 12.5s (typ.). DSR is a DC-type input, intended to be either permanently grounded or permanently connected to VCC. 6 NC No Internal Connection. Not bonded and should be connected to VSS. 7 SR0 8 VCC Primary Push-Button Reset Input (Active Low). Positive Supply Input. A 0.1μF decoupling ceramic capacitor is recommended to be connected between VCC and VSS pins. Function Block Diagram SR0 Reset Logic SR1 DSR www.richtek.com 4 tSRC Output Logic RST1 VCC tSRC Selector Two-State Logic VSS Oscillator RST2 DS9829-00 July 2011 RT9829 Absolute Maximum Ratings (Note 1) Supply Input Voltage, VCC to VSS ------------------------------------------------------------------------------------Other Pins to VSS --------------------------------------------------------------------------------------------------------z Power Dissipation, PD @ TA = 25°C WDFN-8L 2x2 (COL) -----------------------------------------------------------------------------------------------------z Package Thermal Resistance (Note 2) WDFN-8L 2x2 (COL), θJA -----------------------------------------------------------------------------------------------z Junction Temperature ----------------------------------------------------------------------------------------------------z Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------z Storage Temperature Range -------------------------------------------------------------------------------------------z ESD Susceptibility (Note 3) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) -----------------------------------------------------------------------------------------------------z z Recommended Operating Conditions z z z −0.3V to 6V −0.3V to 6V 0.606W 165°C/W 150°C 260°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage, VCC (Note 5) --------------------------------------------------------------------------------- 1.65V to 5.5V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VCC = 3.3V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit VCC = 5V -- 2 3 μA VCC ≥ 4.5V, ISINK = 3.2mA -- -- 0.3 VCC ≥ 3.3V, ISINK = 2.5mA -- -- 0.3 VCC ≥ 1.65V, ISINK = 1mA -- -- 0.3 VCC ≥ 4.5V, ISOURCE = 0.8mA 0.8 x V CC -- -- VCC ≥ 2.7V, ISOURCE = 0.5mA 0.8 x V CC -- -- VCC ≥ 1.65V, ISOURCE = 0.25mA 0.8 x V CC -- -- −0.1 -- 0.1 DSR = VSS 6 7.5 9 DSR = VCC 10 12.5 15 Input Power Supply Supply Current ICC Reset Output Voltage Low Reset Output Voltage High, RST2 VOL VOH Output Leakage Current, RST1 ILO Open-Drain, VRST1 = 5.5V V V μA Reset Reset Delay tSRC Logic-Low VIL VSS − 0.3 -- 0.3 Threshold Voltage Logic-High VIH 1.1 -- 5.5 Input Leakage Current (SR0, SR1, DSR Pins) ILI −1 -- 1 SR0, SR1 Input DS9829-00 July 2011 s V μA www.richtek.com 5 RT9829 Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of JEDEC 51-7 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Reset outputs are de-asserted below 1.575V (typ.) and remain de-asserted down to VCC = 1V. www.richtek.com 6 DS9829-00 July 2011 RT9829 Typical Operating Characteristics Supply Current vs. Input Voltage SR1 Threshold Voltage vs. Input Voltage 10 0.80 SR1 Threshold Voltage (V) Supply Current (µA) 9 8 7 6 5 4 3 2 0.75 0.70 High 0.65 Low 0.60 0.55 1 0.50 0 1.5 2 2.5 3 3.5 4 4.5 5 1.5 5.5 2 2.5 3.5 4 4.5 5 5.5 Input Voltage (V) Input Voltage (V) Reset Delay Time vs. Temperature SR0 Threshold Voltage vs. Input Voltage 0.80 16 15 0.75 0.70 High 0.65 Low Reset Delay Time (s) SR0 Threshold Voltage (V) 3 0.60 14 DSR = VCC 13 12 11 10 9 DSR = GND 8 7 0.55 6 0.50 VCC = 3.7V 5 1.5 2 2.5 3 3.5 4 4.5 5 5.5 -50 0 25 50 75 Temperature (°C) Power On Power On V CC (2V/Div) V CC (2V/Div) SR0, SR1 (2V/Div) SR0, SR1 (2V/Div) RST1 (2V/Div) RST1 (2V/Div) RST2 (2V/Div) RST2 (2V/Div) VCC = 1.6V, SR0 = SR1 = GND, DSR = VCC Time (2.5s/Div) DS9829-00 July 2011 -25 Input Voltage (V) 100 125 VCC = 1.6V, SR0 = SR1 = GND, DSR = GND Time (1s/Div) www.richtek.com 7 RT9829 Reset Delay Reset Delay V CC (5V/Div) V CC (5V/Div) SR1 (5V/Div) SR1 (5V/Div) RST1 (5V/Div) RST1 (5V/Div) RST2 (5V/Div) RST2 (5V/Div) VCC = 3.7V, SR0 = GND, DSR = VCC Time (2.5s/Div) www.richtek.com 8 VCC = 3.7V, SR0 = GND, DSR = GND Time (2.5s/Div) DS9829-00 July 2011 RT9829 Outline Dimension Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 1.900 2.100 0.075 0.083 E 1.900 2.100 0.075 0.083 e L 0.500 0.500 0.020 0.600 0.020 0.024 W-Type 8L DFN 2x2 (COL) Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. DS9829-00 July 2011 www.richtek.com 9