RT7321 - Richtek

®
RT7321
Linear LED Driver for High-Voltage LED Lamps
General Description
Features
The RT7321 is a simple and robust constant-current
regulator designed to provide a cost-effective solution for
driving high-voltage LEDs in LED lamp applications. The
RT7321 is equipped with a proprietary control mechanism
to improve the utilization of high-voltage LEDs. The RT7321
allows users to set the regulated current levels (WQFN20L 5x5 Package) for various LED lamps. It also provides
low pin-count SOP-8 (Exposed Pad) package with
customized current setting to meet various application
requirements. In addition, the RT7321 also provides a
thermal regulation protection, instead of traditional thermal
shutdown, to suppress the rise of the temperatures in
LED lamps and prevent the LED lamps from flicker.

AC Input Voltage Range : 200 to 240VRMS

No Electrolytic Capacitor and Transformer
Required
Improved LED Utilization
Programmable LED Current
Thermal Regulation Protection
High Power Efficiency
High Power Factor
Easy EMI Solution
Minimized BOM Cost and Space Required
RoHS Compliant and Halogen Free
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Applications

High-Voltage LED Lamps
Simplified Application Circuit
For SOP-8 (Exposed Pad) Package
For WQFN-20L 5x5 Package
RT7321
AC
RT7321
AC
HV1
HV
S3
S1
S4
S2
GND
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS7321-02 July 2014
HV1
HV
S3
S1
S4
S2
GND
I11
I32
I12
I31
I13
I33
I23
I21
I22
is a registered trademark of Richtek Technology Corporation.
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RT7321
Ordering Information
Marking Information
RT7321
RT7321AEGSP
Package Type
SP : SOP-8 (Exposed Pad-Option 2)
QW : WQFN-20L 5x5 (W-Type)
RT7321AEGSP : Product Number
RT7321AE
GSPYMDNN
YMDNN : Date Code
Lead Plating System
G : Green (Halogen Free and Pb Free)
RT7321BFGSP
RT7321 Version Table
(Only for SOP-8 (Exposed Pad))
RT7321BFGSP : Product Number
RT7321BF
GSPYMDNN
Note :
YMDNN : Date Code
Richtek products are :

RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.

RT7321CGGSP
Suitable for use in SnPb or Pb-free soldering processes.
RT7321CGGSP : Product Number
RT7321CG
GSPYMDNN
RT7321 Version Table
YMDNN : Date Code
RT7321XYGSP
Parallel Current
(IP_S1/2 and IP_S3/4)
Code
(X)
Series Current
(IS_S3/4)
Code
(Y)
10mA
A
10mA
A
15mA
B
15mA
B
20mA
C
20mA
C
25mA
D
25mA
D
30mA
E
30mA
E
35mA
F
40mA
G
45mA
H
50mA
I
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
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RT7321CHGSP
RT7321CHGSP : Product Number
RT7321CH
GSPYMDNN
YMDNN : Date Code
RT7321GQW
RT7321GQW : Product Number
RT7321
GQW
YMDNN
YMDNN : Date Code
is a registered trademark of Richtek Technology Corporation.
DS7321-02 July 2014
RT7321
Pin Configurations
GND
4
GND
6
S2
5
NC
9
S2
I11
I12
I13
16
15
I23
14
I22
13
I21
NC
2
HV1
3
NC
4
12
GND
NC
5
11
I33
GND
21
6
7
8
9
10
I31
3
S1
1
17
I32
S4
7
HV
18
S4
2
HV
19
S3
S3
8
20
NC
HV1
S1
(TOP VIEW)
SOP-8 (Exposed Pad)
WQFN-20L 5x5
Functional Pin Description
For SOP-8 (Exposed Pad) Package
Pin No.
Pin Name
Pin Function
HV1
Controlled High-Voltage Output. A built-in high-voltage transistor, connected
between the HV and HV1 pins, controls the ON or OFF of the supply voltage to
the external high-voltage LED connected with HV1 pin.
2
S3
Output of the S3 Current Regulator. The regulated sinking current is set by the
internal bounding wires and depends on the requests of users. In the “Parallel
operation”, the current (IP_S3) can be set from 10mA to 30mA; in the “Series
operation”, the current (IS_S3) can be set from the IP_S3 to 50mA.
3
S4
Output of the S4 Current Regulator. Like the S3 pin, the typical regulated currents
(IP_S3 and IP_S4; IS_S3 and IS_S4) of S3 and S4 pins are the same, respectively.
1
4,
GND
9 (Exposed Pad)
Ground. Connect this pin to system ground with lowest impedance. The exposed
pad must be soldered to a large PCB and connected to GND for maximum power
dissipation.
5
NC
No Internal Connection.
6
S2
Output of the S2 Current Regulator. This pin only regulates the sinking current
(IP_S2) in the “Parallel operation”. The current (IP_S2), set by the internal bounding
wires, is in the range of 10mA to 30mA and depends on the requests of users.
7
S1
Output of the S1 Current Regulator. Like the S2 pin, the typical regulated currents
(IP_S1 and IP_S2) of S1 and S2 pins are the same.
8
HV
High-Voltage and Bias Voltage Input. Connect this pin to the rectified voltage from
AC input.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS7321-02 July 2014
is a registered trademark of Richtek Technology Corporation.
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RT7321
For WQFN-20L 5x5 Package
Pin No.
Pin Name
Pin Function
1
HV
High-Voltage Input. Connect this pin to the rectified voltage from AC input.
2, 4, 5, 6
NC
No Internal Connection.
3
HV1
Controlled High Voltage Output. A built-in high-voltage transistor, connected
between the HV and HV1 pins, controls the ON or OFF of the supply voltage to
the external high-voltage LED connected with HV1 pin.
7
S3
Output of the S3 Current Regulator. The regulated sinking currents (IP_S3 and
IS_S3) are easily programmed by users. In the “Parallel operation”, the current
(IP_S3) can be set from 10mA to 30mA by using the I21 to I23 pins; in the “Series
operation”, the current (IS_S3) can be set from the IP_S3 to 50mA by using the I31
to I33 pins. To directly connect the I21/I31, I22/I32 or I23/I33 pin to GND pin,
respectively increases the sinking current by 5mA, 10mA or 20mA. The initial
IP_S3 is 10mA if the I21 to I23 pins are open.
8
S4
Output Pin of the S4 Current Regulator. Like the S3 pin, the typical regulated
currents (IP_S3 and IP_S4; IS_S3 and IS_S4) of S3 and S4 pins are the same and
easily programmed by using the I21 to I23 pins and I31 to I33 pins, respectively.
9
I32
Current Setting Input for S3 and S4 pins. If this pin is directly connected to GND,
the regulated currents (IS_S3 and IS_S4) increase 10mA (typ.).
10
I31
Current Setting Input for S3 and S4 pins. If this pin is directly connected to GND,
the regulated currents (IS_S3 and IS_S4) increase 5mA (typ.).
11
I33
Current Setting Input Pin for S3 and S4 pins. If this pin is directly connected to
GND, the regulated currents (IS_S3 and IS_S4) increase 20mA (typ.).
12,
GND
21 (Exposed Pad)
Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
13
I21
Current Setting Input for S3 and S4 pins. If this pin is directly connected to GND,
the regulated currents (IP_S3/4 and IS_S3/4) increase 5mA (typ.).
14
I22
Current Setting Input for S3 and S4 pins. If this pin is directly connected to GND,
the regulated currents (IP_S3/4 and IS_S3/4) increase 10mA (typ.).
15
I23
Current Setting Input Pin for S3 and S4 pins. If this pin is directly connected to
GND, the regulated currents (IP_S3/4 and IS_S3/4) increase 20mA (typ.).
16
I13
Current Setting Input for S1 and S2 pins. If this pin is directly connected to GND,
the regulated currents (IP_S1 and IP_S2) increase 20mA (typ.).
17
I12
Current Setting Input for S1 and S2 pins. If this pin is directly connected to GND,
the regulated currents (IP_S1 and IP_S2) increase 10mA (typ.).
18
I11
Current Setting Input for S1 and S2 pins. If this pin is directly connected to GND,
the regulated currents (IP_S1 and IP_S2) increase 5mA (typ.).
19
S2
Output of the S2 Current Regulator. This pin only regulates the sinking current
(IP_S2) in the “Parallel operation”. To open or directly connect the I11, I12 or I13
pin to GND pin can easily program the sinking current from 10mA to 30mA by
users.
20
S1
Output of the S1 Current Regulator. Like the S2 pin, the typical regulated
currents (IP_S1 and IP_S2) of S1 and S2 pins are the same.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS7321-02 July 2014
RT7321
Function Block Diagram
S1
S2
S3
S4
S1
Current
Regulator
S2
Current
Regulator
S3
Current
Regulator
S4
Current
Regulator
ON_S1
ON_S2
ON_S3
ON_S4
For SOP-8 (Exposed Pad) Package
HV
GND
VS4
VREF
VS2
VREF1
Thermal
Regulation
Protection
Voltage
Regulator
VREG
M5
Parallel
ON/OFF
and
Parallel/Series
Controls
D1
HV1
S1
S2
S3
S4
S1
Current
Regulator
S2
Current
Regulator
S3
Current
Regulator
S4
Current
Regulator
ON_S1
ON_S2
ON_S3
ON_S4
For WQFN-20L 5x5 Package
HV
GND
IS2
VS4
IS1
VREF
VS2
VREF1
Thermal
Regulation
Protection
IS3
IS4
I11
I12
I13
I10
5mA 10mA 20mA 10mA
I11
I12
I13
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS7321-02 July 2014
VREG
M5
Parallel
ON/OFF
and
Parallel/Series
Controls
Current Setting
for S1 and S2
Voltage
Regulator
D1
HV1
Parallel
Current Setting for S3 and S4 :
I20, I21 to I23 are used in Parallel operation
I20, I21 to I23, I31 to I33 are used in Series operation
I21
I22
I23
5mA 10mA 20mA
I21
I22
I23
I20
I31
10mA 5mA
I31
I32
I33
10mA 20mA
I32
I33
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RT7321
Operation
Constant-Current Regulator
4 x VF
In Figure 1, each constant-current regulator in the RT7321
consists of an output high-voltage MOSFET, programmable
current-sense resistors, an error amplifier and a reference
voltage (VREF).
3 x VF
2 x VF
VF
VHV
t0 t1 t2 t3
Sx
VREG
t4
t5
t6 t7 t8 t9
Figure 2. Timing Chart
+
VREF
Error
Amplifier
M1
VCS
Programmable
Current-sense
Resistors
…
Ix3
Ix1
Figure 1
The error amplifier, designed with high DC gain, compares
the current signal (VCS) on the current-sense resistors
and the VREF to generate an amplified error signal. The
error signal regulates the output MOSFET (M1) to control
the sinking current on Sx pin at the programmed current
level. In addition, the operating Sx voltage (VSx) must be
higher than the minimum Sx voltage (VSx_MIN). Otherwise,
the output current might not be regulated at the
programmed level (ISx_SET). The VSx_MIN is approximately
calculated by the following equation:
VSx_MIN = 3000 x ISx_SET2 + 4 (V)
For the SOP-8 (Exposed Pad) package, the Sx regulated
currents are set by the internal bounding wires and
depends on the requests of users. For the WQFN-20L
5x5 package, the regulated currents are easily
programmed by users.
Parallel and Series Operations
For improving the utilization of high-voltage LEDs, the
RT7321 is equipped with a proprietary control mechanism
which switches the operating mode in either “parallel
operation” or “series operation”.
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Figure 3 shows the current paths in parallel operation. In
this operation (during t1 to t3 and t6 to t8), an internal
MOSFET are turned on to provide a current path from HV
to HV1 pins. In this operation, the S1 and S3 regulators
is turned on when the input voltage (VHV) is greater than
the LED forward voltage (VF) and smaller than 2 x VF (during
t1 to t2 and t7 to t8); the S2 and S4 regulators take over
the current regulations when the VHV is approximately
larger then 2 x VF and smaller than 3 x VF (during t2 to t3
and t6 to t7). The typical regulated currents are calculated
by the following equations:
IP_S1/2 = I10 + I11 (if I11 = GND) + I12 (if I12 = GND) + I13 (if I13 = GND)
IP_S3/4 = I20 + I21 (if I21 = GND) + I22 (if I22 = GND) + I23 (if I23 = GND)
VHV
HV1
HV
IP_S3
VHV
HV1
HV
IP_S1
S1
S3
S1
S3
IP_S4
S2
S4
GND
IP_S2
S2
S4
GND
(a)
(b)
Figure 3. Current Paths in Parallel Operation
As the VHV is approximately larger then 3 x VF (during t3
to t6), the series operation is active. Figure 4 shows the
current paths in series operation. In this operation, the
internal MOSFET is turned off and a built-in high-voltage
diode provides a current path from S2 to HV1 pins. In this
operation, the S3 regulator is turned on when the VHV is
approximately greater than 3 x VF and smaller than 4 x VF
(during t3 to t4 and t5 to t6); the S4 regulator takes over
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DS7321-02 July 2014
RT7321
the current regulation when the VHV is approximately larger
then 4 x VF (during t4 to t5). The typical regulated currents
are calculated by the following equations :
IS_S3/4 = IP_S3/4 + I31 (if I31 = GND) + I32 (if I32 = GND)
+ I33 (if I33 = GND)
VHV
HV1
VHV
HV
HV1
HV
S1
S3
S1
IS_S3
S3
IS_S4
S2
S4
GND
S2
S4
GND
(a)
(b)
Figure 4. Current Paths in Series Operation
Thermal Regulation Protection
When a LED lamp operates in high ambient temperature
conditions, it needs a thermal protection to limit the
temperatures for protecting LED lamps and ensuring
system reliability. The RT7321 provides a thermal
regulation protection, instead of traditional thermal
shutdown, to suppress the rise of temperatures. When
the IC junction temperature rise above 140°C (typ.), this
function starts to gradually reduce the regulated LED
current (IS_S3 and IS_S4), depending on the rise of the
junction temperature. Meanwhile, the system power
dissipation is also reduced. Finally, the temperatures in
the system will be well controlled and enter their steadystates. The function can achieve both of the two targets :
to protect LED lamps and to prevent them from flicker.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS7321-02 July 2014
is a registered trademark of Richtek Technology Corporation.
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RT7321
Absolute Maximum Ratings
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


(Note 1)
HV to GND Voltage, VHV -----------------------------------------------------------------------------------------------HV1 to GND Voltage ----------------------------------------------------------------------------------------------------HV1 to HV Voltage ------------------------------------------------------------------------------------------------------S1, S2 to GND Voltage (at off-state) --------------------------------------------------------------------------------S3, S4 to GND Voltage (at off-state) --------------------------------------------------------------------------------S1, S2, S3, S4 to GND Voltage (at on-state) ---------------------------------------------------------------------I11, I12, I13, I21, I22, I23, I31, I32, I33 to GND Voltage ---------------------------------------------------------Typical Value of Programmed Parallel Current --------------------------------------------------------------------Typical Value of Programmed Series Current ---------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------------WQFN-20L 5x5 ----------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------------WQFN-20L 5x5, θJA -----------------------------------------------------------------------------------------------------WQFN-20L 5x5, θJC ----------------------------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model), All pins except HV and HV1 -----------------------------------------------------MM (Machine Model) ----------------------------------------------------------------------------------------------------
Recommended Operating Conditions

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3.44W
3.54W
29°C/W
2°C/W
28.2°C/W
7.1°C/W
150°C
260°C
−65°C to 150°C
2kV
200V
(Note 4)
HV Supply Voltage, VHV -----------------------------------------------------------------------------------------------S1, S2 Input DC Voltage (at on-state) ------------------------------------------------------------------------------(at off-state) ------------------------------------------------------------------------------S3, S4 Input DC Voltage (at on-state) ------------------------------------------------------------------------------(at off-state) ------------------------------------------------------------------------------Typical Value of Programmed S1, S2 Current --------------------------------------------------------------------Typical Value of Programmed S3, S4 Current --------------------------------------------------------------------Ambient Temperature Range ------------------------------------------------------------------------------------------Junction Temperature Range -------------------------------------------------------------------------------------------
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
−0.3V to 500V
−0.3V to 500V
−0.3V to 300V
−0.3V to 450V
−0.3V to 300V
−0.3V to 150V
−0.3V to 5V
35mA
70mA
1V to 400V
1V to 100V
1V to 450V
1V to 100V
1V to 300V
10mA to 30mA
10mA to 50mA
−40°C to 85°C
−40°C to 125°C
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DS7321-02 July 2014
RT7321
Electrical Characteristics
(TA = 25°C, unless otherwise specification)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
mA
Output Current Section
I10, I20
VS1, VS2, VS3, or VS4 = 30V,
I11 to I33 = Open
9.5
10
10.5
I11
VS1 or VS2 = 30V, I11 = GND,
I12 = I13 = Open
4.75
5
5.25
Increment of S1, S2 Regulated
I12
Current
VS1 or VS2 = 30V, I12 = GND,
I11 = I13 = Open
9.5
10
10.5
I13
VS1 or VS2 = 30V, I13 = GND,
I11 = I12 = Open
19
20
21
I21
VS3 or VS4 = 30V, I21 = GND,
I22 = I23 = Open
4.75
5
5.25
I22
VS3 or VS4 = 30V, I22 = GND,
I21 = I23 = Open
9.5
10
10.5
I23
VS3 or VS4 = 30V, I23 = GND,
I21 = I22 = Open
19
20
21
I31
VS3 or VS4 = 30V, I31 = GND,
I32 = I33 = Open
4.75
5
5.25
I32
VS3 or VS4 = 30V, I32 = GND,
I31 = I33 = Open
9.5
10
10.5
I33
VS3 or VS4 = 30V, I33 = GND,
I31 = I32 = Open
19
20
21
S1 Leakage Current
VS2 = 20V, VS1 = 300V
--
--
300
A
S2 Leakage Current
VS2 = 300V
--
--
300
A
S3 Leakage Current
VS4 = 20V, VS3 = 200V
--
--
300
A
HV-to-HV1 Current
VHV = 5V, VHV1 = 0V
80
--
--
mA
S2-to-HV1 Current
VS2 = 1.2V, VHV1 = 0V
60
--
--
mA
Initial S1 to S4 Regulated
Current
Increment of S3, S4 Regulated
Current
mA
mA
Off-State Leakage Currents
Current Capability
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS7321-02 July 2014
is a registered trademark of Richtek Technology Corporation.
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RT7321
Typical Application Circuit
RT7321
X-cap
AC
RRSE
HV 8
1 HV1
MOV
7N391U
2
S3
S1
3 S4
4,
GND
9 (Exposed Pad)
7
S2 6
Figure 5. For SOP-8 (Exposed Pad) Package
RT7321
X-cap
AC
3
MOV
7N391U
7
RRSE
8
12, 21 (Exposed Pad)
9
10
11
13
1
HV1
HV
S3
S1
S4
GND
S2 19
18
I11
I32
I12
I31
I13
I33
I23
I21
I22
20
17
16
15
14
Figure 6. For WQFN-20L 5x5 Package
RT7321
RT7321
HV1
HV
HV1
HV
S3
S1
S3
S1
S4
S2
S4
S2
GND
GND
RT7321
X-cap
AC
MOV
7N391U
RRSE
RT7321
HV1
HV
HV1
HV
S3
S1
S3
S1
S4
S2
S4
S2
GND
GND
Figure 7. 24W to 25W Output Power Application
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DS7321-02 July 2014
RT7321
Application Information
Thermal Considerations
Maximum Power Dissipation (W)1
4.0
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 (Exposed Pad) package, the thermal resistance,
θJA, is 29°C/W on a standard JEDEC 51-7 four-layer
thermal test board. For WQFN-20L 5x5 package, the
thermal resistance, θJA, is 28.2°C/W on a standard JEDEC
51-7 four-layer thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by the following
formula :
WQFN-20L 5x5
3.0
2.5
SOP-8 (Exposed Pad)
2.0
1.5
1.0
0.5
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 8. Derating Curve of Maximum Power Dissipation
Layout Considerations

The thermal resistance θJA of SOP-8 (Exposed Pad) or
WQFN-20L 5x5 is determined by the package design
and the PCB design. However, the package design had
been designed. If possible, it's useful to increase
thermal performance by the PCB design. The thermal
resistance θJA can be decreased by adding a copper
under the exposed pad of SOP-8 (Exposed Pad) or
WQFN-20L 5x5 package. The Exposed Pad can be
connected the ground or an isolated plane on the PCB.

The used current setting pins (I11 to I33) must be directly
connect to GND pin with shortest copper paths. Notused current setting pins (I11 to I33) must be kept open.
P D(MAX) = (125°C − 25°C) / (29°C/W) = 3.44W for
SOP-8 (Exposed Pad) package
PD(MAX) = (125°C − 25°C) / (28.2°C/W) = 3.54W for
WQFN-20L 5x5 package
Four-Layer PCB
3.5
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 8 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
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RT7321
Selection Guide of the RT7321 in the SOP-8
(Exposed Pad) Package
The S1 to S4 sinking current of the RT7321 in the SOP-8
(Exposed Pad) package depends on the requests of users
and set by the internal bounding wires. In the “Parallel
operation”, the LED current range can be set from 10mA
to 30mA; in the “Series operation”, the LED current range
can be set from 10mA to 50mA. The following table shows
the selection guide of the RT7321 in the SOP-8 (Exposed
Pad) package for the applications with input power from
5W to 8W.
Input Power
Parallel Current
Series Current
Ordering Information
5W
10mA
30mA
RT7321AEGSP
6W
15mA
35mA
RT7321BFGSP
7W
20mA
40mA
RT7321CGGSP
8W
20mA
45mA
RT7321CHGSP
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
www.richtek.com
12
is a registered trademark of Richtek Technology Corporation.
DS7321-02 July 2014
RT7321
Outline Dimension
1
1
2
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min.
Max.
Min.
Max.
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.250
0.350
0.010
0.014
D
4.900
5.100
0.193
0.201
D2
3.100
3.200
0.122
0.126
E
4.900
5.100
0.193
0.201
E2
3.100
3.200
0.122
0.126
0.650
e
L
0.500
0.026
0.600
0.020
0.024
W-Type 20L QFN 5x5 Package
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS7321-02 July 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT7321
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
www.richtek.com
14
DS7321-02 July 2014