® RT9450A Switch-Mode Single Cell Li-Ion Battery Charger with USB-OTG General Description Features The RT9450A is a low cost switch-mode single cell Li-ion and Li-polymer battery charger for portable applications. It integrates a synchronous PWM controller, power MOSFETs, input current sensing, high accuracy current and voltage regulation, and charge termination into a small package for space-limited devices. The RT9450A also features USB On-The-Go (OTG). z z z z z z The RT9450A optimizes the charging task by using a control algorithm to vary the charge rate via different modes, including preconditioning mode, fast charge mode, and constant voltage mode. All charge parameters can be executed via the I2C interface. Some of these parameters z z z include a user-selectable minimum current level setting for charge termination, a safety timer with reset control to provide safety backup for I2C interface, and charge status indication to the host. During normal operation, the RT9450A automatically restarts the charge cycle whenever the battery voltage falls below an internal threshold and automatically enters sleep mode when the input supply is removed. z z z z z z Other features include under voltage protection, over voltage protection, thermal regulation and protection, and reverse leakage protection. Support USB On-The-Go (OTG) High Accuracy Voltage and Current Regulation Average Input Current Regulation (AICR) : 100mA, 400mA, 1000mA Charge Voltage Regulation Accuracy : ±1% (0°°C to 85°°C) Charge Current Regulation Accuracy : ±5% Hi-Efficiency USB/AC Battery Charger for Single Cell Li-Ion Battery Built-in Input Current Sensing and Limiting Integrated Power MOSFETs Synchronous 3MHz Fixed Frequency PWM Controller with up to 99.5% Duty Cycle Reverse Leakage Protection to Prevent Battery Drainage Thermal Regulation and Protection Input Over Voltage Protection Status Output for Charging and Faults Automatic Charging RoHS Compliant and Halogen Free Applications z z The RT9450A is available in a small WL-CSP-20B 2x2 (BSC) package. z Mobile Phones & Smart Phones MP3 Players Handheld Devices Simplified Application Circuit VIN VIN RT9450A MID CMID CIN L LX CSYSS SCL SDA GND Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 + Battery BATS is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9450A Ordering Information Pin Configurations (TOP VIEW) RT9450A Package Type WSC : WL-CSP-20B 2x2 (BSC) Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. A1 A2 A3 A4 VIN VIN BOOT SCL B1 B2 B3 B4 MID MID PTM SDA C1 C2 C3 C4 LX LX LX STAT D1 D2 D3 D4 PGND PGND PGND OTG E1 Marking Information 14 : Product Code 14 YM DNN E3 E4 VDD ISENR WL-CSP-20B 2x2 (BSC) YMDNN : Date Code Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 E2 ISENL BATS is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Functional Pin Description Pin No. Pin Name A1, A2 VIN Power Input. Bypass to PGND with an 1μF ceramic capacitor. A3 BOOT Bootstrap Supply for High Side MOSFET Driver. Connect a 22nF ceramic capacitor (voltage rating above 10V) from this pin to LX pin. A4 SCL Clock Input for I C. Open drain output, connect a 10kΩ pull-up resistor. B1, B2 MID Connection Point between Reverse Blocking MOSFET and High Side MOSFET. Bypass to PGND with a minimum 1μF but no more than 2.2μF capacitor. B3 PTM Protection Test Mode Enable Control. When PTM is in active status, the IC is able to supply up to 2.3A for powering external load with no battery installed and BATS is regulated at 4.2V. There is an internal 100kΩ pull-down resistor. B4 SDA Data Input for I C. Open drain output, connect a 10kΩ pull-up resistor. LX Internal Switch to Output Inductor Connection. C4 STAT Charge Status Indicator. Pull low when charge is in progress. Open drain for other conditions. During faults, a 128μs pulse is sent out. The STAT pin can be disabled via the EN_STAT bit in control register. STAT can be used to drive an LED or communicate with a host processor. D1, D2, D3 PGND Power Ground. D4 OTG Boost Mode Enable Control or Input Current Limit Selection. When OTG is in active 2 status, the IC is forced to operate in boost mode. It has higher priority over I C control and can be disabled through control register. The logic voltage level of OTG in active status can also be controlled. At POR, the OTG pin is used as the input current limiting selection pin by default. When OTG = High, AICR = 100mA and when OTG = Low, AICR = 400mA. See Control Register for details. E1 ISENL Charge Current Sense Input. Battery current is sensed via the voltage drop across an external sense resistor. A 0.1μF ceramic capacitor to PGND is required. E2 BATS Auxiliary Power Supply. Connect to battery pack to provide power in high impedance mode. Bypass to PGND with a 1μF ceramic capacitor. E3 VDD Internal Bias Regulator Voltage. Connect a 1μF ceramic capacitor from this output to PGND. External load on VDD is not allowed. E4 ISENR Battery Voltage and Current Sense Input. Bypass to PGND with a minimum 0.1μF ceramic capacitor if there is long distance from the pin to battery. C1, C2, C3 Pin Function 2 2 Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9450A Function Block Diagram IIN Sense VIN VDD BASE VREF Sleep Mode Charge Pump IBIAS MID Driver OSC PWM Boot Reg. BOOT LX Timer ISENL ISENR IOUT Sense Loop Controller Driver PGND BATS Protection 1 Logic OTG PTM SCL Protection 2 I2C Interface SDA STAT All Setting Output Voltage Output Current VRECH Pre-Charge Fast-Charge Constant Voltage Re-Charge Charge Termination CC VPREC IEOC IPREC Time Figure 1. Charging I-V Curve (Without Input Current Limit) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Operation The RT9450A is a switch mode charger with USB-OTG support for single cell Li-Ion battery in portable applications. Base Circuits Base circuits provide the internal power, VDD and reference voltage and bias current. Protection Circuits The protection block includes the OVP, UVLO, OTP and other circuits. It turns off the charging when the charger IC or input power is in abnormal level. Loop Controller, PWM and Driver power and IOUT Sense circuit regulates the output current up to 1.5A to battery The multi loop controller controls the PWM signal during the charging process. The PWM circuit controls the power stage through the Driver. It makes sure that the battery is well-charged with suitable current, voltage and dietemperature. Sleep Mode Control Circuits I2C Interface When the charger is only connected to battery with no input power, the charger enters the sleep mode. The battery leakage current from battery to the charger IC is less than 20μA for low power consumption The I 2C interface is used to program the charging parameters, ex : output current and output voltage. IIN Sense and IOUT Sense IIN Sense circuit regulates the input current for USB input Charge Pump and Boot Reg. Charge pump provides the power to the blocking P-MOSFET, operating as a switch from VIN to VMID. Boot Reg. supplies the power to the driver for high side power MOSFET. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9450A Flow Charts No Yes 2 Any I C in 32 sec ? 2 In T32sec mode Mode is Controlled by I C Yes Charge Start In T32min Mode No 2 Any I C ? > 32 min ? No Mode is Controlled by OTG Pin Yes Timer Fault POR Reset VIN > 2.4V and VBATS > 2.4V ? Yes No Yes VIN > 3.3V ? Charge Configure 2 (I C is Programmable) No Clean I C Any State If VIN < 2.4V and VBATS < 2.4V Power On Any State If Time Fault 2 High Impedance by I2C Any State HZ = 1 & OTG is Inactive High Impedance HZ = 0, OPA = 0 Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Charger Flow Power On CEB = HIGH Disable Charge (Charge Configure Mode) Any State 2 Load I C with Default Settings No VBATS > 2V ? Charge with IPREC (Indicate Short Circuit Condition) No No 2 I C Setting ? Yes 32 min Expired ? T32min Mode Yes Turn Off Charge Indicate Fault (CEB = HIGH) Yes Yes Fast-Charge T32sec Mode (Charge with IPREC) 2 Any I C ? No 32 sec Expired ? No Yes IEOC is Enabled ? No Keep in CV Mode Yes No ICHRG < IEOC ? Yes Sink 0.5mA from Battery (Start 256ms Timer) VBATS > VRECH & 256ms Timer is Expired ? No VBATS < VRECH ? Charge Done (Indicate Done) Yes Yes <32S No Yes 2 Any I C ? No Clean 32S No No Battery is Absent, 2 Reset I C Setting But TE Yes Start Charging Till CV IEOC is Enabled ? Yes Battery Detection Mode (Detect Every 2s) Battery is Present ? Yes Start Charging Till EOC No Yes VIN < UVLO ? 2 Yes Any I C ? No No Yes < 32S No Battery Absence 2 Reset I C Yes 2 Any I C ? No Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9450A OTG Charge Configure 2 (I C is Programmable) No OPA = 1 & HZ = 0 ? Yes No No OTG_EN is Enabled ? 2 (By I C) OTG pin is Active ? Reset OPA bit Yes Yes Boost Configure 1 Boost Configure 2 2 Clean I C No 2.9V < V BATS < 4.75V ? 2.9V < VBATS < 4.75V ? Yes No Yes VMID = 5.05V VMID = 5.05V 2.5V < VBATS < 4.75V ? 2.5V < VBATS < 4.75V ? Yes Yes No 2 Yes VIN < 6V ? VIN < 6V ? Yes Yes < 32s Any I C ? No No No < 32s No No Yes 2 Yes Any I C ? Yes No No Reset 32s Reset 32s Overload < 32ms No Yes Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 No Overload < 32ms Yes is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Absolute Maximum Ratings z z z z z z z z z z (Note 1) Supply Input Voltage, VIN -----------------------------------------------------------------------------------------------MID, BOOT -----------------------------------------------------------------------------------------------------------------MID − VIN --------------------------------------------------------------------------------------------------------------------Other Pins -------------------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C −0.3V to 28V −0.3V to 28V −0.3V to 6V −0.3V to 6V WL-CSP 20B 2x2 (BSC) ------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) WL-CSP 20B 2x2 (BSC), θJA -------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------Junction Temperature -----------------------------------------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ----------------------------------------------------------------------------------------------MM (Machine Model) ------------------------------------------------------------------------------------------------------ 2.44W Recommended Operating Conditions z z z 41°C/W 260°C 150°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage, VIN ------------------------------------------------------------------------------------------------ 4V to 6V Junction Temperature Range --------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range --------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 5V, TA = 25°C, unless otherwise specified) Parameter VIN Supply Current Symbol IQ Leakage Current from Battery Test Conditions Min Typ Max Unit VIN > VUVLO, PWM Switching -- 10 -- VIN > VUVLO, PWM Not Switching -- -- 5 High Impedance Mode, SDA = SCL = 0V -- -- 50 μA VBATS = 4.2V, High Impendence Mode, SDA = SCL = 0V -- -- 20 μA Voltage Regulation I C Programmable 3.5 -- 4.45 V 0 to 85°C −1 -- 1 % -- 1.5 A −5 -- 5 % mA Voltage Regulation Output Charge Voltage VOREG Voltage Regulation Accuracy 2 Current Regulation (Fast Charge) Output Charge Current ICHRG VBATS < VOREG, VIN > VSLP, R SENSE = 56mΩ, 0.66 2 I C Programmable Per 120mA Regulation Accuracy OTG Level OTG Input Voltage Logic-High VIH 1.3 -- -- Logic-Low VIL -- -- 0.4 60 -- 480 V Charge Termination Detection Termination Charge Current IEOC VBATS < VOREG, VIN > VSLP, R SENSE = 56mΩ, 2 I C Programmable Per 60mA Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 mA is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT9450A Parameter Deglitch Time for Charge Termination Symbol Min Typ -- 32 -- 3mV < VIEOC < 20mV, VIEOC = IEOC x RSENSE −25 -- 25 20mV < VIEOC < 40mV, VIEOC = IEOC x RSENSE −5 -- 5 USB Charge Mode, AICR = 100mA 80 90 100 USB Charge Mode, AICR = 400mA -- 380 400 USB Charge Mode, AICR = 1000mA -- 950 1000 4.25 -- 4.75 V −2 -- 2 % -- 60 -- mA Pre-Charge Threshold Voltage VPREC 1.9 2 2.1 V Pre-Charge Current 20 30 40 mA 100 125 150 mV -- 128 -- ms Voltage Regulation Accuracy for Termination Current Across R SENSE Test Conditions Max Unit ms % Input Power Regulation Average Input Current Regulation Threshold AICR 2 Input Voltage DPM I C Programmable per 0.25V DPM Accuracy mA VDD Regulator VDD Short Circuit Limit Battery Pre-Charge Threshold IPREC Battery Recharge Threshold Recharge Threshold Voltage VRECH VOREG = 4.2V Deglitch Time STAT Pin STAT Pin Voltage IDS = 10mA -- -- 0.4 V STAT Pin Leakage VSTAT = 5V -- -- 1 μA IDS = 10mA -- -- 0.4 V 1.3 -- -- -- -- 0.4 -- -- 1 μA -- -- 400 kHz -- −0.5 -- mA -- 256 -- ms 2.5V < VBATS < VOREG, VIN Falling 0 0.04 0.1 V 2.5V < VBATS < VOREG 40 100 200 mV -- 2 -- ms 3.05 3.3 3.55 V -- 150 -- mV 2 I C Characteristics Output Low Voltage SCL, SDA Input Voltage VOL Logic-High VIH Logic-Low VIL Bias Current IBIAS VSCL = VSDA = 1.8V SCL Clock V Battery Detection Detection Current After Termination Done Detection Time Sleep Comparator Sleep-Mode Entry Threshold, VIN − VBATS VSLP Sleep-Mode Exit Hysteresis Deglitch Time for VIN Rising Under Voltage Lockout IC Active Threshold Voltage VUVLO VIN Rising IC Active Hysteresis ΔVUVLO VIN Falling from UVLO Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Parameter Symbol Test Conditions Min Typ Max Unit PWM The On-Resistance from VIN to LX Measured from VIN to LX -- 280 450 mΩ Internal Bottom N-MOSFET On-Resistance Measured from LX to PGND -- 60 120 mΩ Oscillator Frequency -- 3 -- MHz Frequency Accuracy −10 -- 10 % Maximum Duty Cycle DMAX -- 99.5 -- % Minimum Duty Cycle DMIN 0 -- -- % 2 2.5 3 A 6.2 6.5 6.8 V -- 150 -- mV 110 117 124 % -- 10 -- % Thermal Trip -- 165 -- °C Thermal Hysteresis -- 20 -- °C -- 120 -- °C -- 32 -- s Peak Over Current Protection Protection Threshold Over VIN to Turn Off Converter During Charge VIN OVP Threshold VOVP_IN VIN OVP Hysteresis ΔVOVP_IN Battery OVP Threshold VOVP_BAT VBATS / VOREG Battery OVP Hysteresis ΔVOVP_BAT (VBATS − VOREG) / VOREG Thermal Regulation Threshold Charge Current Begins to Reduce T32sec Mode Timer Boost Mode Operation Output Voltage Level To VIN -- 5.05 -- V Output Accuracy Including Line / Load Regulation −3 -- 3 % 500 -- -- mA 2 3 4 A Output OVP Threshold 5.7 6 6.3 V Output OVP Hysteresis -- 200 -- mV 4.5 4.75 5 V -- 200 -- mV As Boost Starts 2.75 2.9 3.05 During Boost 2.35 2.5 2.65 -- 200 -- MAX Output Current Peak Over Current Protection BATS Maximum Input Voltage VISENR Rising Edge in Boost Mode BATS Maximum Input Voltage Hysteresis BATS Minimum Input Voltage BATS Minimum Input Voltage Hysteresis V mV Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT9450A Typical Application Circuit VIN 1µF BATS RT9450A A1, A2 VIN BOOT E3 VDD LX 1µF ISENL B1, B2 MID 1µF ISENR C4 STAT BATS D4 OTG A4 SCL B4 SDA Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 A3 22nF C1, C2, C3 E1 0.1µF 10µF E4 E2 + 1µF PTM B3 PGND RSENSE 56m 1µH Battery D1, D2, D3 is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Typical Operating Characteristics Charge Mode Adapter Insertion Efficiency vs. Charge Current 92 VIN (5V/Div) Efficiency (%) 86 VBAT = 4V VBAT = 3.6V VBAT = 3V 80 LX (5V/Div) 74 I IN (500mA/Div) 68 VIN = 0V to 5V, VBAT = 3.5V 62 0 260 520 780 1040 Time (10ms/Div) 1300 Charge Current (mA) PWM Charging Battery Insertion/Removal LX (5V/Div) VBAT (5V/Div) LX (5V/Div) ILX (500mA/Div) IBAT (500mA/Div) 32-second Mode VIN = 5V, AICR = 500mA, VOREG = 4.44V VIN = 5V, VBAT = 2.6V, ICHRG = 1.25A Time (1s/Div) Time (100ns/Div) Cycle by Cycle Current Limit Input Current Control LX (5V/Div) 32 Minute 32 Second Mode Mode OTG (1V/Div) ILX (1A/Div) VIN = 5V, VBAT = 3.6V Time (1μs/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 I IN (200mA/Div) VIN = 5V Time (500ms/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT9450A Boost Mode Efficiency vs. Load Current Pulse-Width-Modulation Mode 90 V IN_ac (10mV/Div) VBAT_ac (10mV/Div) Efficiency(%) 76 VBAT = 4V VBAT = 3.6V VBAT = 2.5V 62 LX (5V/Div) 48 ILX (500mA/Div) 34 VBAT = 3.5V, ILOAD = 200mA 20 0 50 100 150 200 Time (100ns/Div) Load Current (mA) Pulse-Skipping Mode VIN Overload VIN (10V/Div) V IN_ac (100mV/Div) VBAT_ac (100mV/Div) MID_ac (200mV/Div) LX (5V/Div) LX (10V/Div) I LOAD (500mA/Div) ILX (500mA/Div) VBAT = 3.5V, ILOAD = 10mA VBAT = 3.5V, ILOAD = 40mA Time (5μs/Div) Time (5ms/Div) Load Step Up Response Load Step Down Response V IN_ac (200mV/Div) V IN_ac (200mV/Div) VBAT_ac (200mV/Div) VBAT_ac (200mV/Div) LX (10V/Div) I LOAD (500mA/Div) LX (10V/Div) I LOAD (500mA/Div) VBAT = 3.85V, ILOAD = 0 to 200mA Time (100μs/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 VBAT = 3.85V, ILOAD = 0 to 200mA Time (100μs/Div) is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Input Voltage vs. VBAT Boost to Charge Mode Transition 5.12 V IN_ac (1V/Div) 5.11 Input Voltage (V) OTG (5V/Div) LX (10V/Div) ILX (1A/Div) VIN = 4.5V (Charge Mode) VIN = 5.1V (Boost Mode) VBAT = 3.5V, 32-second Mode ILOAD = 200mA 5.10 5.09 ILOAD = 100mA 5.08 5.07 ILOAD = 50mA 5.06 Time (500μs/Div) 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 VBAT (V) Input Voltage vs. Load Current 5.14 Input Voltage (V) 5.12 5.10 VBAT = 3.6V VBAT = 4V VBAT = 2.5V 5.08 5.06 5.04 0 50 100 150 200 Load Current (mA) Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT9450A Applications Information The RT9450A is an integrated solution of single-cell Li-ion and Li-polymer battery charger for portable applications. The part integrates a synchronous PWM controller with power MOSFETs to provide input voltage DPM (Dynamic Power Management), input current sensing, high accuracy current and voltage regulation, and charge termination in a small package for space limited devices. The part also features USB OTG (On-The-Go). The RT9450A has three operation modes : charge mode, boost mode (USB OTG), and high impedance mode. In charge mode, the RT9450A supports a precision charging system for single cell. In boost mode, the RT9450A works as the boost converter and boosts the voltage from battery to VIN pin for sourcing the OTG devices. In high impedance mode, the RT9450A stops charging or boosting and operates in a mode with low current from VIN or battery to reduce the power consumption when the portable device is in standby mode. Start Notice that the RT9450A does not integrate input power source (AC adapter or USB input) detection. Thus, the RT9450A does not set the charge current automatically. The charge current needs to be set via I2C interface by the host. The RT9450A application mechanism and I2C compatible interface are introduced in later sections. The slave address for this device is “1000101”. I2C Interface Timing Diagram The RT9450A acts as an I2C -bus slave. The I2C -bus master configures the settings for charge mode and boost mode by sending command bytes to the RT9450A via the 2-wire I2C -bus. After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The second byte selects the register to which the data will be written. The third byte contains data to the selected register. The 1st Byte (Slave Address, R/W) The 2nd Byte (Data Address, Data) The 3rd Byte (Data) 1 0 0 0 1 0 1 R/W B7B6B5B4B3B2B1B0 C7C6C5C4C3C2C1C0 Stop S P SCL SDA 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 0 A6 A5 A4 A3 A2 A1 A0 W ACK B7 B6 B5 B4 B3 B2 B1 B0 ACK C7 C6 C5 C4 C3 C2 C1 C0 ACK S = Start Condition W = Write (SDA = “0”) R = Read (SDA = “1”) ACK = Acknowledge P = Stop Condition Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A I2C Information Slave Address : 1000101 Address Name Bit7 Device ID 0x03 0x02 0x04 0x06 Bit3 Bit2 PART_NO Bit1 Bit0 CHIP_REV 1 0 0 0 0 0 0 1 Read/Write R R R R R R R R TMR_RST/ EN_STAT OTG STAT BOOST NA Reset Value 0 1 0 0 0 0 0 0 Read/Write R/W R/W R R R R R R TE CEB HZ OPA AICR VIN DPM Reset Value 0 1 1 1 0 0 0 0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Control3 CV5 CV4 CV3 CV2 CV1 CV0 Reset Value 1 0 0 0 1 1 1 0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Control4 RST CC2 CC1 CC0 PTM_EN EOC2 EOC1 EOC0 Reset Value 1 0 0 0 1 0 0 0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W CHGBAT AB NA Control4 0x05 Bit4 VENDOR_ID Control2 0x01 Bit5 Reset Value Control1 0x00 Bit6 CHGVINUV CHGSLP CHGTFLT CHGOT OTG_PL OTG_EN CHGBAT CHGVIN OV OV Reset Value 0 0 0 0 0 0 0 0 Read/Write R R R R R R R R Control4 NA Reset Value 0 0 0 0 0 0 0 0 Read/Write R R R R R R R R CHGDPM BSTTFLT Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 BSTOT BSTBAT BSTBATU BSTVINO BSTOLP OV V V is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 RT9450A Detailed Table Descriptions Address Name Bit7 Device ID 0x03 Bit5 Bit4 VENDOR_ID Bit1 PART_NO Bit0 CHIP_REV 0 0 0 0 0 0 1 Read/Write R R R R R R R R Vendor Identification : Richtek : 1000b Chip Revision TMR_RS EN_STAT T/OTG Control1 STAT BOOST NA Reset Value 0 1 0 0 0 0 0 0 Read/Write R/W R/W R R R R R R Write : TMR_RST function, write "1" to reset the safety timer (auto clear) Read : OTG pin status, 0-OTG pin at High level, 1-OTG pin at Low level TMR_RST/OTG EN_STAT 0-Disable STAT pin function, 1-Enable STAT pin function (Default 1) STAT 00-Ready, 01-Charge in Progress, 10-Charge done, 11-Fault BOOST 1-Boost mode, 0-Not in Boost mode NA NA Control2 AICR VIN DPM TE CEB HZ OPA Reset Value 0 1 1 1 0 0 0 0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W 00-USB host with 100mA current limit, 01-USB host with 400mA current limit, 10-USB host/charger with 1000mA current limit, 11-No input current limit (Default 01) AICR 00 01 10 11 VIN DPM TE Æ 4.25V Æ 4.5V Æ 4.75V Æ disable 1-Enable charge current termination, 0-Disable charge current termination (Default 0) CEB 1-Charger is disabled, 0-Charger enabled (Default 0) HZ 1-High impedance mode, 0-Not high impedance mode (Default 0) OPA 0x02 Bit2 1 CHIP_REV 0x01 Bit3 Reset Value VENDOR_ID 0x00 Bit6 1-Boost mode, 0-Charger mode (Default 0) Control3 CV5 CV4 CV3 CV2 CV1 CV0 Reset Value 1 0 0 0 1 1 1 0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W OTG_PL 1-Active at Low level, 0-Active at High level (Default 1) OTG_EN 1-Enable OTG Pin, 0-Disable OTG pin (Default 0) OTG_PL OTG_EN Charge Voltage Range is from 3.5V to 4.45V (Default 4.2V) CV5 CV4 CV3 CV2 CV1 CV0 VOREG (V) 0 0 0 0 0 0 3.50 0 0 0 0 0 1 3.52 0 0 0 0 1 0 3.54 0 0 0 0 1 1 3.56 0 0 0 1 0 0 3.58 0 0 0 1 0 1 3.60 0 0 0 1 1 0 3.62 Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 18 is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A CV5 CV4 CV3 CV2 CV1 CV0 VOREG (V) 0 0 0 1 1 1 3.64 0 0 1 0 0 0 3.66 0 0 1 0 0 1 3.68 0 0 1 0 1 0 3.70 0 0 1 0 1 1 3.72 0 0 1 1 0 0 3.74 0 0 1 1 0 1 3.76 0 0 1 1 1 0 3.78 0 0 1 1 1 1 3.80 0 1 0 0 0 0 3.82 0 1 0 0 0 1 3.84 0 1 0 0 1 0 3.86 0 1 0 0 1 1 3.88 0 1 0 1 0 0 3.90 0 1 0 1 0 1 3.92 0 1 0 1 1 0 3.94 0 1 0 1 1 1 3.96 0 1 1 0 0 0 3.98 0 1 1 0 0 1 4.00 0 1 1 0 1 0 4.02 0 1 1 0 1 1 4.04 0 1 1 1 0 0 4.06 0 1 1 1 0 1 4.08 0 1 1 1 1 0 4.10 0 1 1 1 1 1 4.12 1 0 0 0 0 0 4.14 1 0 0 0 0 1 4.16 1 0 0 0 1 0 4.18 1 0 0 0 1 1 4.20 1 0 0 1 0 0 4.22 1 0 0 1 0 1 4.24 1 0 0 1 1 0 4.26 1 0 0 1 1 1 4.28 1 0 1 0 0 0 4.30 1 0 1 0 0 1 4.33 1 0 1 0 1 0 4.35 1 0 1 0 1 1 4.37 1 0 1 1 0 0 4.39 1 0 1 1 0 1 4.41 1 0 1 1 1 0 4.43 1 0 1 1 1 1 4.45 Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 19 RT9450A Address Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 RST CC2 CC1 CC0 PTM_EN EOC2 EOC1 EOC0 0x04 Control4 Reset Value Read/Write 1 0 0 0 1 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W RST Write : 1-Charger in Reset Mode, 0-No Effect, Read : Always get "1" CC2 Charge Current Sense Voltage : 26.88mV (Default 0) CC1 Charge Current Sense Voltage : 13.44mV (Default 0) CC0 Charge Current Sense Voltage : 6.72mV (Default 0) Charge current range is from 0.66A to 1.5A with the offset of 0.66A and step of 120mA (default 0.66A). If a 56mΩ sensing resistor is used. PTM_EN : Low to disable PTM. PTM_EN PTM_EN: High and the PTM ball is high to enable PTM. EOC2 Termination Current Sense Voltage : 13.6mV (Default 0) EOC1 Termination Current Sense Voltage : 6.8mV (Default 0) EOC0 Termination Current Sense Voltage : 3.4mV (Default 0) Termination current range is from 60mA to 0.48A with the offset of 0.06A and step of 0.06A (default 0.06A) if a 56mΩ sensing resistor is used. CHGVIN CHGBAT CHGBAT Control5 CHGSLP CHGTFLT CHGOT NA CHGVINOV UV AB OV Reset 0x05 0 0 0 0 0 NA 0 0 Value Read/Write R R R R R NA R R CHGVINUV Charge Mode Fault : 0 Æ Normal, 1 Æ VIN < VUVLO CHGSLP Charge Mode Fault : 0 Æ Normal, 1 Æ Sleep Mode CHGTFLT Charge Mode Fault : 0 Æ Normal, 1 Æ Timer Fault CHGOT CHGBATAB NA Charge Mode Fault : 0 Æ Normal, 1 Æ Thermal Shutdown Charge Mode Fault : 0 Æ Normal, 1 Æ No Battery NA CHGBATOV Charge Mode Fault : 0 Æ Normal, 1 Æ Output OVP CHGVINOV Charge Mode Fault : 0 Æ Normal, 1 Æ VIN OVP BSTBAT NA CHGDPM BSTTFLT BSTOT OV Control6 0x06 Reset Value Read/Write 0 0 0 0 0 0 0 0 R R R R R R R R NA NA CHGDPM Charge Mode Indication : 0 Æ Normal, 1 Æ DPM Trigger BSTTFLT Boost Mode Fault : 0 Æ Normal, 1 Æ Timer Fault BSTOT BSTBAT BSTOLP BSTVINOV UV Boost Mode Fault : 0 Æ Normal, 1 Æ Thermal Shutdown BSTBATOV Boost Mode Fault : 0 Æ Normal, 1 Æ Battery OVP BSTBATUV Boost Mode Fault : 0 Æ Normal, 1 Æ Battery Voltage is too Low BSTOLP Boost Mode Fault : 0 Æ Normal, 1 Æ Overload BSTVINOV Boost Mode Fault : 0 Æ Normal, 1 Æ VIN OVP Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 20 is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Termination Current Settings for 56mΩ and 100mΩ Sense Resistors BIT VIEOC (mV) IEOC (mA) RSENSE = 56mΩ IEOC (mA) RSENSE = 100mΩ EOC2 13.44 240 136 EOC1 6.72 120 68 EOC0 3.36 60 34 Offset 3.36 60 34 Charge Current Settings for 56mΩ and 100mΩ Sense Resistors BIT VCHRG (mV) ICHRG (mA) RSENSE = 56mΩ ICHRG (mA) RSENSE = 100mΩ CC2 26.88 480 272 CC1 13.44 240 136 CC0 6.72 120 68 Offset 37 660 374 Charge Mode Operation Charge Profile Input Voltage Dynamic Power Management (DPM) The RT9450A provides a precision Li-ion or Li-polymer charging solution for single-cell applications. Input current limit, charge current, termination current, charge voltage and input voltage DPM are all programmable via the I2C interface. In charge mode, the RT9450A has five control loops to regulate input current, charge current, charge voltage, input voltage DPM and device junction temperature. During the charging process, all five loops (if DPM is enabled) are enabled and the dominant one will take over the control. For normal charging process, the Li-ion or Li-polymer battery is charged in three charging modes depending on the battery voltage. At the beginning of the charging process, the RT9450A is in pre-charge mode. When the battery voltage rises above pre-charge threshold voltage (VPREC), the RT9450A enters fast-charge mode. Once the battery voltage is close to the regulation voltage (VOREG), the RT9450A enters constant voltage mode. The RT9450A features input voltage DPM function to prevent input voltage drop due to insufficient current provided by the adaptor or USB input. If DPM function is enabled, the input voltage decreases when the over current of the input power source occurs and is regulated at a predetermined voltage level which can be set as 4.25V, 4.5V or 4.75V by I2C interface to “VIN DPM” section (bit 5 and 4) in the register of address 0X01. The STAT pin sends a 128μs pulse to notify the host and the CHGDPM bit is set to high. At this time, the current drawn by the RT9450A equals to the maximum current value that the input power can provide at the predetermined voltage level, instead of the set value. The DPM function is initially disabled. VIN VIN DPM Pre-Charge Mode Expected IIN Final IIN IIN set charge current Figure 2. Input Voltage Dynamic Power Management (DPM) Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 For life-cycle consideration, the battery can not be charged with large current under low battery condition. When the BATS pin voltage is below pre-charge threshold voltage (VPREC), the charger is in pre-charge mode with a weak charge current witch equals to the pre-charge current (IPREC). In pre-charge mode, the charger basically works as an LDO. The pre-charge current also acts as the current limit when the BATS pin is shorted. is a registered trademark of Richtek Technology Corporation. www.richtek.com 21 RT9450A Fast-Charge Mode and Settings As the BATS pin rises above VPREC, the charger enters fast-charge mode and starts switching. Notice that the RT9450A does not integrate input power source (AC adapter or USB input) detection. Thus, the RT9450A does not set the charge current automatically. Unlike the linear charger (LDO), the switching charger (Buck converter) is a current amplifier. The current drawn by the RT9450A is different from the current into the battery. The user can set the Average Input Current Regulation (AICR) and output charge current (ICHRG) respectively. Cycle-by-Cycle Current Limit The charger of the RT9450A has an embedded cycle-bycycle current limit for inductor. Once the inductor current touches the threshold (2.5A typ.), the charger stops charging immediately to prevent over current from damaging the device. Notice that, the mechanism can not be disabled by any way. When input current limit and charge current are both set, the charge current in fast charge phase is calculated as below : ⎡V ⎛ IIN_LIMIT ⎞⎤ ×η ⎟ ⎥ ICHRG = MIN ⎢ ICHRG , ⎜ D ⎠⎦ ⎣ RSENSE ⎝ where D is the duty cycle and η is the efficiency. Frequency Reduction for Efficiency Improvement The switching frequency of the RT9450A is normally 3MHz. However, for improving efficiency, the RT9450A can also operate at 1.5MHz and 1MHz, which frequency are changed automatically depending on the energy demand. During the CC phase, the power flowing into the battery raises with the increased battery voltage. Hence, when battery voltage reaches the level, the switching frequency steps down to 1.5MHz. Then, if the battery voltage keeps rising, the switching frequency will be further decreased to 1MHz for power saving. Notice that, for operating at 1MHz, please make sure the inductor will not be saturated with a lager ripple current. Average Input Current Regulation (AICR) The AICR setting is controlled by the AICR section (bit 7 and 6) in the register of address 0x01. The written value of “00” is for USB100 mode with the maximum current limit of 100mA, “01” is for USB 500 mode with the maximum current limit of 400mA and “10” is for the maximum current limit of 1000mA. If the application does not need input current limit, write “11” into the IINLIMIT section. Charge Current (ICHRG) The charge current into the battery is determined by the sense resistor (RSENSE) and CC section (CC2, CC1 and CC0) in the register of address 0x04. The voltage between the ISENL and ISENR pins is regulated to the voltage control by CC section. The charge current equals to the voltage between the ISENL and ISENR pins (VICHRG) divided by RSENSE : ICHRG = VICHRG RSENSE For example, for a 68mΩ sense resistor, the charge current can be set from 660mA (CC2, CC1, CC0 = “000”) to 1500mA (CC2, CC1, CC0 = “111”). Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 22 Constant Voltage Mode and Settings The RT9450A enters constant voltage mode when the BATS voltage is close to the output-charge voltage (VOREG). Once in this mode, the charge current begins to decrease. For default settings (charge current termination is disabled), the RT9450A does not turn off and always regulates the battery voltage at VOREG. However, once the charge current termination is enabled, the charger terminates if the charge current is below termination current (IEOC) in constant-voltage mode. The charge current termination function is controlled by the I2C interface in the “TE” bit via the register of address 0x01. After termination, a new charge cycle restarts when one of the following conditions is detected : ` The BATS pin voltage falls below the VOREG − VRECH threshold. ` VIN Power On Reset (POR). ` CEB bit toggle or RST bit is set (via I2C interface). is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Output Charge Voltage (VOREG) The output-charge voltage is set by the I2C interface in the CV section (CV5 to CV0 bits) via the register of address 0x02. Its range is from 3.5V to 4.45V. The default is 4.2V (100011). Termination Current (IEOC) If the charger current termination is enabled (TE bit = “1”), the end-of-charge current is determined by both the termination current sense voltage (VIEOC) and sense resistor (RSENSE). VIEOC is set by the I2C interface in the EOC section via the register of address 0x04. Its range is from 3.36mV to 26.88mV with an offset of 3.36mV and step of 3.4mV. The end-of-charge current is calculated as below : VIEOC IEOC = RSENSE using I2C control to write “1” to “TMR_RST/OTG” bit in the register of address 0x00. The process repeats until the battery is fully charged. This prevents situations where the battery is being charged without any monitoring, such as when the host experiences unexpected dead-lock or shuts down. After 32 seconds, the RT9450A is forced to T32min mode and charging parameters are reset to default values. If the 32-minute timer expires, the RT9450A turns off the charger and enunciates FAULT in the charger status register of address 0x05. Fault condition is cleared by POR and fault status bits can only be updated after the status bits are read out by the host. Input Voltage Protection in Charge Mode During charge mode, there are two protection mechanisms against poor input power source. Sleep Mode (VIN − VBATS < VSLP) Safety Timer in Charge Mode To implement safety mechanism, the RT9450A has two timer modes : T32min mode with a 32-minute timer and T32sec mode with a 32-second timer. At any moment, only one timer is valid. In T32min mode, the RT9450A operates only with default parameters. In T32sec mode, the RT9450A can operate with user settings. At the beginning of a charging operation, the RT9450A enters T32min mode and starts a 32-minute timer that can be stopped by any write action performed by the host through the I2C interface. Once the 32-minute timer is stopped, the RT9450A enters T32sec mode and a 32second timer is automatically started. The 32-second timer can be reset by the host via the I2C interface. Writing “1” to the bit of “TMR_RST/OTG” in the register of address 0x00 resets the 32-second timer and then the bit is automatically set to “0” after the 32-second timer is reset. If the 32-second timer expires, the charging operation is terminated and charge parameters are reset to default values. Then, the 32-minute timer starts again and the charge operation resumes with default parameters. During normal charging process, the RT9450A is normally in T32sec mode with host monitoring and in T32min mode without host monitoring. The host monitors the RT9450A Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 The RT9450A enters sleep mode if the voltage drop between the VIN and BATS pins falls below VSLP. In sleep mode, the reverse blocking switch and PWM are all turned off. This function prevents battery drain during poor or no input power source. Input Over Voltage Protection When VIN voltage rises above the input over voltage threshold (VOVP_IN), the RT9450A stops charging and then sets fault status bits and sends out fault pulse via the STAT pin. The condition is released when VIN falls below VOVP_IN − ΔVOVP_IN. The RT9450A then resumes charging operation. Boost Mode Operation (OTG) Trigger and Operation The RT9450A features USB OTG support. When OTG function is enabled, the synchronous boost control loop takes over the power MOSFETs and reverses the power flow from the battery to the VIN pin. In normal boost mode, the MID pin is regulated to 5.05V (typ.) and provides up to 200mA current to support other USB OTG devices connected to the USB connector. is a registered trademark of Richtek Technology Corporation. www.richtek.com 23 RT9450A Safety Timer in Boost Mode Initially, the RT9450A starts a 32-second timer that can be reset by host through the I2C interface. Writing “1” to “TMR_RST/OTG” bit in the register of address 0x00 resets the 32-second timer and then the bit is automatically set to “0” after the 32-second timer is reset. To remain in boost mode, the host must reset the 32-second timer repeatedly. Once the 32-second timer expires, the RT9450A turns off the boost converter, enunciates the fault pulse in the STAT pin and sets fault status bits in status register of address 0x06.Fault condition can only be released by POR or host control. Output Over Voltage Protection In boost mode, the output over voltage protection is triggered when the VIN voltage is above the output OVP threshold (6V typ.). When OVP occurs and the boost mode is triggered by the OTG pin, the RT9450A goes back to Boost Configure 1 state. When VIN returns to normal operating range, the condition is released and the boost resumes switching. However, if the boost mode is triggered by OPA bit, the RT9450A resets the OPA bit and goes back to Charge Configure state with default charge parameters. Control Bits CEB Bit (Charge Mode) The CEB bit in control register of address 0x01 is used to disable or enable the charge process. A value of “0” enables the charge, while a value of “1” disables the charge. RST Bit The RST bit in control register of address 0x04 is used to reset the RT9450A back to its default value at power-up, regardless of its charging or boosting process. HZ (High Impedance Mode) Bit When the HZ bit is set to “1” and the OTG pin is not in active status, the RT9450A operates in high impedance mode. The condition is released by POR or setting the HZ bit to “0”. OPA Bit The OPA bit is the operation mode control bit, which is dependent on the status of HZ. OPA bit HZ bit 0 0 1 0 X 1 Output Overload Protection The RT9450A provides an overload protection to prevent the device and battery from damage when VIN is overload. Once overload condition is detected, the reverse blocking switch operates in linear region to limit the output current while the MID voltage remains in voltage regulation. If the overload condition lasts for more than 32ms, the RT9450A will recognise the overload fault condition and resets registers to the default settings. Status Output (STAT pin) The STAT pin is used to indicate operating conditions of the RT9450A and is enabled by writing “1” to the EN_STAT bit in the register of address 0x00. When charging is in progress, the STAT pin is pulled low. In other conditions, the STAT pin acts as a high impedance output. Under fault conditions, regardless of whether in charge or boost mode, a 128μs pulse is sent out to notify the host. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 24 Operation Charge mode (no fault) Charge configure (fault, VIN > V UVLO) High impedance mode (VIN < VUVLO ) Boost mode (no fault) Go to charge configure when any fault High impedance mode Battery Protection Battery Over Voltage Protection in Charge Mode The RT9450A monitors the BATS voltage for output over voltage protection. In charge mode, if the BATS voltage rises above VOVP_BAT x VOREG, such as when the battery is suddenly removed, the RT9450A stops charging and then sets fault status bits and sends out fault pulse at the STAT pin. The condition is released when the BATS voltage falls below (VOVP_BAT − ΔVOVP_BAT) x VOVP_BAT. The RT9450A then resumes charging process with default settings and the fault is cleared. is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A Battery Over Voltage Protection in Boost Mode Production Test Mode In boost mode, if the BATS voltage rises above the BATS maximum input voltage (4.75V typ.) or below BATS minimum input voltage (2.5V typ.), battery over voltage protection is triggered. When OVP occurs and the boost mode is triggered by the OTG pin, the RT9450A goes back to Boost Configure 1 state. When the BATS voltage returns to normal operating range, the boost resumes switching. However, if the boost mode is triggered by the OPA bit, the RT9450A resets the OPA bit and goes back to Charge Configure state with default charge parameters. The RT9450A provides Production Test Mode (PTM) to supply a maximum 2.3A for powering external loads with no battery installed where BATS is regulated to 4.2V. The PTM allows the user to supply system power with no battery installed. In PTM, thermal regulation is disabled with activated thermal protection. When current flows greater than 1.5A in PTM, the user must limit the duty cycle of the maximum load current to 20% with a maximum period of 10ms. Battery Detection During Normal Charging The RT9450A provides a battery absent detection scheme to detect insertion or removal of the battery pack. The battery detection scheme is valid only when the charge current termination is enabled (TE bit = “1”). During normal charging process, once the charge done condition is satisfied (V BATS > V OREG − V RECH and termination current is detected), the RT9450A turns off the PWM converter and initiates a discharge current (detection current) for a detection time period. After that, the RT9450A checks the BATS voltage. If it is still above the recharge threshold, the battery is present and charge done is detected. If the BATS voltage is below the recharge threshold, the battery is absent. Thus, the RT9450A stops charging and the charge parameters are reset to the default values. The charge resumes after a period of tDET (2sec. typ.). Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 The PTM can be enabled by pulling the PTM pin high and setting PTM_EN bit. I2C Setting Example The example below demonstrates the charge parameter setting of the RT9450A through the I2C interface. The component values follow that shown in typical application circuit. Charge Mode RSENSE = 56mΩ VIN DPM = 4.75V Average Input Current Regulation, AICR = 1A Battery regulation voltage, VOREG = 4.2V Charge Current, ICHRG = 1.5A Termination Charge Current, IEOC = 120mA is a registered trademark of Richtek Technology Corporation. www.richtek.com 25 RT9450A VIN DPM and AICR Slave address Start 1 0 0 0 1 0 1 0 AICR VIN DPM 1A 4.75V Data address 0x01 W 0 0 0 0 0 0 0 1 1 0 1 0 1 0 0 0 Stop Enable Termination Current VOREG Slave address Start 1 0 0 0 1 0 1 0 VOREG 4.2V Data address 0x02 W 0 0 0 0 0 0 1 0 1 0 0 0 1 1 1 0 Stop ICHRG, IEOC Slave address Start W 1 0 0 0 1 0 1 0 ICHRG 1.5A Data address 0x04 0 0 0 0 0 1 0 0 IEOC 120mA 0 1 1 1 0 0 0 1 Stop High Impedance Mode Slave address Start Data address 0x01 W 1 0 0 0 1 0 1 0 HZ 0 0 0 0 0 0 0 1 X X X X X X 1 X Stop Boost Mode There are two methods to trigger boost mode. I2C - Triggered Boost Mode Slave address Start 1 0 0 0 1 0 Data address 0x01 W 1 0 0 0 0 0 0 0 0 HZ OPA 1 X X X X X X 0 1 Stop OTG Pin - Triggered Boost Mode (Pull High or Pull Low) Pull Low Slave address Start W 1 0 0 0 1 0 1 0 OTG_EN Data address 0x02 0 0 0 0 0 0 1 0 X X X X X X 1 1 Stop OTG_PL Pull High Slave address Start W 1 0 0 0 1 0 1 0 OTG_EN Data address 0x02 0 0 0 0 0 0 1 0 X X X X X X 0 1 Stop OTG_PL Keep Monitoring RT9450A Slave address Start W 1 0 0 0 1 0 1 0 Data address 0x00 0 0 0 0 0 0 0 0 TMR_RST/OTG 1 1 0 0 0 0 0 0 Stop < 32sec. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 26 is a registered trademark of Richtek Technology Corporation. DS9450A-00 July 2013 RT9450A 3.0 Four-Layer PCB Maximum Power Dissipation (W)1 Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. 2.5 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 3. Derating Curve of Maximum Power Dissipation For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For WL-CSP-20B 2x2 (BSC) package, the thermal resistance, θJA, is 41°C/W on a standard JEDEC 51-7 four-layer Layout Considerations ` Place the input and output capacitors as close to the input and output pins as possible. thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : ` Keep the main power traces as wide and short as possible. P D(MAX) = (125°C − 25°C) / (41°C/W) = 2.44W for WL-CSP-20B 2x2 (BSC) package ` The output inductor and bootstrap capacitor should be placed close to the chip and LX pins. The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. ` The battery voltage sensing point should be placed after the output capacitor. ` To optimize current sense accuracy, connect the traces to RSENSE with Kelvin sense connection. BOOT Place the input and output capacitors as close to the input and output pins as possible. A2 A3 A4 VIN BOOT SCL B1 B2 B3 B4 MID MID PTM SDA C1 C2 C3 C4 LX LX LX STAT D1 D2 D3 D4 PGND PGND PGND OTG PGND The output inductor and bootstrap capacitor should be placed close to the chip and LX pins A1 VIN E1 E2 ISENL BATS E3 E4 VDD ISENR The battery voltage sensing point should PGND be placed after the output capacitor To Battery Keep the main power traces as wide and short as possible. RSENSE To optimize current sense accuracy, connect the traces to RSENSE with Kelvin sense connection. Figure 4. PCB Layout Guide Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9450A-00 July 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 27 RT9450A Outline Dimension Symbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A 0.500 0.600 0.020 0.024 A1 0.170 0.230 0.007 0.009 b 0.240 0.300 0.009 0.012 D 1.950 2.050 0.077 0.081 D1 E 1.600 1.950 0.063 2.050 0.077 0.081 E1 1.200 0.047 e 0.400 0.016 20B WL-CSP 2x2 Package (BSC) Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 28 DS9450A-00 July 2013