® R7711A Primary Feedback CC/CV PWM Controller for Flyback Converters General Description Features The R7711A is a current mode PWM controller which includes primary side voltage feedback technology. It controls the output voltage and current accurately without shunt regulator and opto-coupler on secondary side to reduce the part count and save costs. The R7711A is designed especially for low power applications, such as chargers for cell phones, PDAs, and other mobile products. Complete protections are provided, such as output Under- Voltage Protection, output Over-Voltage Protection, VDD Over-Voltage Protection, Over-Temperature Protection, and Secondary Rectifier Short-circuit Protection. The ultra low start-up current and operating current of the R7711A achieves low power consumption in standby mode. The R7711A supports burst switching green mode operation to meet CEC regulations and Energy-Star requirements. Programmable Primary-Side CC/CV Regulation Low No Load Input Power (<30mW at 230VAC) Burst Switching Green Mode PWM Operation Low Start-up Current (<10mA) Easy EMI Solution Built-in Jittering Frequency Built-in Soft Gate Driver Programmable Cable Drop Compensation Adjustable Propagation Delay Compensation VDD Over-Voltage Protection (VDDOVP) Output Over-Voltage Protection (OVP) Output Under-Voltage Protection (UVP) Secondary Rectifier Short-Circuit Protection (SRSP) Internal Over-Temperature Protection (OTP) RoHS Compliant and Halogen Free Applications Switching AC/DC Adaptor and Battery Charger DVD Open Frame Power Supply STB Power Cell Phone Charger Networking Power Supply Simplified Application Circuit VOUT L AC Mains (90V to 265V) N DMAG VDD R7711A COMP GATE CS GND 2 Copyright © 2014 Richtek Technology Corporation. All rights reserved. R7711A-06 May 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 R7711A Ordering Information Pin Configurations (TOP VIEW) R7711A Package Type E : SOT-23-6 CS COMP DMAG 6 Lead Plating System G : Green (Halogen Free and Pb Free) 5 4 2 3 Note : GATE GND VDD Richtek products are : RoHS compliant and compatible with the current require- SOT-23-6 ments of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. Marking Information FN= : Product Code FN=DNN DNN : Date Code Functional Pin Description Pin No. Pin Name Pin Function 1 GATE MOSFET Gate Driver Output. Connect this pin to the Gate of an external N-Channel power MOSFET. 2 GND Ground of the Controller. 3 VDD Power Supply Input. The controller will be enabled when VDD exceeds VTH_ON and disabled when VDD decreases lower than VTH_OFF. 4 DMAG Demagnetization Pin. Input and Output Voltage Detection from Auxiliary Winding. The current (ICABLE) flows into this pin to achieve cable drop compensation function. This pin is also used to detect the signal of the rectified input voltage for propagation delay compensation and minimum on-time control. 5 COMP Feedback Compensation Pin. This pin is the output of the internal operational transconductance amplifier (OTA) to connect a proper RC network from this pin to GND for feedback loop compensation. 6 CS Current Sensing Input. Connect this pin to a current sense resistor used to detect the current of the primary-side winding. Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. R7711A-06 May 2014 R7711A-06 May 2014 Copyright © 2014 Richtek Technology Corporation. All rights reserved. DMAG Clamp Circuit VCOMP VOUT UVP DMAX Detect SRSP GND VREF 2.5V VSH_DMAG S/H ICLAMP TOFF gm + OTA CC Control Oscilltor Timer VOUT OVP OTP COMP Disable LEB X3 Shutdown Logic CS + - + - Bias & Bandgap Minimum Ton UVLO POR VTH_VDDOV R S QN Q ICLAMP Soft Driver VTH_ON / VTH_OFF - + - + VDD GATE R7711A Function Block Diagram is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 R7711A Operation VDRAIN General Description The R7711A is a peak current-mode PWM controller designed for off-line flyback converter in DCM (Discontinuous Conduction Mode) operation. It can achieve accurate CV (Constant-Voltage) or CC (Constant-Current) output without voltage and current sensing circuits on the secondary side, as shown the Figure 1. When the output voltage is below the under-voltage threshold (VOUT_MIN), VIN + (VOUT + VDO) × VIN 0V TON VGATE (VOUT + VDO) × VAUX 0V NA NS VIN× the R7711A works in hiccup mode. NA NP VDMAG VOUT at end of output cable 0V IDSPK VOUT_SET NP NS IDS Knee Point VREF TS TON_D IDO PK CV operation CC operation Hiccup operation Upper Limit Lower Limit I IDOOUT t0 t1 t2 t3 t4 t5 t6 t7 t0 ~ t1 (TON) : Q1 is turned on. t1 ~ t2 (TON_D) : DO is turned on. t2 : Knee point t3 ~ t4, t5 ~ t7 : The DMAG voltage is clamped near 0V. t0 ~ t6 (TS) : Switcing period of the converter VOUT_MIN Figure 3. Operating Waveforms IOUT_CC IOUT Figure 1. Output Voltage vs. Output Current Constant-Voltage Operation TX1 VSEC DO IDO VIN NP NS + VDO - VOUT VAUX VDD VDMAG RDMAG1 R7711A VGATE GATE CS RDMAG1 NA NS RDMAG1 RDMAG2 (at the Knee point) VF : the forward voltage of the DO with IDO near 0A VSH_DMAG (VOUT VF ) RDMAG2 DMAG The Figure 2 shows the simplified primary-side-regulation circuit. The output voltage signal is indirectly detected via the transformer (TX1) and the resistor-divider (RDMAG1 and RDMAG2). A “Knee point” detection and voltage sampleand-hold circuits are required for sensing the feedback voltage. The sample-and-hold voltage (VSH_DMAG) of the VDMAG is shown in the following equation : RPDC VCS + VPDC - NA IDS VDRAIN Q1 VRCS RCS Figure 2. Simplified Circuit and Symbol Definition Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. R7711A-06 May 2014 R7711A Programmable Cable Drop Compensation Leading Edge Blanking (LEB) for VCS The R7711A features a cable drop compensation to adaptively compensate the output voltage drop effect due to the output cable impedance. As shown in the figure 4, The ICABLE, proportional to the converter output current, creates an additional voltage offset (ΔVRDMAG2) into the DMAG pin to achieve the cable compensation. The ICABLE is calculated by using the following equation : Due to the device's parasitic capacitors, an initial current spike appears at the rising edge of the GATE voltage (VGATE). The spike of the CS voltage may incorrectly trigger the peak current comparator, to turn off the power MOSFET, resulting in running failure of the flyback converter. Thus, the LEB, used to mask the initial voltage spike on the CS pin, is a necessary design for successful PWM operation. ICABLE = 8μA/V x VCOMP −11.2μA (ICABLE ≥ 0) VDD Under-Voltage Lockout (UVLO) Protection DO IDO VOPCB TX1 VIN NP + VDO - NS RCABLE VOUT VAUX R7711A ICABLE + VDMAG2 DMAG NA RDMAG2 VDMAG Cable Comp. RDMAG1 CDMAG The R7711A automatically initializes upon receipt of the supply voltage (VDD) on the VDD pin. The UVLO function continually monitors the VDD. When the VDD exceeds its rising UVLO threshold (VTH_ON = 14.5V typ.), the IC is enabled. When the VDD falls below the falling UVLO voltage threshold (VTH_OFF = 8.5V typ.), the GATE voltage is pulled low to shut off the converter. The supply voltage (VDD) must be below the absolute maximum rating for safety. VDD Over-Voltage Protection (VDD OVP) VCOMP Figure 4. DMAG Current for Cable Compensation Burst Switching Green Mode To further reduce the switching losses in no load or very light load condition, a burst switching green mode control reduces the average switching frequency when the VCOMP drops. A green-mode voltage threshold (VTH_Green = 1.1V typ.) switches the operating frequency in either fBS_MIN (1kHz typ.) or fGreen (250Hz typ.). The green mode operation meets the CEC regulations and Energy-Star requests. Min. On-Time To improve green power at light load or no load conditions, the R7711A works with a minimum on-time (TON_MIN) and the output voltage is regulated by the modulated switching frequency. The TON_MIN, shown as the following equation, is a function of the ICLAMP : Output Over-Voltage Protection (OVP) The R7711A provides accurate output OVP. Once the feedback voltage (VSH_DMAG), sampled on the DMAG pin, is over 125% (typ.) of the reference voltage (VREF = 2.5V typ.), the R7711A issues an output OVP signal to turn off the controller and prevent the loading device and converter from being damaged. Therefore, the OVP threshold on the output is about 125% of the CV output voltage at the end of the PCB. The R7711A works in hiccup mode until the fault is removed. NA RDMAG2 NP TON_MIN 0.7A ns ICLAMP ICLAMP VIN When the VDD exceeds the VDD over-voltage threshold (VTH_VDDOV = 27V typ.) in abnormal conditions, the GATE voltage is pulled low to shut off the converter and the R7711A works in hiccup mode until the fault is removed. This avoids permanent damage of the converter components . The VDD over-voltage may be caused by an incorrectly sensed feedback signal on the DMAG pin or an output over-voltage condition. Copyright © 2014 Richtek Technology Corporation. All rights reserved. R7711A-06 May 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 R7711A Output Under-Voltage Protection (UVP) The output UVP is designed to protect the converter from the output short-circuit conditions. Once the feedback voltage (VSH_DMAG), sampled on the DMAG pin, is below the voltage threshold (VTH_UVP = 1.2V typ.), a built-in 11bit digital timer performs a UVP debounce time (2048 switching cycles = about 30ms) before issuing the UVP signal. The UVP signal turns off the converter to prevent the loading device and converter from being damaged. The R7711A works in hiccup mode until the fault is removed. Over-Temperature Protection (OTP) The built-in OTP function continuously monitors the junction temperature (TJ) of the IC itself. Once the TJ exceeds the over-temperature level (TOTP = 150°C typ.), the OTP signal turns off the converter and prevents the IC itself from suffering thermal stress and permanent damage. It's not suggested to use the function as a precise OTP. The R7711A works in hiccup mode until the fault is removed. Secondary Rectifier Short-circuit Protection (SRSP) The R7711A is equipped with an extra over-current protection (OCP) against secondary rectifier short-circuit conditions in flyback converter. When the secondary rectifier is damaged by short-circuit, the transformer operates in saturation area and huge current stress occurs on the main switch. When the VCS reaches the OCP voltage threshold (VTH_OCP = 1.7V typ.), the R7711A shuts down the converter after the debounce time of a few cycles. The R7711A works in hiccup mode until the fault is removed. Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. R7711A-06 May 2014 R7711A Absolute Maximum Ratings (Note 1) VDD to GND ----------------------------------------------------------------------------------------------------------------GATE to GND -------------------------------------------------------------------------------------------------------------DMAG, COMP, CS to GND --------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOT-23-6 -------------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOT-23-6, θJA --------------------------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ---------------------------------------------------------------------------------------------MM (Machine Model) ----------------------------------------------------------------------------------------------------- Recommended Operating Conditions −0.3V to 28V −0.3V to 16V −0.3V to 6.5V 0.38W 260.7°C/W 150°C 260°C −65°C to 150°C 3kV 250V (Note 4) VDD Supply Voltage, VDD ------------------------------------------------------------------------------------------------ 11V to 24V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VDD = 15V, TA = 25°C, unless otherwise specified) Parameter VDD Section VDD Over-Voltage Protection Threshold Symbol VTH_VDDOV Test Conditions VDD Rising Min Typ Max Unit 26 27 28 V UVLO-On Threshold Voltage VTH_ON 13.5 14.5 15.5 V UVLO-Off Threshold Voltage VTH_OFF 7.5 8.5 9.5 V VDD Start-up Current IDD_ST Rising VDD < VTH_ON - 0.1V -- -- 10 A VDD Operating Current IDD_OP GATE and COMP pin open 0.3 0.5 0.7 mA f PWM VCOMP > VBS_ET 60 65 70 kHz VDD = 11V to 24V -- -- 2 % TA = 25°C to 85°C (Note 5) -- -- 6 % -- ±6 -- % Oscillator PWM Frequency Frequency (f PWM) Variation Versus f DV VDD Voltage Deviation Frequency (f PWM) Variation Versus f DT Junction Temperature Deviation Jitter Frequency Range f Jitter Frequency Period TJITTER VCOMP > VBS_ET -- 4 -- ms Minimum Burst Switching Mode Frequency f BS_MIN VTH_Green < VCOMP < VBS_ED -- 1 -- kHz Green Mode Frequency fGreen VCOMP < VTH_Green -- 250 -- Hz Copyright © 2014 Richtek Technology Corporation. All rights reserved. R7711A-06 May 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 R7711A Parameter Symbol GATE Maximum Duty Cycle DMAX GATE Minimum On-Time TON_MIN Test Conditions Min Typ Max Unit 72 77 82 % ICLAMP = 1mA -- 700 -- ns ICLAMP = 250μA -- 2800 -- ns COMP Input Section Burst Switching Entry Voltage VBS_ET -- 3.2 -- V Burst Switching Ending Voltage VBS_ED -- 1.5 -- V Green Mode Threshold VTH_Green -- 1.1 -- V Maximum COMP Open Voltage VCOMP_OP -- 4.5 -- V 4.37 4.700 5.03 s x V -- 1.7 -- V Current Sense Section Reference for Constant Current Control Mode KCC CS Over-Current Protection Threshold VTH_OCP CS Leading Edge Blanking Time TLEB (Note 5) 300 375 450 ns CS-to-GATE Propagation Delay Time TPD (Note 5) -- 100 -- ns KI = ICS / ICLAMP at GATE turn-on -- 0.02 -- A/A 2.45 2.5 2.55 V -- 50 -- A/V -- 20 -- A 1500 -- -- A Current Ratio of CS Sourcing KI Current to DMAG Sourcing Current Voltage Feedback Compensation Section Reference Voltage for CV Regulation VREF Gain of Operational gm Transconductance Amplifier (OTA) (Note 5) Input Voltage Difference = 50mV Maximum COMP Sourcing/Sinking Igm_MAX Current Maximum Clamp Current of DMAG ICLAMP_MAX Gate Driver Section Rising Time of GATE Output Voltage TR CL = 1nF -- 150 -- ns Falling Time of GATE Output Voltage TF CL = 1nF -- 85 -- ns GATE Output Clamping Voltage VCLAMP VDD = 20V, CL = 1nF -- 12 -- V Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. R7711A-06 May 2014 R7711A Parameter Symbol Test Conditions Min Typ Max Unit 3 3.125 3.25 V -- 1.2 -- V Protection Section Output Over-Voltage Protection Threshold Output Under-Voltage Protection Threshold Output Under-Voltage Debounce Time Maximum Duty Protection Debounce Time Over-Temperature Protection Threshold Over-Temperature Protection Threshold Hysteresis VTH_OVP VTH_UVP Sampled on the DMAG pin at the Knee point Sampled on the DMAG pin at the Knee point TUVP_DE Count of clock cycles -- 2048 -- CLKs TDMAX_DE Duty = DMAX, Count of clock cycles -- 2048 -- CLKs TOTP -- 150 -- °C TOTP_HYS -- 30 -- °C Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a low effective thermal conductivity single-layer test board per JEDEC 51-3. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. fDT, leading edge blanking time, internal propagation delay time and VREF are guaranteed by design. Copyright © 2014 Richtek Technology Corporation. All rights reserved. R7711A-06 May 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 R7711A Typical Application Circuit R3 L F1 BD L1 VOPCB RS1 AC Mains (90V to 265V) CBULK1 N 3 DMAG VDD COMP GATE C3 CS 6 Copyright © 2014 Richtek Technology Corporation. All rights reserved. D1 RDMAG2 RCABLE DO CO VOUT RDUMMY NA RDAMG1 1 GND 2 NP NS RAUX 4 R7711A 5 www.richtek.com 10 R1 R2 CDMAG CVDD CCOMP C1 CBULK2 RS2 DAUX RCOMP C2 RG RPDC Q1 RCS is a registered trademark of Richtek Technology Corporation. R7711A-06 May 2014 R7711A Typical Operating Characteristics 28.0 VDD Operating Current vs. Junction Temperature VDD Operating Current, IDD_OP (µA) VDD OVP Threshold, VTH_VDDOV (V) VDD OVP Threshold vs. Junction Temperature 27.5 27.0 26.5 26.0 25.5 25.0 -50 -25 0 25 50 75 100 800 700 600 500 400 300 200 100 GATE = COMP = Open 0 -50 125 -25 Junction Temperature (°C) 14 13 12 11 10 25 50 75 100 125 Junction Temperature (°C) VDD Start-up Current vs. Junction Temperature VDD Start-up Current, IDD_ST (µA) 10 8 6 4 2 VDD = VTH_ON − 0.1V 0 -50 -25 0 25 50 75 100 Junction Temperature (°C) Copyright © 2014 Richtek Technology Corporation. All rights reserved. R7711A-06 May 2014 125 UVLO-Off Threshold Voltage, V TH_OFF (V) 15 0 50 75 100 125 UVLO-Off Threshold Voltage vs. Junction Temperature 10.0 9.5 9.0 8.5 8.0 7.5 7.0 -50 -25 0 25 50 75 100 125 Junction Temperature (°C) PWM JunctionTemperature Temperature PWMFrequency Frequency vs. Junction PWM Oscillator Frequency, fPWM (kHz). UVLO-On Threshold Voltage, VTH_ON (V) 16 -25 25 Junction Temperature (°C) UVLO-On Threshold Voltage vs. Junction Temperature -50 0 80 75 70 65 60 55 50 -50 -25 0 25 50 75 100 125 Junction Temperature (°C) is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 R7711A Oscillator Frequency vs. COMP Voltage Oscillator Frequency (kHz). 80 40° C 70 −40°C 60 120°C 50 40 30 20 10 0 0 1 2 3 4 5 6 COMP Voltage (V) Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. R7711A-06 May 2014 R7711A Application Information General Description Start-up Resistance The R7711A is a peak current-mode PWM controller designed for off-line flyback converter and can achieve accurate CV or CC regulation, as shown in Figure 5. VOUT at end of output cable VIN BD + VAC CBULK RST - VOUT_SET ICVDD CVDD Initial VDD = 0V CV operation CC operation Hiccup operation Upper Limit Lower Limit DAUX IRST VDD VDD IDD_ST Figure 6. Start-up Circuit The Figure 6 shows the start-up circuit of the R7711A converter at the initial state of power-on condition. The total start-up resistance (RST) can be calculated by using the following equation : VOUT_MIN IOUT_CC IOUT Figure 5. Output Voltage vs. Output Current The Figure 5 shows a typical curve of “output voltage vs. output current” of the charger using the R7711A. If the output current is less than the CC regulated level (IOUT_CC), the CV regulation loop takes control of the converter and regulates the output voltage at the preset voltage level (V OUT_SET ). In the CV operation, a cable drop compensation adaptively compensates the voltage drop of the output cable and burst switching green mode, improves the efficiency of power converter over the no load to full load range. In CC operation, the converter works like a current source by regulating the output current at the preset current level (I OUT_CC ). In CC operation, a programmable propagation delay compensation reduces the CC variation, which is caused by feedback-loop propagation delay, over the full AC input voltage range. 2 VAC_MIN -VTH_ON CVDD VTH_ON IDD_ST TST VAC_MIN : minimum AC input voltage (90Vrms in general) RST VTH_ON : VDD on threshold voltage (15V max.) CVDD : VDD capacitance TST : start-up time of the converter ( 3s in general) IDD_ST : VDD start-up current at the VDD VTH_ON -0.1V Calculation of the Current-Sensing Resistance Refer to the Figure 2 and Figure 3. The current-sensing resistance (RCS) can be calculated by using the following equation : K f N RCS 1 P CC PWM 2 NS IOUT_CC(SET) IOUT_CC(SET) : preset output current in CC operation K CC : regulated parameter in CC operation fPWM : average switching frequency of the converter NP : turns of the primary winding NS : turns of the secondary winding Once the output voltage is below the under-voltage threshold (VOUT_MIN), the R7711A shuts off the output protect the load and converter. After the output is shut down for a while, the R7711A attempts to regulate the output again without fault latching, resulting in hiccup operation. Copyright © 2014 Richtek Technology Corporation. All rights reserved. R7711A-06 May 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 R7711A Magnetizing Inductance The range of the primary-side magnetizing inductance (Lm) is mainly determined by two operating conditions. The first condition, “the calculated CS voltage threshold (VTH_CC) in CC operation is not allowed to exceed the maximum CS voltage threshold (1.1V typ.)”. Thus, the minimum primary-side magnetizing inductance (Lm_MIN) can be calculated by using the following equation : 2 As shown in Figure 7, the “typical” value (Lm) of the selected magnetizing inductance must be greater/less than the Lm_MIN /Lm_MAX. The operating margins have been taken into consideration and the recommended tolerance of the Lm is less than ±10%. Selecting a Lm which is close to the Lm_MIN is recommended. Leakage Inductance and Snubber Optimization 2 N K CC fPWM (VOPCB_CC(MAX) VDO ) Lm_MIN P 2 IOUT_CC(SET) (0.85V)2 NS VOPCB_CC(MAX) : Max. converter output voltage on the An acceptable overshoot PCB in CC operation (CV-to-CC corner) VDO : forward voltage of the output diode(DO ) second condition prevents the converter from entering into CCM (Continuous Conduction Mode) operation. The worst condition happens in CC operation with the minimum output voltage (VOPCB_CC(MIN)) and the minimum DC input voltage (V IN_MIN). Thus, the maximum primary-side inductance (Lm_MAX) is calculated by using the following equation : The ringing voltage will cause worse output voltage regulation Lm_MAX 2 NP 2 (VOPCB_CC(MIN) VDO ) VIN_MIN 0.85 NS 2 N 2 IOUT_CC(SET) VIN_MIN P (VOPCB_CC(MIN) VDO ) fPWM N S VOPCB_CC(MIN) : Min. converter output voltage on the PCB in CC operation; 2.5V is recommended. VDO : forward voltage of the output diode(DO ) 2 Primary-Side-Magnetizing Inductance,Lm (mH) 1.9 1.8 1.7 Figure 8. The ringing voltage on DMAG pin As shown in the Figure 8, when the MOSFET turns off, the leakage inductance and its current will induce the ringing voltage on DMAG pin. Due to the ringing voltage, the controller gets the wrong “knee point” detection and the output regulation is worse. Optimizing the leakage inductance and snubber design would reduce the ringing voltage and obtain the well output regulation. 1.6 1.5 1.4 1.3 1.2 1.1 1 1 1.4 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 5.8 Output Voltage in CC Operation VOPCB_CC (V) Figure 7. Curves of Lm_MIN and Lm_MAX vs. VOPCB_CC Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 is a registered trademark of Richtek Technology Corporation. R7711A-06 May 2014 R7711A Propagation Delay Compensation VIN1 VIN2 VCSPK2 VCSPK1 VTH_CC VIN (VIN1<VIN2) TON1 TON2 NP RDMAG2 tD DMAG VRCSPK VDMAG RDMAG1 R7711A t01 t02 t1 t2 t0 ~ t2 : Q1 is turned on. t1 : the VCS reaches the VTH_CS t1 ~ t2 : total propagation delay t2 : Q1 is off CS DMAG pin Resistance NA IDS TX1 VIN NP VDRAIN RPDC VCS + VPDC - VRCS RCS Figure 9. Illustration of Propagation Delay Compensation As shown in Figure 9, the total propagation delay time (tD) of the CV/CC control loop includes the CS-to-GATE propagation delay (TPD) and the Q1 turn-off delay, which operates from the beginning of the falling GATE voltage to the time point when the VDRAIN is equal to the VIN. The tD increases the on-time (TON) of the power MOSFET (Q1) and the peak current (IDSPK) of the primary winding. Thus, the propagation delay effect increases the CC variation. The increment (ΔIDSPK) of the IDSPK can be calculated by using the following equation : VCSPK -VTH_CC V IDSPK IN tD Lm RCS VIN : input DC voltage of the converter Lm : primary-side magnetizing inductance VCSPK : peak voltage of the CS voltage VTH_CC : CS voltage threshold in CC operation If the voltage offset (VPDC) between the resistor (RPDC) is equal to the (VCSPK-VTH_CC), the propagation delay effect is well compensated. It means the VRCSPK is equal to the VTH_CC. Thus, the RPDC can be calculated by using the following equation : R N R t RPDC DMAG2 P CS D KI NA Lm KI : current ratio of ICS to ICLAMP ICLAMP : sourcing current of the voltage clamping circuit ICS : sourcing current of the CS pin current during the on-state of the m ain switch (Q1) RCS : current-sensing resistance Copyright © 2014 Richtek Technology Corporation. All rights reserved. R7711A-06 May 2014 In general, the tD is close to a fixed value in a converter. Therefore, the propagation delay effect can be compensated by using the RPDC over full range of the VIN. DO IDO VOPCB +V NS DO RCABLE VOUT VAUX Q1 GATE VRCS(t) NS VAUX VPDC2 VPDC1 VCS(t) TX1 R7711A ICABLE + VDMAG2 DMAG NA RDMAG2 VDMAG Cable Comp. CDMAG RDMAG1 VCOMP Figure 10. Block Diagram of the Cable Drop Comp When the GATE pin turns on the power MOSFET, the DMAG pin adaptively sources current to clamp the DMAG voltage near 0V. Meanwhile, the current flowing through the resistor RDMAG2 is proportional to the input voltage and used for the minimum on-time (TON_MIN) control. Therefore, the TON_MIN is adaptively modulated by the input voltage and can be programmed by the RDMAG2. When the GATE pin turns off the power MOSFET, the DMAG pin sinks the current, which is modulated by the COMP voltage and flows through the RDMAG2, to increase the voltage offset (ΔVDAMG2) for cable compensation, as shown in Figure 10. So, the RDAMG2 is concerned with the TON_MIN and cable compensation. It can be calculated by using the following equations : N RDMAG2 250 103 A NP RDMAG2 : the high-side resistance of the resistor-divider Second, the low-side feedback resistance (RDMAG1) can be calculated by using the following equation : RDMAG2 VOUT_SET V F NA -1 VREF NS VF : the forward voltage of the DO with IDO near 0A RDMAG1 is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 R7711A DMAG Decoupling Capacitor Feedback Compensation Ringing voltage TX1 vOUT DO NS CO VREF NA VIN NP Q1 VDMAG1 VDMAG2 RCS TON TBLANK TON_DO Figure 11. Comparison of the DMAG Voltage Waveforms Figure 11 shows the DMAG voltage waveforms of the converter operating with no output current. In this condition, all of the time intervals, including the TON, TON_DO and TBLANK, are minimum values. Once the settling time of the ringing voltage on the original DMAG voltage (VDMAG1) is more than the TBLANK, the ringing voltage may cause incorrect detection of the feedback signal and unstable CV regulation. As shown in Figure 10, the low-pass filter (including the CDMAG and the resistordivider) is a possible solution used to filter the ringing voltage from the VAUX. After the low-pass filter is adopted, the smooth waveform (VDMAG2) of the DMAG voltage, shown in Figure 11, improves the detection of the feedback signal. The proper CDMAG is recommended in the following range : GATE C3 (optional) RDMAG2 R7711A DMAG RDMAG1 CCOMP RCOMP VOUT : small signal of the converter output voltage VCOMP : small signal of the OTA output voltage VIN : DC Input voltage of the converter VAUX(t) : switching voltage at the auxiliary winding Figure 12. CV Control System Diagram in PFM Operation The selected values of the compensation components (RCOMP and CCOMP) must meet the following equations : RDMAG1 RDMAG2 RCOMP 2 RDMAG1 RDMAG2 400( RCOMP 0.1 (RDMAG1 RDMAG2 ) CDMAG RDMAG1 RDMAG2 0.7 (RDMAG1 RDMAG2 ) RDMAG1 RDMAG2 It is recommended to be careful of output voltage regulation at light load or no load conditions with larger CDMAG. COMP VCOMP VAUX(t) V2 ) RDMAG1 RDMAG2 1 A NA A 1 ) 388.24( ) F RDMAG1 50 ( ) RDMAG2 8 ( V V NS V 2 N R 0.7ns A P DMAG2 4 π VOUT Lm CO NA RDMAG1 RDMAG2 A -RCOMP RDMAG2 8( ) 5 V RDMAG1 50( A ) V k Hz 2 NA ) F 2 π RCOMP 38.824( NS V F CCOMP A 2 1 The C3 is used to filter the high-frequency switching noise on the COMP pin. The C3 can be determined by the following equation : C3 Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 CCOMP 60kHz π RCOMP CCOMP -1 is a registered trademark of Richtek Technology Corporation. R7711A-06 May 2014 R7711A Thermal Considerations Layout Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : A proper PCB layout can abate unknown noise interference and EMI issue in the switching power supply. Please refer to the guidelines when you want to design PCB layout for switching power supply : The current path (1) from bulk capacitor, transformer, MOSFET, RCS return to bulk capacitor is a huge high frequency current loop. It must be as short as possible to decrease noise coupling and kept a space to other low voltage traces, such as IC control circuit paths, especially. Besides, the path (2) from RCD snubber circuit to MOSFET is also a high switching loop so keep it as small as possible. It is good for reducing noise, output ripple and EMI issue to separate ground traces of bulk capacitor (a), MOSFET (b), auxiliary winding (c) and IC control circuit (d). Finally, connect them together on bulk capacitor ground (a). The areas of these ground traces should be kept large. Placing bypass capacitor for abating noise on IC is highly recommended. The bypass capacitor should be placed as close to controller as possible. In order to minimize reflected trace inductance and EMI, it is minimized the area of the loop connecting the secondary winding, the output diode, and the output filter capacitor must be kept small. In addition, apply sufficient copper area at the anode and cathode terminal of the diode for heatsinking. Apply a larger area at the quiet cathode terminal. A large anode area can increase high-frequency radiated EMI. For R7711A applications, it is better to keep the trace from voltage divider resistors close to the DMAG pin. PD(MAX) = ( TJ(MAX) − TA ) / θJA Where T J(MAX) is the maximum operation junction temperature, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification, the maximum junction temperature is 125°C. The junction to ambient thermal resistance θJA is layout dependent. For SOT-23-6 package, the thermal resistance θJA is 260.7°C/ W on the standard JEDEC 51-3 single layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : PD(MAX) = (125°C − 25°C) / (260.7°C/W) = 0.38W for SOT-23-6 package The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. The Figure 13 of derating curve allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. Maximum Power Dissipation (W) 0.6 Single Layer PCB 0.5 0.4 0.3 0.2 0.1 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 13. Derating Curve of Maximum Power Dissipation Copyright © 2014 Richtek Technology Corporation. All rights reserved. R7711A-06 May 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 R7711A CBULK (a) CBULK Ground (a) (2) VDD (1) (c) IC Ground (d) GATE DMAG Trace Trace Auxiliary Ground (c) Trace MOSFET Ground (b) MOSEFT R7711A CS RCS COMP GND (b) (d) Figure 14. PCB Layout Guide Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 18 is a registered trademark of Richtek Technology Corporation. R7711A-06 May 2014 R7711A Outline Dimension H D L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.889 1.295 0.031 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 SOT-23-6 Surface Mount Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. R7711A-06 May 2014 www.richtek.com 19