® RT6010 Dual Channel High Efficiency and High Accuracy Average Current Control LED Backlight Buck Controller General Description Features The RT6010 is a dual channel high accuracy average current control LED backlight buck controller for 2 LED strings w/ o LED binning. Dual MOSFET drivers are specifically designed to drive two power N-MOSFETs in an asynchronous buck converter topology. The controller provides variable LED current control by adjusting the CS resistor value for digital and linear dimming. The controller operates with T1/T2 Average Current Control (T2C) topology to provide high accuracy ±3%. The controller also provides high efficiency (higher than 95%) under proper setting without LED binning. The controller provides VIN from 8V to 450V. It is preferred to operate the controller under a current ripple of < 30% average current and about 85% duty to optimize the performance. z The RT6010 can be easily connected in series by master/ slave synchronization for multiple channel, even for more than 6-CH. The controller provides SPD (Smart Phase Shift Dimming) that is easily implemented to synchronize master and slave ICs. The controller provides both analog and PWM dimming. The RT6010 automatically detects LED bar open, LED bar short to VIN, and LED bar short to GND to prevent VOUT from over/under voltage damages. The controller also outputs fault signal with programmable delay to previous power stage, such as ACDC controller. Ordering Information RT6010 Package Type S :SOP-16 Lead Plating System G : Green (Halogen Free and Pb Free) Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` z z z z z z z z z z z z Fast Average Current Control T2C (T1/T2 Average Current Control) Dual MOSFET Drives for Asynchronous Buck Topology Provide High Efficiency > 95% and High Accuracy ±3% Channel to Channel Variation Provide LED w/o Binning Programmable PWM Constant Off Time Support both PWM and Analog Dimming PWM Dimming Duty Down to 1% OVP for Bar Short with VIN UVP for Bar Open/Short to GND with programmable Fault Delay Support SPD (Smart Phase Shift Dimming) for Multiple Channel Dimming Solution V IN POR Detection with EN Pin to Prevent Malfunction SOP-16 Package RoHS Compliant and Halogen Free Applications z z z z z z LCD TV, MNT Display Backlight DC/DC or ACDC LED Driver Application General Purpose Constant Current Source LED Signage and Display Architectural and Decorative LED Lighting LED Street Lighting Pin Configurations (TOP VIEW) VCC DIM/PWM_IN RT D_OSC F_DELAY FAULT NC DPS 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VSS PWM_OUT RT_OUT EN CS2 GATE2 GATE1 CS1 Suitable for use in SnPb or Pb-free soldering processes. SOP-16 Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS6010-00 March 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT6010 Marking Information RT6010GS : Product Number RT6010 GSYMDNN YMDNN : Date Code Typical Application Circuit VIN CIN 120µF/450V COUT2 0.22µF COUT1 0.22µF D2 1 VCC 12V CVCC 10µF Chip Enable 13 2 EPWM/IPWM 6 High : Disable SPD Function Low : Support SPD 8 5 4 CF_DELAY 10nF CD_OSC 10nF RT6010 VCC EN GATE1 DIM/PWM_IN CS1 FAULT GATE2 DPS F_DELAY CS2 4.7mH L1 10 Q1 9 11 RCS1 5 Q2 12 RCS2 5 D_OSC VSS 16 D1 4.7mH L2 NC 7 RT RT_OUT PWM_OUT 3 14 15 RRT 180k Slave IC Slave IC Figure 1 VIN 12V 0.22µF 0.22µF 120µF/450V 0.22µF 0.22µF 5V 5V 50k VCC High : Disable SPD Function Low : Support SPD 10nF 10nF 5 RT_OUT PWM_OUT DPS 5 GATE2 F_DELAY CS2 D_OSC VSS RT CS1 FAULT Q2 RT 180k Q4 5 CS2 D_OSC VSS Q3 GATE1 DIM/PWM_IN CS1 GATE2 DPS F_DELAY Q1 GATE1 D3 4.7mH RT6010 (Stage_2) VCC EN 4.7mH DIM/PWM_IN FAULT D4 4.7mH RT6010 (Stage_1) EN EN D1 D2 4.7mH 10µF 5 RT_OUT PWM_OUT Stage_3 DIM/PWM_IN Stage_3 RT FAULT Figure 2. Synchronization for Multiple Channel_Digital Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS6010-00 March 2012 RT6010 VIN 0.22µF 0.22µF 120µF/450V 0.22µF 12V 5V 0.22µF 5V 50k 10µF EN High : Disable SPD Function Low : Support SPD D2 4.7mH VCC EN 1k DIM/PWM_IN DPS GATE2 F_DELAY 10nF 10nF DPS 5 RT RT_OUT GATE2 F_DELAY 10nF 5 PWM_OUT GATE1 180k Q4 5 CS2 D_OSC VSS Q3 CS1 FAULT Q2 D3 4.7mH RT6010 (Stage_2) DIM/PWM_IN CS2 D_OSC VSS VCC EN Q1 GATE1 D4 4.7mH CS1 FAULT 22nF D1 4.7mH RT6010 (Stage_1) 5 RT RT_OUT PWM_OUT Stage_3 DIM/PWM_IN Stage_3 RT FAULT Figure 3. Synchronization for Multiple Channel_Analog Functional Pin Description Pin No. Pin Name Pin Function 1 VCC Power Supply for PWM Controller. 2 DIM/PWM_IN Dimming PWM Pulse Input or Analog Voltage Input. 3 RT 4 D_OSC Constant off time setting by connecting proper resistor to VSS. For analog dimming, D_OSC should be connected to a capacitor to generate dimming triangle oscillator that is compared with DIM/PWM_IN DC voltage level to generate PWM dimming pulse. For digital dimming, D_OSC should be connected to VSS. 5 F_DELAY Define FAULT pin output delay by connecting to a proper capacitor to prevent false trigger for UVP and OTP. 6 FAULT Open drain output fault including UVP, OVP, and OTP (Active Low). 7 NC No Internal Connection. 8 DPS Smart Phase Shift Dimming Disable Pin. Pull DPS high to disable function. 9 CS1 Channel 1 Current Sense Input. 10 GATE1 Channel 1 Current Gate Driver Output. 11 GATE2 Channel 2 Current Gate Driver Output. 12 CS2 Channel 2 Current Sense Input. 13 EN Chip Enable (Active High). Enable PWM system, prefer connect to VIN resistive voltage divider to guarantee VIN power ready to prevent from PWM malfunction. 14 RT_OUT 15 PWM_OUT 16 VSS Output for the next RT6010 RT. SPD (Smart Phase Shift Dimming) output for slave to synchronize dimming phase shift. Ground. Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS6010-00 March 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT6010 Function Block Diagram CS1 EN + 2V EN_PWM1 Enable Average Control Logic GATE1 Average Control Logic GATE2 - CS2 DIM/PWM_IN EN_PWM2 Dimming Control PWM_OUT D_OSC OSC DPS RT CS1, CS2 10µA Off_time control F_DELAY RT_OUT FAULT + 1V Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 Protection OTP Bar open Bar short to VIN Bar short to GND - VCC VSS is a registered trademark of Richtek Technology Corporation. DS6010-00 March 2012 RT6010 Absolute Maximum Ratings z z z z z z z z z (Note 1) Supply Voltage, VCC -------------------------------------------------------------------------------------------------------- −0.3V to 15V D_OSC, PWM_OUT -------------------------------------------------------------------------------------------------------- −0.3V to 7V Others Pins ------------------------------------------------------------------------------------------------------------------- −0.3V to 15V Power Dissipation, PD @ TA = 25°C SOP-16 ------------------------------------------------------------------------------------------------------------------------ 1.176W Package Thermal Resistance (Note 2) SOP-16, θJA ------------------------------------------------------------------------------------------------------------------- 85°C/W Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------------- 260°C Junction Temperature ------------------------------------------------------------------------------------------------------- 150°C Storage Temperature Range ---------------------------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 3) HBM (Human Body Mode) ------------------------------------------------------------------------------------------------ 2kV MM (Machine Mode) -------------------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions z z z z (Note 4) Control Input Voltage, VCC ------------------------------------------------------------------------------------------------ 12V ±10% Supply Input Voltage, VIN -------------------------------------------------------------------------------------------------- 8V to 450V Junction Temperature Range ---------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit -- 4 -- mA -- -- 1 mA Supply Input V BOOT = 12V, VDIM/PWM_IN = 5V, V CSx = 0.3V Without HV LDO Æ lower shut down current 1mA Supply Current IVCC Shutdown Current ISHDN UVLO Threshold VUVLO 7 8 9 V UVLO Hysteresis ΔV UVLO -- 1 -- V Logic-High VIH 2 -- -- Logic-Low VIL -- -- 0.6 Logic-High VOH 2.4 -- -- Logic-Low VOL -- -- 0.4 EN Threshold -- 2 -- V EN Hysteresis -- 0.2 -- V -- 500 -- mV 2 8 20 μs DIM/PWN_IN Threshold Voltage PWM_OUT Threshold Voltage V V PWM Controller CS V REF On-Time tON Recommend Constant Off-Time tOFF Set up by RT(set 66.6kΩ) 0.8 1 1.2 μs Recommend customer application duty 40 85 90 % Duty Copyright © 2012 Richtek Technology Corporation. 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DS6010-00 March 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT6010 Parameter Symbol PWM Frequency Test Conditions Defined by tOFF Channel-to-Channel Accuracy Min Typ Max Unit 50 100 300 kHz -- 1.6 -- % Protection OVP LED string short -- 1 -- V UVP LED string no connection -- 100 -- mV F_DELAY Detect Voltage Bar open, Bar short to GND, Bar short to VIN & OTP 0.9 1 1.1 V F_DELAY Current Source -- 10 -- μA FAULT Open Drain Ability -- -- 100 Ω UVP/OVP Blanking Time -- 500 -- ns -- 250 -- ns OTP -- 160 -- °C OTP Hysteresis -- 20 -- °C 100 -- 600 Hz 5 -- -- μs -- 25 -- ms -- 2.5 -- -- 1 -- D_OSC Sourcing Current -- 10 -- μA D_OSC Sinking Current -- 10 -- μA UVP Delay Time To gate off Dimming PWM Dimming Frequency Min Dimming Pulse Forced Dimming Delay Time (High) High-Level VIH Low-Level VIL D_OSC Input Force dimming to H when DIM/PWM_IN goes H for too long When operating at analog dimming, we recommend DIM below 2.4V When operating at analog dimming, we recommend DIM above 1.1V V Driver Capability Gate Driver Source VCC = 12V, VGATEX = 9V -- 80 -- mA Gate Driver Sink VCC = 12V, VGATEX = 3V -- 200 -- mA Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS6010-00 March 2012 RT6010 Typical Operating Characteristics LED Current vs. Output Voltage 110 108 108 106 106 104 LED Current (mA) LED Current (mA) LED Current vs. Input Voltage 110 ILED1 102 100 ILED2 98 96 94 VOUT1 = VOUT2 = 90V, 56LEDs, ILED1 = ILED2 = 100mA, RRT = 180kΩ 92 90 110 120 130 140 150 160 170 180 190 104 ILED1 102 100 ILED2 98 96 94 92 VIN = 120V, ILED1 = ILED2 = 100mA, RRT = 180kΩ 90 200 60 65 70 75 80 85 90 95 100 Output Voltage (V) Input Voltage (V) LED Current vs. Temperature Efficiency vs. Input Voltage 110 100 90 80 ILED1 Efficiency (%) LED Current (mA) 106 102 ILED2 98 94 70 60 50 40 30 20 VIN = 120V, VOUT1 = VOUT2 = 90V, 56LEDs, ILED1 = ILED2 = 100mA, RRT = 180kΩ 90 -50 -25 0 25 50 75 100 VOUT1 = VOUT2 = 90V, 56LEDs, ILED1 = ILED2 = 100mA, RRT = 180kΩ 10 0 125 110 120 130 140 Temperature (°C) VIN = 120V, VOUT1 = VOUT2 = 90V, 56LEDs 170 100 ILED1 90 ILED2 80 LED Current (mA) 100 LED Current (mA) 160 180 190 200 LED Current vs. PWM Duty Cycle LED Current vs. Analog Dimming Voltage 120 150 Input Voltage (V) 80 60 40 ILED1 ILED2 70 60 50 40 30 20 20 VIN = 120V, VOUT1 = VOUT2 = 90V, 56LEDs, RRT = 180kΩ, COUT = 0.22μF 10 0 0 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 Analog Dimming Voltage (V) Copyright © 2012 Richtek Technology Corporation. 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DS6010-00 March 2012 0 10 20 30 40 50 60 70 80 90 100 Duty Cycle (%) is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT6010 LED Current vs. PWM Duty Cycle PWM Dimming Response 100 90 ILED1 LED Current (mA) 80 PWM (5V/Div) ILED2 70 60 I LED1 (100mA/Div) 50 40 30 20 VIN = 120V, VOUT1 = 100V 31LEDs, VOUT2 = 80V, 25LEDs PWM = 300Hz, COUT = 0.22μF 10 I LED2 (100mA/Div) VIN = 120V, VOUT1 = VOUT2 = 90V, 56LEDs, PWM = 300Hz, COUT = 0.22μF, ILED1 = ILED2 = 100mA 0 0 20 40 60 80 Time (50μs/Div) 100 Duty Cycle (%) PWM Dimming Response V IN_AC (500mV/Div) PWM (5V/Div) I LED1 (100mA/Div) I LED1 (100mA/Div) I LED2 (100mA/Div) Non-SPD Function VIN = 120V, VOUT1 = VOUT2 = 90V, 56LEDs I LED2 (100mA/Div) VIN = 120V, VOUT1 = 100V, 31LEDs VOUT2 = 80V, 25LEDs, PWM = 300Hz COUT = 0.22μF, ILED1 = ILED2 = 100mA Time (50μs/Div) I IN (100mA/Div) PWM = 300Hz, PWM Duty = 30% Time (1ms/Div) SPD Function V IN_AC (500mV/Div) I LED1 (100mA/Div) I LED2 (100mA/Div) VIN = 120V, VOUT1 = VOUT2 = 90V, 56LEDs I IN (100mA/Div) PWM = 300Hz, PWM Duty = 30% Time (1ms/Div) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS6010-00 March 2012 RT6010 Application Information The RT6010 is a dual channel, high accuracy current control LED backlight buck controller. The controller is capable of providing efficiency higher than 95% for LED backlight use. Current Setting Current flow through the inductor during charging period is detected by a sensing resistor, RCS. The RT6010 provides average current mode by dynamically adjusting VREF. The LED average current can be set as : IOUT = 500mV RCS Constant Off-Time Setting The RT6010 is a constant off-time control IC. The off-time can be set via the external RT pin resistance, RRT. The switching frequency is usually designed to be between 50kHz to 300kHz, so the constant off-time must also meet the following condition : VIN - VLED ≤ 300k tOFF x VIN tOFF = 15p x RRT 50k ≤ where tOFF is the constant off-time Smart Phase Shift Dimming The RT6010 provides dimming function selection via the DPS pin. If the pin is connected to VCC, the two dimming signals will be in sync for those two channels. On the other hand, if the pin is connected to GND, the two dimming signals will be separated. See Figure below. DIM/PWM_IN GATE1 GATE2 DPS = VCC DIM/PWM_IN The RT6010 not only provides digital dimming, but also analog dimming as well. The analog dimming frequency is set via the D_OSC pin. Note that the minimum dimming duty is 6.667%. The dimming frequency is set according to the following equation : fPWM = 10μA / (CD_OSC × 3V) where CD_OSC is the capacitor connected from the D_OSC pin to GND. Protection Functions The RT6010 provides various protection features to prevent damage to the IC during abnormal situations. The features include over voltage protection, under voltage protection, and over temperature protection. The protection flow chart is shown below. FLT Blanking Delay An FLT blanking delay function is available for setting the fault delay time to prevent false triggers for UVP and OTP. The delay time is set via the external capacitor connected from the F_DELAY pin to ground. The blanking delay time can be set according to below equation : t = CF_DELAY x 1V 10μA where CF_DELAY is the capacitor connected from the F_DELAY pin to GND. After VF_DELAY > 1V, a fault signal will be sent to the FAULT pin. Over Voltage Protection The RT6010 provides Over Voltage Protection (OVP) when the LED cathode becomes shorted to VIN. The OVP threshold voltage of the CSx pin is approximately 1V. If OVP is triggered during gate-on period, the controller will turn off the MOSFET for 400μs. If OVP occurs consecutively for more than 14 times, the RT6010 will send a fault signal to the FAULT. Under Voltage Protection GATE1 GATE2 DPS = GND Figure 4. Smart Phase Shift Dimming Via the DPS Pin Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS6010-00 March 2012 Analog Dimming Frequency Setting For situations where the LED cathode becomes open or shorted to GND, the RT6010 provides Under Voltage Protection (UVP). The threshold voltage of UVP is approximately 0.1V. If UVP occurs during gate-on period, the RT6010 will send a fault signal to the FAULT pin after the fault delay time. is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT6010 VIN, VCC Power up Start GATE = Low OVP TIMES = 0 F_DELAY pull low FAULT = High VCC < 3V VCC > 5V EN = Low / VCC < UVLO Voltage EN = High &VCC > UVLO Voltage After GATE = High for 750ns Detect CS pin > 1V GATE = Low Timing > 400µs After GATE = High for 750ns Detect CS pin > 0.1V OVP TIMES > 14 FAULT = High F_DELAY Voltage > 1V GATE Switch Keep OVP TIMES F_DELAY pull Low FAULT = Low GATE Switch Keep OVP TIMES F_DELAY pull Low FAULT = Low Tj < 140°C After GATE = High for 750ns Detect CS pin < 0.1V GATE Switch Keep OVP TIMES 10µA Current Charge CF_DELAY GATE = Low OVP TIMES + 1 F_DELAY pull Low FAULT = High After GATE = Low Detect CS pin > 0.5V continue 1.4µs Normal GATE Switch Keep OVP TIMES F_DELAY pull Low FAULT = High Tj > 160°C GATE = Low Keep OVP TIMES 10µA Current Charge CF_DELAY FAULT = High F_Delay Voltage > 1V GATE Switch Keep OVP TIMES 10µA Current Charge CF_DELAY GATE = Low Keep OVP TIMES 10µA Current Charge CF_DELAY FAULT = Low FAULT = Low Tj < 140°C GATE Switch Keep OVP TIMES F_DELAY pull Low FAULT = Low Figure 5. Protection Flow Chart for the RT6010 Over Temperature Protection MOSFET Selection To prevent excessive power dissipation from damaging the device, the RT6010 includes an over temperature protection feature. When the temperature rises above OTP temperature, a fault signal will be sent to disable the channel after the fault delay time. After the die temperature falls below OTP hysteresis temperature, the channel will be enabled again. For operating at high input or output voltages, the power N-MOSFET switch is typically chosen according to the drain voltage, V DS , rating and low gate charge. Consideration of switch on-resistance, RDS(ON), is usually secondary because switching losses dominate power loss. The gate driving voltage follows the VCC voltage range, which is 12V for normal operation. The N-MOSFET must meet this specification. Inductor Selection The inductor current ripple is usually designed below 30% of its average current. Hence, the recommended inductor value can be calculated as : VLED L> x t OFF 0.3 x IOUT where VLED is the LED series voltage drop, tOFF is the PWM off-time, and IOUT is the LED average current. Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 Capacitor Selection Selecting a suitable capacitor can reduce LED current ripple and increase LED life-time. Moreover, if the capacitor has good current sense linearity, it will also ensure that the current matching is accurate. Note that having too large of a capacitance will cause the LED current to respond slowly. The typical value of the capacitor is 0.22μF. is a registered trademark of Richtek Technology Corporation. DS6010-00 March 2012 RT6010 Diode Selection Ultra-fast diodes are chosen for their low forward voltage drop and fast switching speed. When selecting ultra-fast diodes, important parameters such as power dissipation, reverse voltage rating, and pulsating peak current should all be taken into consideration. A suitable ultra-fast diode's reverse voltage rating must be greater than the input voltage and its average current rating must exceed the LED average current. VCC VIN EN Start detect UVP If VCC and VEN power on before VIN powers on, UVP fault will be triggered. Power On For power on sequence, it is recommended to connect EN to a resistive voltage divider placed between VIN and GND to prevent UVP malfunction, as shown below. VIN REN1 910k VCC 12V Figure 7. (b) UVP Malfunction without REN1, REN2 Resistors Figure 7. Timing Diagram for Power On Sequence VCC EN REN2 30k Figure 6. Circuit for Proper Power On Via EN Pin Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : VIN PD(MAX) = (TJ(MAX) − TA) / θJA EN where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient VCC Start detect UVP VCC VIN EN thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOP-16 package, the thermal resistance, θJA, is 85°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (85°C/W) = 1.176W for SOP-16 package Start detect UVP Figure 7. (a) Proper Start Up with REN1, REN2 Resistors Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS6010-00 March 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT6010 The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 8 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 1.2 Four-Layer PCB 1.1 Layout Considerations PCB layout plays an important role for the RT6010. Careful layout can decrease switching noise for stable operation and improve performance. For best performance of the RT6010, the following layout guidelines should be strictly followed. ` Current sense feedback resistors, D_OSC capacitor, F_DELAY capacitor, RT resistor and capacitors for VIN and VCC should be placed as close to the controller as possible. ` Keep the power loops as short as possible to prevent voltage spikes caused by current transition from one device to another at high speed as a result of parasitic components on the circuit board. Therefore, all current switching loops should be kept as short as possible with wide traces to minimize the parasitic components. ` Minimize the trace length between the MOSFET and the controller. Since the drivers are integrated in the controller, the driving path should be short and wide to reduce the parasitic inductance and resistance. ` The CS1 and CS2 current sense feedback trace should be kept away from the switching node. Keep the feedback trace close to the CS1 and CS2 pins. Allow large area for VIN inductor trace, FET trace, RCS1 and RCS2 trace, and GND pad. 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 8. Derating Curve of Maximum Power Dissipation The GND traces should be wide and short. VCC GND VCC DIM/PWM_IN RT D_OSC F_DELAY FAULT NC DPS 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 GND VSS PWM_OUT RT_OUT EN CS2 GATE2 GATE1 CS1 RCS2 GND C OUT2 L2 Q1 VIN L1 CIN Q2 RCS1 COUT1 + GND Current sense feedback resistors, D_OSC capacitor, F_DELAY capacitor, RT resistor and capacitors for VIN and VCC should be placed as close to the controller as possible. The current sense node must be near the CS pin. Place the power components as close to the IC as possible. Figure 9. PCB Layout Guide Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS6010-00 March 2012 RT6010 Outline Dimension H A M B J F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 9.804 10.008 0.386 0.394 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.254 0.007 0.010 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 16–Lead SOP Plastic Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS6010-00 March 2012 www.richtek.com 13