R7731 Burst Triple Mode PWM Flyback Controller General Description Features The R7731 is a high performance, low cost, low start-up current, current mode PWM controller with burst triple mode to support green mode power saving operation. The R7731 integrates functions of Soft-Start, Under Voltage Lockout (UVLO), Leading Edge Blanking (LEB), Over Temperature Protection (OTP), internal slope compensation. It provides the users a superior AC/DC power application of higher efficiency, low external component counts and lower cost solution. z To protect the external power MOSFET from being damaged by supply over voltage, the R7731 output driver is clamped at 12V. Furthermore, R7731 features fruitful protections like OLP (Over Load Protection) ,OVP (Over Voltage Protection) to eliminate the external protection circuits and provide reliable operation. R7731 is available in SOT-23-6 and DIP-8 packages. z z z z z z z z z z z z z z z z μA) Very Low Start-Up Current (<30μ 10/14V UVLO Soft-Start Function Current Mode Control Jittering Switching Frequency Internal Leading Edge Blanking Built-in Slope Compensation Burst Triple Mode PWM for Green-Mode Cycle-by-Cycle Current Limiting Feedback Open Protection Output Over Voltage Protection Over Temperature Protection Over Load Protection Soft Driving for Reducing EMI High Noise Immunity Opto Coupler Short Protection RoHS Compliant and Halogen Free Applications z z z z z z Adaptor and Battery Charger ATX Standby Power Set Top Boxes (STB) DVD and CD(R) TV/Monitor Standby Power PC Peripherals Typical Application Circuit VO+ AC Mains (90V to 265V) VO- RT VDD R7731 COMP GND DS7731-03 March 2011 GATE CS www.richtek.com 1 R7731 Ordering Information R7731 Package Type E : SOT-23-6 N : DIP-8 Lead Plating System G : Green (Halogen Free and Pb Free) Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. Pin Configurations (TOP VIEW) GATE VDD 6 CS 5 4 2 3 GND COMP RT SOT-23-6 GND COMP NC 8 RT 7 6 5 2 3 4 NC CS GATE VDD DIP-8 www.richtek.com 2 DS7731-03 March 2011 R7731 Function Block Diagram OVP OTP Shutdown Logic 27V POR Brown out sensing + - UVLO Counter COMP open sensing VDD + 14V/10V Bias & Bandgap OLP Jittering Oscillator SS Constant Power RT Dmax Soft Driver S COMP Slope Ramp CS + PWM comparator COMP Burst Triple Mode LEB GATE Q R X3 VBURL VBURH VDD GND Functional Pin Description Pin No. Pin Name Pin Function SOT-23-6 DIP8 1 8 GND Ground. 2 7 COMP Comparator Input Pin. By connecting a photo-coupler to this pin, the peak current set point is adjusted accordingly to the output power requirement. 3 5 RT Set the switching frequency by connecting a resistor to GND. 4 4 CS Primary Current Sense Pin. 5 2 VDD IC Power Supply Pin. 6 1 GATE Gate driver output to drive the external MOSFET. -- 3, 6 NC No Internal Connection. DS7731-03 March 2011 www.richtek.com 3 R7731 Absolute Maximum Ratings z z z z z z z z z z z z (Note 1) Supply Input Voltage, VDD ------------------------------------------------------------------------------------------- 30V GATE Pin ---------------------------------------------------------------------------------------------------------------- 20V FB, RT, COMP, CS Pin ---------------------------------------------------------------------------------------------- 6.5V IDD ------------------------------------------------------------------------------------------------------------------------- 10mA Power Dissipation, PD @ TA = 25°C SOT-23-6 ---------------------------------------------------------------------------------------------------------------- 0.4W DIP-8 --------------------------------------------------------------------------------------------------------------------- 0.714W Package Thermal Resistance (Note 2) SOT-23-6, θJA ----------------------------------------------------------------------------------------------------------- 250°C/W DIP-8, θJA ---------------------------------------------------------------------------------------------------------------- 140°C/W Junction Temperature ------------------------------------------------------------------------------------------------- 150°C Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 3) HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 4kV MM (Machine Mode) -------------------------------------------------------------------------------------------------- 250V Recommended Operating Conditions z z z z (Note 4) Supply Input Voltage, VDD ------------------------------------------------------------------------------------------- 12V to 25V Operating Frequency ------------------------------------------------------------------------------------------------- 50k to 130kHz Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VDD = 15V, RT = 100kΩ, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit 25.5 27 28.5 V VDD Section VDD Over Voltage Protection Level VOVP On Threshold Voltage VTH_ON 13 14 15 V VDD On/Off Hysteresis VDD_hys 3 4 5 V Start-Up Current IDD-ST -- 20 30 μA Operating Current IDD-OP -- 1.1 2.2 mA VDD Hold Up Mode Hysteresis VDD = VTH_ON – 0.1V VDD = 15V, RT = 100kΩ, GATE = Open, VCOMP = 2.5V VDD_hys VCOMP < 1.6V -- 11.5 -- V VDD Hold Up Mode Entry Level VDD_Low VCOMP < 1.6V -- 11 -- V VDD Clamp Voltage VDD_Clamp -- 29 -- V 60 65 70 kHz -- ±4 -- % 70 75 80 % Ending Level Oscillator Section (RT pin) Normal PWM Frequency f OSC Frequency Jittering Range Maximum Duty Cycle DMAX RT = 100kΩ To be continued www.richtek.com 4 DS7731-03 March 2011 R7731 Parameter Symbol Test Conditions Min Typ Max Unit Frequency Variation Versus VDD Deviation fDV VVDD = 12V to 25V -- -- 2 % Frequency Variation Versus Temperature Deviation fDV TA = −30°C to 105°C (Note 5) -- -- 5 % 5 5.5 6 V COMP Input Section Open Loop Voltage VCOMP-OP COMP pin Open COMP Open Loop Protection Delay TOLP Cycles RT = 100kΩ -- 29 -- ms Short Circuit COMP Current VCOMP = 0V -- 1.2 2.2 mA 0.65 0.7 0.75 V IZERO Current Sense Section Peak Current Limitation VCSTH Leading Edge Blanking Time TLEB -- 420 520 ns Propagation Delay Time TPD -- 100 -- ns GATE Section Rising Time TR VDD = 15V, CL = 1nF -- 250 350 ns Falling Time TF VDD = 15V, CL = 1nF -- 150 250 ns Gate Output Clamping Voltage Vclamp VDD = 22V Over Temperature Protection TOTP OTP Hysteresis TOTP_hys -- 12 -- V 140 -- -- °C -- 30 -- °C Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guaranteed by design. DS7731-03 March 2011 www.richtek.com 5 R7731 Typical Operating Characteristics VTH vs. Temperature IDD-ST vs. Temperature 15 28 26 14 V TH_ON 24 I DD-ST (μA) VDD (V) 13 12 11 VTH_OFF 22 20 18 16 14 10 12 9 VDD = 13V 10 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -15 10 1.50 62 VDD = 27V VDD = 15V VDD = 11V 1.40 1.35 85 110 135 110 135 VDD = 11V 61 VDD = 27V 60 VDD = 15V 59 1.30 58 VCOMP = 2V, CL = 1nF 1.25 57 -40 -15 10 35 60 85 110 135 -40 -15 10 35 60 85 Temperature (°C) Temperature (°C) DMAX vs. Temperature VCOMP vs. Temperature 80 5.50 79 5.45 78 5.40 VCOMP (V) 77 DMAX (%) 60 fOSC vs. Temperature 63 f OSC (kHz) I DD-OP (mA) IDD-OP vs. Temperature 1.55 1.45 35 Temperature (°C) Temperature (°C) 76 75 74 73 5.35 5.30 5.25 72 5.20 71 70 COMP Open Voltage 5.15 -40 -20 0 20 40 60 Temperature (°C) www.richtek.com 6 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature (°C) DS7731-03 March 2011 R7731 GATE (Rising/Falling) vs. Temperature 350 12.5 300 250 12.0 GATE (ns) Voltage (V) Clamp Voltage vs. Temperature 13.0 11.5 11.0 Rising 200 150 Falling 100 10.5 50 VDD = 20V, CL = 1nF 10.0 VDD = 20V, CL = 1nF 0 -40 -15 10 35 60 85 110 135 -40 -25 -10 5 Temperature (°C) 20 35 50 65 80 95 110 125 Temperature (°C) VOH vs. VDD ISUPPLY vs. Temperature 13 0.50 12 11 V OH (V) I SUPPLY (mA) 0.45 0.40 10 9 0.35 COMP Open No Gate Output ISUPPLY = IDD-OP − ICOMP 8 -40 -20 0 20 40 60 80 100 ISOURCE = 20mA 7 0.30 11 120 12 13 14 15 17 18 19 20 21 22 VDD (V) Temperature (°C) VOL vs. VDD ISUPPLY vs. VDD 600 0.426 575 0.424 0.422 I SUPPLY (mA) 550 V OL (mV) 16 525 500 475 450 0.420 0.418 0.416 0.414 0.412 425 VCOMP Open No Gate Output ISUPPLY = IDD-OP − ICOMP 0.410 ISINK = 20mA 400 11 12 13 14 15 16 17 VDD (V) DS7731-03 March 2011 18 19 20 21 0.408 22 11 12 13 14 15 16 17 18 19 20 21 22 VDD (V) www.richtek.com 7 R7731 Application Information UVLO Under Voltage Lockout (UVLO) block is to ensure VDD has reached proper operation voltage before we enable the whole IC blocks. To provide better temperature coefficient and precise UVLO threshold voltage, the reference voltage of hysteresis voltage (10V / 14V ) is from band-gap block directly. By this way, R7731 can operate more reliable in different environments. Jittering Oscillator For batter EMI performance, R7731 will operate the system with ±4% frequency deviation around setting frequency. To guarantee precise frequency, it is trimmed to 5% tolerance. It also generates slope compensation saw-tooth, 75% maximum duty cycle pulse and overload protection slope. By adjusting resistor of RT pin according to the following formula : fOSC (kHz) = 6500 RT (kΩ) It can typically operate between 50kHz to 130kHz. Note that RT pin can’ t be short or open otherwise oscillator will not operate. layout. Also, we amplify current sense signal to compare with feedback signal instead of dividing feedback signal. All the effort is to provide clean and reliable current mode operation. Soft-Start During initial power on, especially at high line, current spike is kind of unlimited by current limit. Therefore, besides cycle-by-cycle current limiting, R7731 still provides soft-start function. It effectively suppresses the start-up current spike. As shown in the Figure 1 and Figure 2, the start-up VCS is about 0.3V lower than competitor. Again, this will provide more reliable operation and possibility to use smaller current rating power MOSFET. V CS V OUT VOUT (2V/Div) VCS (500mV/Div) Built-in Slope Compensation To reduce component count, slope compensation is implemented by internal built-in saw-tooth. Since it’ s builtin, it’ s compromised between loop gain and sub-harmonic reduction. In general design, it can cancel sub-harmonic to 90Vac. Figure 1. Competitor Leading Edge Blanking (LEB) MOSFET Coss, secondary rectifier reverse recovery current and gate driver sourcing current comprise initial current spike. The spike will seriously disturb current mode operation especially at light load and high line. R7731 provides built-in 420ns LEB to guarantee proper operation in diverse design. V OUT V CS VOUT (2V/Div) VCS (500mV/Div) Noise Immunity Current mode controller is very sensitive to noise. R7731 takes the advantages of RICHTEK long term experience in designing high noise immunity current mode circuit and Figure 2. R7731 www.richtek.com 8 DS7731-03 March 2011 R7731 the output load gets light, feedback signal drops and touches VburL. Clock signal will be blanked and system ceases to switching. After VOUT drops and feedback signal goes back to VburH, switching will be resumed. Burst mode so far is widely used in low power application because it’ s simple, reliable and will not have any patent infringement issue. Gate Driver A totem pole gate driver is fine tuned to meet both EMI and efficiency requirement in low power application. An internal pull low circuit is activated after pretty low VDD to prevent external MOSFET from accidentally turning on during UVLO. Burst Triple Mode z To fulfill green mode requirement, there are 3 operation modes in R7731. Please also refer to Figure. 3 for details. z z PWM Mode : For most of load condition, the circuit will run at traditional PWM current mode. Burst Mode : During light load, switching loss will dominate the power efficiency calculation. This mode is to cut switching loss. As shown in Figure 3, when Normal Operation Light Load VDD Holdup Mode : When the VDD drops down to VDD turn off threshold voltage, the system will be shutdown. During shutdown period, controller does nothing to any load change and might cause VOUT down. To avoid this, when VDD drops to a setting threshold, 11V, the hysteresis comparator will bypass PWM and burst mode loop and force switching at a very low level to supply energy to VDD. No Load (VDD Holdup Mode) Load VDD VDD_High VDD_Low VCOMP VBURH VBURL VGATE Figure 3. Burst Triple Mode Protection z R7731 provides fruitful protection functions that intend to protect system from being damaged. All the protection function can be listed as below: z z Cycle-by-Cycle Current Limiting : This is a basic but very useful function and it can be implemented easily in current mode controller. z Overload Protection : Long time cycle-by-cycle current limiting will lead to system thermal stress. To further protect system, system will be shutdown after about 2048 clock cycles. It’ s about 30ms delay in 67kHz operation. After shutdown, system will resume and behave as hiccup. By proper start-up resistor design, thermal will be averaged to an acceptable level over the ON/OFF cycle of IC. This will last until fault is removed. z DS7731-03 March 2011 z Brownout Protection : During heavy load, this will trigger 30ms protection and shutdown the system. If it’ s in light load condition, system will be shutdown after VDD is running low and triggers UVLO. OVP : Output voltage can be roughly sensed by VDD pin. If the sensed voltage reaches 27V threshold, system will be shutdown after 20us deglitch delay. Feedback Open and Opto Coupler Short : This will trigger OVP or 30ms delay protection. It depends on which one occurs first. OTP : Internal OTP function will protect the controller itself from suffering thermal stress and permanent damage. It stops the system from switching until the temperature is under threshold level. Meanwhile, if VDD reaches VDD turn off threshold voltage, system will hiccup till over temperature condition is gone. www.richtek.com 9 R7731 Outline Dimension H D L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.889 1.295 0.031 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 SOT-23-6 Surface Mount Package www.richtek.com 10 DS7731-03 March 2011 R7731 A B E J C L I D F Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 9.068 9.627 0.357 0.379 B 6.198 6.604 0.244 0.260 C 3.556 4.318 0.140 0.170 D 0.356 0.559 0.014 0.022 E 1.397 1.651 0.055 0.065 F 2.337 2.743 0.092 0.108 I 3.048 3.556 0.120 0.140 J 7.366 8.255 0.290 0.325 L 0.381 0.015 8-Lead DIP Plastic Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. DS7731-03 March 2011 www.richtek.com 11